| /art/compiler/jni/quick/ |
| jni_compiler.cc | 217 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
218 __ CreateHandleScopeEntry(out_reg, class_handle_scope_offset,
264 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
265 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset,
336 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
337 __ CreateHandleScopeEntry(out_reg, handle_scope_offset,
430 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
431 __ Load(out_reg, saved_cookie_offset, 4);
442 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
443 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset
533 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
557 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_vertprog.h | 111 #define MAKE_VSF_OP(op, out_reg, out_reg_fields) \
112 ((op) | (out_reg) | ((out_reg_fields) << 20) )
|
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 737 ArmManagedRegister out_reg = mout_reg.AsArm();
740 CHECK(out_reg.IsCoreRegister()) << out_reg;
744 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
746 LoadFromOffset(kLoadWord, out_reg.AsCoreRegister(),
748 in_reg = out_reg;
751 if (!out_reg.Equals(in_reg)) {
753 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ);
757 AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), NE);
759 AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), AL)
[all...] |
| assembler_arm.h | [all...] |
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 552 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
556 CHECK(out_reg.IsXRegister()) << out_reg;
560 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
562 LoadWFromOffset(kLoadWord, out_reg.AsOverlappingWRegister(), SP,
564 in_reg = out_reg;
567 if (!out_reg.Equals(in_reg)) {
568 LoadImmediate(out_reg.AsXRegister(), 0, eq);
570 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), ne);
572 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), al)
597 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
[all...] |
| assembler_arm64.h | 175 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
179 void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
|
| /art/compiler/optimizing/ |
| intrinsics_arm64.cc | 417 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); local
419 __ Fabs(out_reg, in_reg);
453 Register out_reg = is64bit ? XRegisterFrom(output) : WRegisterFrom(output); local
456 __ Cneg(out_reg, in_reg, lt);
485 FPRegister out_reg = is_double ? DRegisterFrom(out) : SRegisterFrom(out); local
487 __ Fmin(out_reg, op1_reg, op2_reg);
489 __ Fmax(out_reg, op1_reg, op2_reg);
545 Register out_reg = is_long ? XRegisterFrom(out) : WRegisterFrom(out); local
548 __ Csel(out_reg, op1_reg, op2_reg, is_min ? lt : gt);
636 Register out_reg = is_double local
[all...] |
| code_generator_arm.cc | 3313 Register out_reg = out.AsRegister<Register>(); local
4083 DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()); local
5792 Register out_reg = out.AsRegister<Register>(); local
5900 Register out_reg = out.AsRegister<Register>(); local
5934 Register out_reg = out.AsRegister<Register>(); local
5969 Register out_reg = out.AsRegister<Register>(); local
6000 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| instruction_builder.h | 141 void BuildCheckedDivRem(uint16_t out_reg,
|
| code_generator_arm64.cc | [all...] |
| intrinsics_arm.cc | 304 Register out_reg = output.AsRegister<Register>(); local
307 __ add(out_reg, in_reg, ShifterOperand(mask));
308 __ eor(out_reg, mask, ShifterOperand(out_reg));
[all...] |
| code_generator_x86.cc | 6720 Register out_reg = out.AsRegister<Register>(); local
6751 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| code_generator_x86_64.cc | 6183 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
6214 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 2781 MipsManagedRegister out_reg = mout_reg.AsMips(); local
2830 MipsManagedRegister out_reg = mout_reg.AsMips(); local
[all...] |
| assembler_mips.h | 526 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
530 void CreateHandleScopeEntry(ManagedRegister out_reg,
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 2332 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); local
2382 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); local
[all...] |
| assembler_mips64.h | 451 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
455 void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.cc | 3041 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); local
3088 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); local
[all...] |
| assembler_x86_64.h | 789 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
793 void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 2289 X86ManagedRegister out_reg = mout_reg.AsX86(); local
2330 X86ManagedRegister out_reg = mout_reg.AsX86(); local
[all...] |
| assembler_x86.h | 718 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
722 void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
|
| /art/oatdump/ |
| oatdump.cc | [all...] |
| /art/compiler/utils/ |
| assembler.h | 476 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
480 virtual void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
|
| /external/valgrind/perf/ |
| tinycc.c | 17979 int nb_outputs, nb_operands, i, must_subst, out_reg; local
[all...] |
