/external/v8/src/arm64/ |
assembler-arm64-inl.h | 460 : base_(NoReg), regoffset_(NoReg), offset_(0), addrmode_(Offset), 466 : base_(base), regoffset_(NoReg), offset_(offset), addrmode_(addrmode), 476 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), 491 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), 506 regoffset_ = NoReg; 510 regoffset_ = offset.reg(); 518 DCHECK(regoffset_.Is64Bits() && !regoffset_.IsSP()); 524 regoffset_ = offset.reg(); 532 DCHECK(!regoffset_.IsSP()) [all...] |
assembler-arm64.h | 651 const Register& regoffset() const { return regoffset_; } 678 Register regoffset_; member in class:v8::internal::MemOperand [all...] |
/external/vixl/src/vixl/a64/ |
assembler-a64.cc | 378 : base_(base), regoffset_(NoReg), offset_(offset), addrmode_(addrmode) { 387 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), 402 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), 411 : base_(base), regoffset_(NoReg), addrmode_(addrmode) { 419 regoffset_ = offset.reg(); 427 VIXL_ASSERT(regoffset_.Is64Bits() && !regoffset_.IsSP()); 433 regoffset_ = offset.reg(); 441 VIXL_ASSERT(!regoffset_.IsSP()); 443 VIXL_ASSERT((regoffset_.Is64Bits() || (extend_ != SXTX))) [all...] |
assembler-a64.h | 734 const Register& regoffset() const { return regoffset_; } 749 Register regoffset_; [all...] |