| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIRegisterInfo.cpp | 21 const TargetInstrInfo &tii)
22 : AMDGPURegisterInfo(tm, tii),
24 TII(tii)
|
| AMDGPURegisterInfo.cpp | 20 const TargetInstrInfo &tii)
23 TII(tii)
|
| SIRegisterInfo.h | 28 const TargetInstrInfo &TII;
30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
|
| R600RegisterInfo.h | 28 const TargetInstrInfo &TII;
30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
|
| AMDGPURegisterInfo.h | 33 const TargetInstrInfo &TII;
36 AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii);
|
| R600RegisterInfo.cpp | 21 const TargetInstrInfo &tii)
22 : AMDGPURegisterInfo(tm, tii),
24 TII(tii)
|
| AMDILCFGStructurizer.cpp | 1903 const AMDGPUInstrInfo *tii = local
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3068 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3088 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3104 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3119 const AMDGPUInstrInfo *tii = local
3132 const AMDGPUInstrInfo *tii = local
3152 const AMDGPUInstrInfo *tii = local
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonBitTracker.h | 27 const HexagonInstrInfo &tii, MachineFunction &mf);
38 const HexagonInstrInfo &TII;
|
| HexagonBitTracker.cpp | 27 const HexagonInstrInfo &tii,
29 : MachineEvaluator(tri, mri), MF(mf), MFI(*mf.getFrameInfo()), TII(tii) {
886 // We need to evaluate one branch at a time. TII::AnalyzeBranch checks
940 if (TII.isPredicated(MI))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| TargetSchedule.h | 38 const TargetInstrInfo *TII;
47 TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {}
55 const TargetInstrInfo *tii);
61 const TargetInstrInfo *getInstrInfo() const { return TII; }
174 /// present this method falls back to TII->getInstrLatency with an empty
|
| /external/llvm/lib/CodeGen/ |
| BranchFolding.h | 34 const TargetInstrInfo *tii,
96 const TargetInstrInfo *TII;
|
| TargetSchedule.cpp | 55 const TargetInstrInfo *tii) {
58 TII = tii;
80 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, MI);
159 return TII->defaultDefLatency(SchedModel, DefMI);
164 OperLatency = TII->getOperandLatency(&InstrItins, DefMI, DefOperIdx,
175 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, DefMI);
178 // Rather than directly querying InstrItins stage latency, we call a TII
181 // special cases without TII hooks.
183 TII->defaultDefLatency(SchedModel, DefMI))
[all...] |
| BranchFolding.cpp | 170 if (!TII->isUnpredicatedTerminator(I))
196 const TargetInstrInfo *tii,
199 if (!tii) return false;
203 TII = tii;
220 if (!TII->AnalyzeBranch(MBB, TBB, FBB, Cond, true))
415 TII->ReplaceTailWithBranchTo(OldInst, NewDest);
429 if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
485 const TargetInstrInfo *TII) {
492 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true))
[all...] |
| MachineScheduler.cpp | 391 const TargetInstrInfo *TII) {
392 return MI->isCall() || TII->isSchedulingBoundary(MI, MBB, *MF);
398 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
436 isSchedBoundary(&*std::prev(RegionEnd), &*MBB, MF, TII)) {
447 if (isSchedBoundary(&*std::prev(I), &*MBB, MF, TII))
[all...] |
| /external/doclava/src/com/google/doclava/ |
| Stubs.java | 269 for (TypeInfo tii : ti.typeArguments()) {
271 if (tii.qualifiedTypeName() != ti.qualifiedTypeName()) {
272 ClassInfo hiddenClass = findHiddenClasses(tii);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | 277 const TargetInstrInfo *TII,
307 const MCInstrDesc Desc = TII->get(Opcode);
308 const TargetRegisterClass *RC = TII->getRegClass(Desc, Idx, TRI, MF);
409 const TargetInstrInfo *TII) {
419 if (IsChainDependent(Op.getNode(), Inner, NestLevel, TII))
426 (unsigned)TII->getCallFrameDestroyOpcode()) {
429 (unsigned)TII->getCallFrameSetupOpcode()) {
459 const TargetInstrInfo *TII) {
471 MyNestLevel, MyMaxNest, TII))
484 (unsigned)TII->getCallFrameDestroyOpcode())
[all...] |
| /external/webrtc/talk/media/testdata/ |
| voice.rtpdump | [all...] |
| /frameworks/opt/setupwizard/tools/docs/ |
| doclava.jar | |
