| /external/clang/test/CodeGen/ |
| ppc64-vector.c | 3 typedef short v2i16 __attribute__((vector_size (4))); typedef
13 v2i16 test_v2i16(v2i16 x)
|
| builtins-mips.c | 12 typedef short v2i16 __attribute__ ((vector_size(4))); typedef
17 v2i16 v2i16_r, v2i16_a, v2i16_b, v2i16_c;
352 v2i16_a = (v2i16) {0xffff, 0x2468};
353 v2i16_b = (v2i16) {0x1234, 0x1111};
356 v2i16_a = (v2i16) {0xffff, 0x2468};
357 v2i16_b = (v2i16) {0x1234, 0x1111};
392 v2i16_b = (v2i16) {0xffff, 0x1555};
393 v2i16_c = (v2i16) {0x1234, 0x3322};
397 v2i16_b = (v2i16) {0xffff, 0x1555};
398 v2i16_c = (v2i16) {0x1234, 0x3322}
[all...] |
| systemz-abi-vector.c | 16 typedef __attribute__((vector_size(4))) short v2i16; typedef
70 v2i16 pass_v2i16(v2i16 arg) { return arg; }
[all...] |
| x86_32-arguments-darwin.c | 217 typedef unsigned short v2i16 __attribute__((__vector_size__(4))); typedef
221 v2i16 f54(v2i16 arg) { return arg+arg; }
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 79 v2i16 = 31, // 2 x i16 enumerator in enum:llvm::MVT::SimpleValueType
227 return (SimpleTy == MVT::v4i8 || SimpleTy == MVT::v2i16 ||
328 case v2i16:
406 case v2i16:
456 case v2i16:
608 if (NumElements == 2) return MVT::v2i16;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 224 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
227 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
248 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
251 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
265 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 1 },
268 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 },
279 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 },
282 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 },
|
| AArch64ISelLowering.cpp | 429 // load, floating-point truncating stores, or v2i32->v2i16 truncating store.
594 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand);
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 158 case MVT::v2i16: return "v2i16";
236 case MVT::v2i16: return VectorType::get(Type::getInt16Ty(Context), 2);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 108 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
109 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
140 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
141 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
|
| ARMISelLowering.cpp | 631 for (MVT Ty : {MVT::v8i8, MVT::v4i8, MVT::v2i8, MVT::v4i16, MVT::v2i16,
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 59 (int)MVT::v2i16,
87 (int)MVT::v2i16,
209 setOperationAction(ISD::UDIV, MVT::v2i16, Expand);
666 if (OVT == MVT::v2i16) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 239 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
403 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 91 case MVT::v2i16: return "MVT::v2i16";
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 60 MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8};
84 setOperationAction(ISD::MUL, MVT::v2i16, Legal);
878 if ((Ty != MVT::v2i16) && (Ty != MVT::v4i8))
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 135 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
197 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand);
198 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand);
199 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i16, Expand);
[all...] |
| R600ISelLowering.cpp | 116 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Expand);
[all...] |
| SIISelLowering.cpp | 121 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Custom);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 65 case MVT::v2i16:
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 598 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 5 },
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 647 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Custom);
[all...] |
