| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| advsimd-across.d | 8 0: 0e303be7 saddlv h7, v31.8b
9 4: 4e303be7 saddlv h7, v31.16b
10 8: 0e703be7 saddlv s7, v31.4h
11 c: 4e703be7 saddlv s7, v31.8h
12 10: 4eb03be7 saddlv d7, v31.4s
13 14: 2e303be7 uaddlv h7, v31.8b
14 18: 6e303be7 uaddlv h7, v31.16b
15 1c: 2e703be7 uaddlv s7, v31.4h
16 20: 6e703be7 uaddlv s7, v31.8h
17 24: 6eb03be7 uaddlv d7, v31.4
[all...] |
| crypto.s | 23 aese v7.16b, v31.16b
24 aesd v7.16b, v31.16b
25 aesmc v7.16b, v31.16b
26 aesimc v7.16b, v31.16b
29 sha1su1 v7.4s, v31.4s
30 sha256su0 v7.4s, v31.4s
32 sha1c q7, s15, v31.4s
33 sha1p q7, s15, v31.4s
34 sha1m q7, s15, v31.4s
36 sha1su0 v7.4s, v15.4s, v31.4
[all...] |
| advsimd-misc.d | 8 0: 0e20bbe0 abs v0.8b, v31.8b
9 4: 4e20bbe0 abs v0.16b, v31.16b
10 8: 0e60bbe0 abs v0.4h, v31.4h
11 c: 4e60bbe0 abs v0.8h, v31.8h
12 10: 0ea0bbe0 abs v0.2s, v31.2s
13 14: 4ea0bbe0 abs v0.4s, v31.4s
14 18: 4ee0bbe0 abs v0.2d, v31.2d
15 1c: 2e20bbe0 neg v0.8b, v31.8b
16 20: 6e20bbe0 neg v0.16b, v31.16b
17 24: 2e60bbe0 neg v0.4h, v31.4
[all...] |
| crypto.d | 9 0: 4e284be7 aese v7.16b, v31.16b
10 4: 4e285be7 aesd v7.16b, v31.16b
11 8: 4e286be7 aesmc v7.16b, v31.16b
12 c: 4e287be7 aesimc v7.16b, v31.16b
14 14: 5e281be7 sha1su1 v7.4s, v31.4s
15 18: 5e282be7 sha256su0 v7.4s, v31.4s
16 1c: 5e1f01e7 sha1c q7, s15, v31.4s
17 20: 5e1f11e7 sha1p q7, s15, v31.4s
18 24: 5e1f21e7 sha1m q7, s15, v31.4s
19 28: 5e1f31e7 sha1su0 v7.4s, v15.4s, v31.4
[all...] |
| advsimd-misc.s | 24 \op v0.\()\T, v31.\()\T
|
| /external/llvm/test/MC/Hexagon/ |
| v60lookup.s | 5 V31.b = vlut32(V29.b, V15.b, R1)
6 # CHECK: 1b79fd3f { v31.b = vlut32(v29.b,v15.b,r1) }
7 V31.b |= vlut32(V29.b, V15.b, R2)
8 # CHECK: 1b7afdbf { v31.b |= vlut32(v29.b,v15.b,r2) }
9 V31:30.h = vlut16(V29.b, V15.h, R3)
10 # CHECK: 1b7bfdde { v31:30.h = vlut16(v29.b,v15.h,r3) }
11 v31:30.h |= vlut16(v2.b, v9.h, r4)
12 # CHECK: 1b4ce2fe { v31:30.h |= vlut16(v2.b,v9.h,r4) }
13 v31.w = vinsert(r4)
14 # CHECK: 19a4e03f { v31.w = vinsert(r4)
[all...] |
| v60-alu.s | 11 #CHECK: 1cffce9a { v26.uh = vavg(v14.uh,{{ *}}v31.uh):rnd }
12 v26.uh=vavg(v14.uh,v31.uh):rnd
29 #CHECK: 1cb4cabe { v31:30.h = vsub(v10.ub,{{ *}}v20.ub) }
30 v31:30.h=vsub(v10.ub,v20.ub)
41 #CHECK: 1ca8c43e { v31:30.w = vsub(v5:4.w,{{ *}}v9:8.w):sat }
42 v31:30.w=vsub(v5:4.w,v9:8.w):sat
53 #CHECK: 1c7fd364 { v4.w = vsub(v19.w,{{ *}}v31.w):sat }
54 v4.w=vsub(v19.w,v31.w):sat
101 #CHECK: 1cffc07c { v28.ub = vavg(v0.ub,{{ *}}v31.ub):rnd }
102 v28.ub=vavg(v0.ub,v31.ub):rn
[all...] |
| /external/llvm/test/MC/AArch64/ |
| neon-facge-facgt.s | 9 facge v0.4h, v31.4h, v16.4h
11 facge v0.2s, v31.2s, v16.2s
14 facle v0.4h, v16.4h, v31.4h
16 facle v0.2s, v16.2s, v31.2s
20 // CHECK: facge v0.4h, v31.4h, v16.4h // encoding: [0xe0,0x2f,0x50,0x2e]
22 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e]
25 // CHECK: facge v0.4h, v31.4h, v16.4h // encoding: [0xe0,0x2f,0x50,0x2e]
27 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e]
36 facgt v31.8h, v29.8h, v28.8h
37 facgt v31.4s, v29.4s, v28.4
[all...] |
| optional-hash.s | 14 // CHECK: fcmeq v0.2s, v31.2s, #0.0
15 fcmeq v0.2s, v31.2s, 0.0
|
| neon-frsqrt-frecp.s | 8 frsqrts v0.4h, v31.4h, v16.4h
10 frsqrts v0.2s, v31.2s, v16.2s
14 // CHECK: frsqrts v0.4h, v31.4h, v16.4h // encoding: [0xe0,0x3f,0xd0,0x0e]
16 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e]
24 frecps v31.8h, v29.8h, v28.8h
25 frecps v31.4s, v29.4s, v28.4s
30 // CHECK: frecps v31.8h, v29.8h, v28.8h // encoding: [0xbf,0x3f,0x5c,0x4e]
31 // CHECK: frecps v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xff,0x3c,0x4e]
|
| neon-compare-instructions.s | 10 cmeq v1.16b, v31.16b, v8.16b
15 cmeq v3.2d, v31.2d, v21.2d
18 // CHECK: cmeq v1.16b, v31.16b, v8.16b // encoding: [0xe1,0x8f,0x28,0x6e]
23 // CHECK: cmeq v3.2d, v31.2d, v21.2d // encoding: [0xe3,0x8f,0xf5,0x6e]
32 cmhs v1.16b, v31.16b, v8.16b
37 cmhs v3.2d, v31.2d, v21.2d
40 cmls v1.16b, v8.16b, v31.16b
45 cmls v3.2d, v21.2d, v31.2d
48 // CHECK: cmhs v1.16b, v31.16b, v8.16b // encoding: [0xe1,0x3f,0x28,0x6e]
53 // CHECK: cmhs v3.2d, v31.2d, v21.2d // encoding: [0xe3,0x3f,0xf5,0x6e
[all...] |
| neon-simd-ldst-multi-elem.s | 10 st1 { v31.4s }, [sp]
14 st1 { v31.2s }, [sp]
18 // CHECK: st1 { v31.4s }, [sp] // encoding: [0xff,0x7b,0x00,0x4c]
22 // CHECK: st1 { v31.2s }, [sp] // encoding: [0xff,0x7b,0x00,0x0c]
30 st1 { v31.4s, v0.4s }, [sp]
34 st1 { v31.2s, v0.2s }, [sp]
38 // CHECK: st1 { v31.4s, v0.4s }, [sp] // encoding: [0xff,0xab,0x00,0x4c]
42 // CHECK: st1 { v31.2s, v0.2s }, [sp] // encoding: [0xff,0xab,0x00,0x0c]
47 st1 { v31.4s-v0.4s }, [sp]
51 st1 { v31.2s-v0.2s }, [sp
[all...] |
| neon-simd-ldst-one-elem.s | 10 ld1r { v31.4s }, [sp]
14 ld1r { v31.2s }, [sp]
18 // CHECK: ld1r { v31.4s }, [sp] // encoding: [0xff,0xcb,0x40,0x4d]
22 // CHECK: ld1r { v31.2s }, [sp] // encoding: [0xff,0xcb,0x40,0x0d]
31 ld2r { v31.4s, v0.4s }, [sp]
35 ld2r { v31.2s, v0.2s }, [sp]
36 ld2r { v31.1d, v0.1d }, [sp]
39 // CHECK: ld2r { v31.4s, v0.4s }, [sp] // encoding: [0xff,0xcb,0x60,0x4d]
43 // CHECK: ld2r { v31.2s, v0.2s }, [sp] // encoding: [0xff,0xcb,0x60,0x0d]
44 // CHECK: ld2r { v31.1d, v0.1d }, [sp] // encoding: [0xff,0xcf,0x60,0x0d
[all...] |
| neon-mov.s | 13 movi v31.2s, #1, lsl #24
27 // CHECK: movi v31.2s, #{{0x1|1}}, lsl #24 // encoding: [0x3f,0x64,0x00,0x0f]
48 mvni v31.4s, #1, lsl #24
62 // CHECK: mvni v31.4s, #{{0x1|1}}, lsl #24 // encoding: [0x3f,0x64,0x00,0x6f]
83 bic v31.8h, #1, lsl #8
97 // CHECK: bic v31.8h, #{{0x1|1}}, lsl #8 // encoding: [0x3f,0xb4,0x00,0x6f]
111 orr v31.4h, #1
125 // CHECK: orr v31.4h, #{{0x1|1}} // encoding: [0x3f,0x94,0x00,0x0f]
136 movi v31.4s, #1, msl #16
141 // CHECK: movi v31.4s, #{{0x1|1}}, msl #16 // encoding: [0x3f,0xd4,0x00,0x4f
[all...] |
| neon-simd-post-ldst-multi-elem.s | 10 ld1 { v31.4s }, [sp], #16
14 ld1 { v31.2s }, [sp], #8
20 // CHECK: ld1 { v31.4s }, [sp], #16
28 // CHECK: ld1 { v31.2s }, [sp], #8
39 ld1 { v31.4s, v0.4s }, [sp], #32
43 ld1 { v31.2s, v0.2s }, [sp], #16
49 // CHECK: ld1 { v31.4s, v0.4s }, [sp], #32
57 // CHECK: ld1 { v31.2s, v0.2s }, [sp], #16
68 ld1 { v31.4s, v0.4s, v1.4s }, [sp], #48
72 ld1 { v31.2s, v0.2s, v1.2s }, [sp], #2
[all...] |
| fullfp16-neon-neg.s | 92 fcmeq v0.4h, v31.4h, v16.4h
98 fcmge v31.8h, v29.8h, v28.8h
102 fcmle v31.8h, v28.8h, v29.8h
104 fcmgt v0.4h, v31.4h, v16.4h
108 fcmlt v0.4h, v16.4h, v31.4h
112 fcmeq v0.4h, v31.4h, #0.0
116 fcmeq v0.4h, v31.4h, #0
122 fcmge v31.8h, v29.8h, #0.0
126 fcmge v31.8h, v29.8h, #0
128 fcmgt v0.4h, v31.4h, #0.
[all...] |
| neon-scalar-dup.s | 9 dup h5, v31.h[7]
21 // CHECK: {{dup|mov}} h5, v31.h[7] // encoding: [0xe5,0x07,0x1e,0x5e]
36 mov h5, v31.h[7]
48 // CHECK: {{dup|mov}} h5, v31.h[7] // encoding: [0xe5,0x07,0x1e,0x5e]
|
| neon-tbl.s | 13 tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b
19 // CHECK: tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x63,0x02,0x0e]
25 tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
31 // CHECK: tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x63,0x02,0x4e]
37 tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b
43 // CHECK: tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x73,0x02,0x0e]
49 tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
55 // CHECK: tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x73,0x02,0x4e]
|
| /external/llvm/test/MC/SystemZ/ |
| insn-good-z13.s | 22 #CHECK: vab %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf3]
23 #CHECK: vab %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf3]
24 #CHECK: vab %v31, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf3]
28 vab %v0, %v0, %v31
29 vab %v0, %v31, %v0
30 vab %v31, %v0, %v0
34 #CHECK: vaccb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf1]
35 #CHECK: vaccb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf1]
36 #CHECK: vaccb %v31, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf1]
40 vaccb %v0, %v0, %v31
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_luma_vert_w16inp_w16out.s | 214 smull v31.4s,v4.4h,v23.4h
215 smlal v31.4s,v3.4h,v22.4h
216 smlal v31.4s,v5.4h,v24.4h
217 smlal v31.4s,v6.4h,v25.4h
219 smlal v31.4s,v7.4h,v26.4h
221 smlal v31.4s,v16.4h,v27.4h
223 smlal v31.4s,v17.4h,v28.4h
225 smlal v31.4s,v18.4h,v29.4h
256 sub v31.4S, v31.4s, v30.4
[all...] |
| ihevc_sao_band_offset_luma.s | 106 dup v31.8b,w11 //band_pos
124 ADD v5.8b, v1.8b , v31.8b //band_table.val[0] = vadd_u8(band_table.val[0], band_pos)
127 ADD v6.8b, v2.8b , v31.8b //band_table.val[1] = vadd_u8(band_table.val[1], band_pos)
130 ADD v7.8b, v3.8b , v31.8b //band_table.val[2] = vadd_u8(band_table.val[2], band_pos)
133 ADD v21.8b, v4.8b , v31.8b //band_table.val[3] = vadd_u8(band_table.val[3], band_pos)
213 SUB v14.8b, v13.8b , v31.8b //vsub_u8(au1_cur_row, band_pos)
216 SUB v16.8b, v15.8b , v31.8b //vsub_u8(au1_cur_row, band_pos)
219 SUB v18.8b, v17.8b , v31.8b //vsub_u8(au1_cur_row, band_pos)
222 SUB v20.8b, v19.8b , v31.8b //vsub_u8(au1_cur_row, band_pos)
|
| /external/libavc/common/armv8/ |
| ih264_inter_pred_luma_horz_qpel_vert_qpel_av8.s | 136 movi v31.8b, #5 // Filter coeff 5
156 umlsl v24.8h, v2.8b, v31.8b
157 umlsl v24.8h, v8.8b, v31.8b
167 umlsl v28.8h, v19.8b, v31.8b
168 umlsl v28.8h, v22.8b, v31.8b
173 umlsl v24.8h, v3.8b, v31.8b
174 umlsl v24.8h, v9.8b, v31.8b
188 umlsl v24.8h, v19.8b, v31.8b
189 umlsl v24.8h, v22.8b, v31.8b
194 umlsl v16.8h, v4.8b, v31.8
[all...] |
| ih264_inter_pred_filters_luma_horz_av8.s | 128 ext v31.8b, v2.8b , v3.8b, #5 ////extract a[5] (column1,row0)
131 uaddl v8.8h, v31.8b, v2.8b //// a0 + a5 (column1,row0)
136 ext v31.8b, v2.8b , v3.8b, #2 ////extract a[2] (column1,row0)
139 umlal v8.8h, v31.8b, v1.8b //// a0 + a5 + 20a2 (column1,row0)
144 ext v31.8b, v2.8b , v3.8b, #3 ////extract a[3] (column1,row0)
147 umlal v8.8h, v31.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column1,row0)
152 ext v31.8b, v2.8b , v3.8b, #1 ////extract a[1] (column1,row0)
155 umlsl v8.8h, v31.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row0)
160 ext v31.8b, v2.8b , v3.8b, #4 ////extract a[4] (column1,row0)
163 umlsl v8.8h, v31.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row0
[all...] |
| /external/libavc/encoder/armv8/ |
| ih264e_half_pel_av8.s | 105 ext v31.8b, v2.8b , v3.8b , #5
108 uaddl v8.8h, v31.8b, v2.8b //// a0 + a5 (column1,row0)
118 ext v31.8b, v2.8b , v3.8b , #2
121 umlal v8.8h, v31.8b, v1.8b //// a0 + a5 + 20a2 (column1,row0)
131 ext v31.8b, v2.8b , v3.8b , #3
134 umlal v8.8h, v31.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column1,row0)
144 ext v31.8b, v2.8b , v3.8b , #1
147 umlsl v8.8h, v31.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row0)
157 ext v31.8b, v2.8b , v3.8b , #4
160 umlsl v8.8h, v31.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row0
[all...] |
| ime_distortion_metrics_av8.s | 307 addp v31.8h, v30.8h, v30.8h
308 uaddlp v31.4s, v31.8h
309 addp v31.2s, v31.2s, v31.2s
310 mov w6, v31.s[0]
356 addp v31.8h, v30.8h, v30.8h
357 uaddlp v31.4s, v31.8
[all...] |
