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      1 // RUN: llvm-mc -triple=arm64 -mattr=+neon -show-encoding < %s | FileCheck %s
      2 
      3 // Check that the assembler can handle the documented syntax for AArch64
      4 
      5 //------------------------------------------------------------------------------
      6 // Store multiple 1-element structures from one register
      7 //------------------------------------------------------------------------------
      8          st1 { v0.16b }, [x0]
      9          st1 { v15.8h }, [x15]
     10          st1 { v31.4s }, [sp]
     11          st1 { v0.2d }, [x0]
     12          st1 { v0.8b }, [x0]
     13          st1 { v15.4h }, [x15]
     14          st1 { v31.2s }, [sp]
     15          st1 { v0.1d }, [x0]
     16 // CHECK:	st1	{ v0.16b }, [x0]          // encoding: [0x00,0x70,0x00,0x4c]
     17 // CHECK:	st1	{ v15.8h }, [x15]         // encoding: [0xef,0x75,0x00,0x4c]
     18 // CHECK:	st1	{ v31.4s }, [sp]          // encoding: [0xff,0x7b,0x00,0x4c]
     19 // CHECK:	st1	{ v0.2d }, [x0]           // encoding: [0x00,0x7c,0x00,0x4c]
     20 // CHECK:	st1	{ v0.8b }, [x0]           // encoding: [0x00,0x70,0x00,0x0c]
     21 // CHECK:	st1	{ v15.4h }, [x15]         // encoding: [0xef,0x75,0x00,0x0c]
     22 // CHECK:	st1	{ v31.2s }, [sp]          // encoding: [0xff,0x7b,0x00,0x0c]
     23 // CHECK:	st1	{ v0.1d }, [x0]           // encoding: [0x00,0x7c,0x00,0x0c]
     24 
     25 //------------------------------------------------------------------------------
     26 // Store multiple 1-element structures from two consecutive registers
     27 //------------------------------------------------------------------------------
     28          st1 { v0.16b, v1.16b }, [x0]
     29          st1 { v15.8h, v16.8h }, [x15]
     30          st1 { v31.4s, v0.4s }, [sp]
     31          st1 { v0.2d, v1.2d }, [x0]
     32          st1 { v0.8b, v1.8b }, [x0]
     33          st1 { v15.4h, v16.4h }, [x15]
     34          st1 { v31.2s, v0.2s }, [sp]
     35          st1 { v0.1d, v1.1d }, [x0]
     36 // CHECK:	st1	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0xa0,0x00,0x4c]
     37 // CHECK:	st1	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x00,0x4c]
     38 // CHECK:	st1	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0xab,0x00,0x4c]
     39 // CHECK:	st1	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0xac,0x00,0x4c]
     40 // CHECK:	st1	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0xa0,0x00,0x0c]
     41 // CHECK:	st1	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x00,0x0c]
     42 // CHECK:	st1	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0xab,0x00,0x0c]
     43 // CHECK:	st1	{ v0.1d, v1.1d }, [x0]    // encoding: [0x00,0xac,0x00,0x0c]
     44 
     45          st1 { v0.16b-v1.16b }, [x0]
     46          st1 { v15.8h-v16.8h }, [x15]
     47          st1 { v31.4s-v0.4s }, [sp]
     48          st1 { v0.2d-v1.2d }, [x0]
     49          st1 { v0.8b-v1.8b }, [x0]
     50          st1 { v15.4h-v16.4h }, [x15]
     51          st1 { v31.2s-v0.2s }, [sp]
     52          st1 { v0.1d-v1.1d }, [x0]
     53 // CHECK:	st1	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0xa0,0x00,0x4c]
     54 // CHECK:	st1	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x00,0x4c]
     55 // CHECK:	st1	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0xab,0x00,0x4c]
     56 // CHECK:	st1	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0xac,0x00,0x4c]
     57 // CHECK:	st1	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0xa0,0x00,0x0c]
     58 // CHECK:	st1	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x00,0x0c]
     59 // CHECK:	st1	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0xab,0x00,0x0c]
     60 // CHECK:	st1	{ v0.1d, v1.1d }, [x0]    // encoding: [0x00,0xac,0x00,0x0c]
     61 
     62 //------------------------------------------------------------------------------
     63 // Store multiple 1-element structures from three consecutive registers
     64 //------------------------------------------------------------------------------
     65          st1 { v0.16b, v1.16b, v2.16b }, [x0]
     66          st1 { v15.8h, v16.8h, v17.8h }, [x15]
     67          st1 { v31.4s, v0.4s, v1.4s }, [sp]
     68          st1 { v0.2d, v1.2d, v2.2d }, [x0]
     69          st1 { v0.8b, v1.8b, v2.8b }, [x0]
     70          st1 { v15.4h, v16.4h, v17.4h }, [x15]
     71          st1 { v31.2s, v0.2s, v1.2s }, [sp]
     72          st1 { v0.1d, v1.1d, v2.1d }, [x0]
     73 // CHECK:	st1	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x60,0x00,0x4c]
     74 // CHECK:	st1	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x65,0x00,0x4c]
     75 // CHECK:	st1	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x6b,0x00,0x4c]
     76 // CHECK:	st1	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x6c,0x00,0x4c]
     77 // CHECK:	st1	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x60,0x00,0x0c]
     78 // CHECK:	st1	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x65,0x00,0x0c]
     79 // CHECK:	st1	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x6b,0x00,0x0c]
     80 // CHECK:	st1	{ v0.1d, v1.1d, v2.1d }, [x0] // encoding: [0x00,0x6c,0x00,0x0c]
     81 
     82          st1 { v0.16b-v2.16b }, [x0]
     83          st1 { v15.8h-v17.8h }, [x15]
     84          st1 { v31.4s-v1.4s }, [sp]
     85          st1 { v0.2d-v2.2d }, [x0]
     86          st1 { v0.8b-v2.8b }, [x0]
     87          st1 { v15.4h-v17.4h }, [x15]
     88          st1 { v31.2s-v1.2s }, [sp]
     89          st1 { v0.1d-v2.1d }, [x0]
     90 // CHECK:	st1	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x60,0x00,0x4c]
     91 // CHECK:	st1	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x65,0x00,0x4c]
     92 // CHECK:	st1	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x6b,0x00,0x4c]
     93 // CHECK:	st1	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x6c,0x00,0x4c]
     94 // CHECK:	st1	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x60,0x00,0x0c]
     95 // CHECK:	st1	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x65,0x00,0x0c]
     96 // CHECK:	st1	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x6b,0x00,0x0c]
     97 // CHECK:	st1	{ v0.1d, v1.1d, v2.1d }, [x0] // encoding: [0x00,0x6c,0x00,0x0c]
     98 
     99 //------------------------------------------------------------------------------
    100 // Store multiple 1-element structures from four consecutive registers
    101 //------------------------------------------------------------------------------
    102          st1 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
    103          st1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
    104          st1 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
    105          st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
    106          st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
    107          st1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
    108          st1 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
    109          st1 { v0.1d, v1.1d, v2.1d, v3.1d }, [x0]
    110 // CHECK:	st1	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x20,0x00,0x4c]
    111 // CHECK:	st1	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x25,0x00,0x4c]
    112 // CHECK:	st1	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x2b,0x00,0x4c]
    113 // CHECK:	st1	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x2c,0x00,0x4c]
    114 // CHECK:	st1	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x20,0x00,0x0c]
    115 // CHECK:	st1	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x25,0x00,0x0c]
    116 // CHECK:	st1	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x2b,0x00,0x0c]
    117 // CHECK:	st1	{ v0.1d, v1.1d, v2.1d, v3.1d }, [x0] // encoding: [0x00,0x2c,0x00,0x0c]
    118 
    119          st1 { v0.16b-v3.16b }, [x0]
    120          st1 { v15.8h-v18.8h }, [x15]
    121          st1 { v31.4s-v2.4s }, [sp]
    122          st1 { v0.2d-v3.2d }, [x0]
    123          st1 { v0.8b-v3.8b }, [x0]
    124          st1 { v15.4h-v18.4h }, [x15]
    125          st1 { v31.2s-v2.2s }, [sp]
    126          st1 { v0.1d-v3.1d }, [x0]
    127 // CHECK:	st1	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x20,0x00,0x4c]
    128 // CHECK:	st1	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x25,0x00,0x4c]
    129 // CHECK:	st1	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x2b,0x00,0x4c]
    130 // CHECK:	st1	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x2c,0x00,0x4c]
    131 // CHECK:	st1	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x20,0x00,0x0c]
    132 // CHECK:	st1	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x25,0x00,0x0c]
    133 // CHECK:	st1	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x2b,0x00,0x0c]
    134 // CHECK:	st1	{ v0.1d, v1.1d, v2.1d, v3.1d }, [x0] // encoding: [0x00,0x2c,0x00,0x0c]
    135 
    136 //------------------------------------------------------------------------------
    137 // Store multiple 2-element structures from two consecutive registers
    138 //------------------------------------------------------------------------------
    139          st2 { v0.16b, v1.16b }, [x0]
    140          st2 { v15.8h, v16.8h }, [x15]
    141          st2 { v31.4s, v0.4s }, [sp]
    142          st2 { v0.2d, v1.2d }, [x0]
    143          st2 { v0.8b, v1.8b }, [x0]
    144          st2 { v15.4h, v16.4h }, [x15]
    145          st2 { v31.2s, v0.2s }, [sp]
    146 // CHECK:	st2	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0x80,0x00,0x4c]
    147 // CHECK:	st2	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0x85,0x00,0x4c]
    148 // CHECK:	st2	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0x8b,0x00,0x4c]
    149 // CHECK:	st2	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0x8c,0x00,0x4c]
    150 // CHECK:	st2	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0x80,0x00,0x0c]
    151 // CHECK:	st2	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0x85,0x00,0x0c]
    152 // CHECK:	st2	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0x8b,0x00,0x0c]
    153 
    154          st2 { v0.16b-v1.16b }, [x0]
    155          st2 { v15.8h-v16.8h }, [x15]
    156          st2 { v31.4s-v0.4s }, [sp]
    157          st2 { v0.2d-v1.2d }, [x0]
    158          st2 { v0.8b-v1.8b }, [x0]
    159          st2 { v15.4h-v16.4h }, [x15]
    160          st2 { v31.2s-v0.2s }, [sp]
    161 // CHECK:	st2	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0x80,0x00,0x4c]
    162 // CHECK:	st2	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0x85,0x00,0x4c]
    163 // CHECK:	st2	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0x8b,0x00,0x4c]
    164 // CHECK:	st2	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0x8c,0x00,0x4c]
    165 // CHECK:	st2	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0x80,0x00,0x0c]
    166 // CHECK:	st2	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0x85,0x00,0x0c]
    167 // CHECK:	st2	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0x8b,0x00,0x0c]
    168 
    169 //------------------------------------------------------------------------------
    170 // Store multiple 3-element structures from three consecutive registers
    171 //------------------------------------------------------------------------------
    172          st3 { v0.16b, v1.16b, v2.16b }, [x0]
    173          st3 { v15.8h, v16.8h, v17.8h }, [x15]
    174          st3 { v31.4s, v0.4s, v1.4s }, [sp]
    175          st3 { v0.2d, v1.2d, v2.2d }, [x0]
    176          st3 { v0.8b, v1.8b, v2.8b }, [x0]
    177          st3 { v15.4h, v16.4h, v17.4h }, [x15]
    178          st3 { v31.2s, v0.2s, v1.2s }, [sp]
    179 // CHECK:	st3	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x40,0x00,0x4c]
    180 // CHECK:	st3	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x45,0x00,0x4c]
    181 // CHECK:	st3	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x4b,0x00,0x4c]
    182 // CHECK:	st3	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x4c,0x00,0x4c]
    183 // CHECK:	st3	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x40,0x00,0x0c]
    184 // CHECK:	st3	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x45,0x00,0x0c]
    185 // CHECK:	st3	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x4b,0x00,0x0c]
    186 
    187          st3 { v0.16b-v2.16b }, [x0]
    188          st3 { v15.8h-v17.8h }, [x15]
    189          st3 { v31.4s-v1.4s }, [sp]
    190          st3 { v0.2d-v2.2d }, [x0]
    191          st3 { v0.8b-v2.8b }, [x0]
    192          st3 { v15.4h-v17.4h }, [x15]
    193          st3 { v31.2s-v1.2s }, [sp]
    194 // CHECK:	st3	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x40,0x00,0x4c]
    195 // CHECK:	st3	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x45,0x00,0x4c]
    196 // CHECK:	st3	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x4b,0x00,0x4c]
    197 // CHECK:	st3	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x4c,0x00,0x4c]
    198 // CHECK:	st3	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x40,0x00,0x0c]
    199 // CHECK:	st3	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x45,0x00,0x0c]
    200 // CHECK:	st3	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x4b,0x00,0x0c]
    201 
    202 //------------------------------------------------------------------------------
    203 // Store multiple 4-element structures from four consecutive registers
    204 //------------------------------------------------------------------------------
    205          st4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
    206          st4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
    207          st4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
    208          st4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
    209          st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
    210          st4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
    211          st4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
    212 // CHECK:	st4	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x00,0x00,0x4c]
    213 // CHECK:	st4	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x05,0x00,0x4c]
    214 // CHECK:	st4	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x0b,0x00,0x4c]
    215 // CHECK:	st4	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x0c,0x00,0x4c]
    216 // CHECK:	st4	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x00,0x00,0x0c]
    217 // CHECK:	st4	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x05,0x00,0x0c]
    218 // CHECK:	st4	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x0b,0x00,0x0c]
    219 
    220          st4 { v0.16b-v3.16b }, [x0]
    221          st4 { v15.8h-v18.8h }, [x15]
    222          st4 { v31.4s-v2.4s }, [sp]
    223          st4 { v0.2d-v3.2d }, [x0]
    224          st4 { v0.8b-v3.8b }, [x0]
    225          st4 { v15.4h-v18.4h }, [x15]
    226          st4 { v31.2s-v2.2s }, [sp]
    227 // CHECK:	st4	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x00,0x00,0x4c]
    228 // CHECK:	st4	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x05,0x00,0x4c]
    229 // CHECK:	st4	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x0b,0x00,0x4c]
    230 // CHECK:	st4	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x0c,0x00,0x4c]
    231 // CHECK:	st4	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x00,0x00,0x0c]
    232 // CHECK:	st4	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x05,0x00,0x0c]
    233 // CHECK:	st4	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x0b,0x00,0x0c]
    234 
    235 //------------------------------------------------------------------------------
    236 // Load multiple 1-element structures to one register
    237 //------------------------------------------------------------------------------
    238          ld1 { v0.16b }, [x0]
    239          ld1 { v15.8h }, [x15]
    240          ld1 { v31.4s }, [sp]
    241          ld1 { v0.2d }, [x0]
    242          ld1 { v0.8b }, [x0]
    243          ld1 { v15.4h }, [x15]
    244          ld1 { v31.2s }, [sp]
    245          ld1 { v0.1d }, [x0]
    246 // CHECK:	ld1	{ v0.16b }, [x0]          // encoding: [0x00,0x70,0x40,0x4c]
    247 // CHECK:	ld1	{ v15.8h }, [x15]         // encoding: [0xef,0x75,0x40,0x4c]
    248 // CHECK:	ld1	{ v31.4s }, [sp]          // encoding: [0xff,0x7b,0x40,0x4c]
    249 // CHECK:	ld1	{ v0.2d }, [x0]           // encoding: [0x00,0x7c,0x40,0x4c]
    250 // CHECK:	ld1	{ v0.8b }, [x0]           // encoding: [0x00,0x70,0x40,0x0c]
    251 // CHECK:	ld1	{ v15.4h }, [x15]         // encoding: [0xef,0x75,0x40,0x0c]
    252 // CHECK:	ld1	{ v31.2s }, [sp]          // encoding: [0xff,0x7b,0x40,0x0c]
    253 // CHECK:	ld1	{ v0.1d }, [x0]           // encoding: [0x00,0x7c,0x40,0x0c]
    254 
    255 //------------------------------------------------------------------------------
    256 // Load multiple 1-element structures to two consecutive registers
    257 //------------------------------------------------------------------------------
    258          ld1 { v0.16b, v1.16b }, [x0]
    259          ld1 { v15.8h, v16.8h }, [x15]
    260          ld1 { v31.4s, v0.4s }, [sp]
    261          ld1 { v0.2d, v1.2d }, [x0]
    262          ld1 { v0.8b, v1.8b }, [x0]
    263          ld1 { v15.4h, v16.4h }, [x15]
    264          ld1 { v31.2s, v0.2s }, [sp]
    265          ld1 { v0.1d, v1.1d }, [x0]
    266 // CHECK:	ld1	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0xa0,0x40,0x4c]
    267 // CHECK:	ld1	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x40,0x4c]
    268 // CHECK:	ld1	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0xab,0x40,0x4c]
    269 // CHECK:	ld1	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0xac,0x40,0x4c]
    270 // CHECK:	ld1	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0xa0,0x40,0x0c]
    271 // CHECK:	ld1	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x40,0x0c]
    272 // CHECK:	ld1	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0xab,0x40,0x0c]
    273 // CHECK:	ld1	{ v0.1d, v1.1d }, [x0]    // encoding: [0x00,0xac,0x40,0x0c]
    274 
    275          ld1 { v0.16b-v1.16b }, [x0]
    276          ld1 { v15.8h-v16.8h }, [x15]
    277          ld1 { v31.4s-v0.4s }, [sp]
    278          ld1 { v0.2d-v1.2d }, [x0]
    279          ld1 { v0.8b-v1.8b }, [x0]
    280          ld1 { v15.4h-v16.4h }, [x15]
    281          ld1 { v31.2s-v0.2s }, [sp]
    282          ld1 { v0.1d-v1.1d }, [x0]
    283 // CHECK:	ld1	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0xa0,0x40,0x4c]
    284 // CHECK:	ld1	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x40,0x4c]
    285 // CHECK:	ld1	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0xab,0x40,0x4c]
    286 // CHECK:	ld1	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0xac,0x40,0x4c]
    287 // CHECK:	ld1	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0xa0,0x40,0x0c]
    288 // CHECK:	ld1	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x40,0x0c]
    289 // CHECK:	ld1	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0xab,0x40,0x0c]
    290 // CHECK:	ld1	{ v0.1d, v1.1d }, [x0]    // encoding: [0x00,0xac,0x40,0x0c]
    291 
    292 //------------------------------------------------------------------------------
    293 // Load multiple 1-element structures to three consecutive registers
    294 //------------------------------------------------------------------------------
    295          ld1 { v0.16b, v1.16b, v2.16b }, [x0]
    296          ld1 { v15.8h, v16.8h, v17.8h }, [x15]
    297          ld1 { v31.4s, v0.4s, v1.4s }, [sp]
    298          ld1 { v0.2d, v1.2d, v2.2d }, [x0]
    299          ld1 { v0.8b, v1.8b, v2.8b }, [x0]
    300          ld1 { v15.4h, v16.4h, v17.4h }, [x15]
    301          ld1 { v31.2s, v0.2s, v1.2s }, [sp]
    302          ld1 { v0.1d, v1.1d, v2.1d }, [x0]
    303 // CHECK:	ld1	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x60,0x40,0x4c]
    304 // CHECK:	ld1	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x65,0x40,0x4c]
    305 // CHECK:	ld1	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x6b,0x40,0x4c]
    306 // CHECK:	ld1	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x6c,0x40,0x4c]
    307 // CHECK:	ld1	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x60,0x40,0x0c]
    308 // CHECK:	ld1	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x65,0x40,0x0c]
    309 // CHECK:	ld1	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x6b,0x40,0x0c]
    310 // CHECK:	ld1	{ v0.1d, v1.1d, v2.1d }, [x0] // encoding: [0x00,0x6c,0x40,0x0c]
    311 
    312          ld1 { v0.16b-v2.16b }, [x0]
    313          ld1 { v15.8h-v17.8h }, [x15]
    314          ld1 { v31.4s-v1.4s }, [sp]
    315          ld1 { v0.2d-v2.2d }, [x0]
    316          ld1 { v0.8b-v2.8b }, [x0]
    317          ld1 { v15.4h-v17.4h }, [x15]
    318          ld1 { v31.2s-v1.2s }, [sp]
    319          ld1 { v0.1d-v2.1d }, [x0]
    320 // CHECK:	ld1	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x60,0x40,0x4c]
    321 // CHECK:	ld1	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x65,0x40,0x4c]
    322 // CHECK:	ld1	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x6b,0x40,0x4c]
    323 // CHECK:	ld1	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x6c,0x40,0x4c]
    324 // CHECK:	ld1	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x60,0x40,0x0c]
    325 // CHECK:	ld1	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x65,0x40,0x0c]
    326 // CHECK:	ld1	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x6b,0x40,0x0c]
    327 // CHECK:	ld1	{ v0.1d, v1.1d, v2.1d }, [x0] // encoding: [0x00,0x6c,0x40,0x0c]
    328 
    329 //------------------------------------------------------------------------------
    330 // Load multiple 1-element structures to four consecutive registers
    331 //------------------------------------------------------------------------------
    332          ld1 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
    333          ld1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
    334          ld1 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
    335          ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
    336          ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
    337          ld1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
    338          ld1 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
    339          ld1 { v0.1d, v1.1d, v2.1d, v3.1d }, [x0]
    340 // CHECK:	ld1	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x20,0x40,0x4c]
    341 // CHECK:	ld1	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x25,0x40,0x4c]
    342 // CHECK:	ld1	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x2b,0x40,0x4c]
    343 // CHECK:	ld1	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x2c,0x40,0x4c]
    344 // CHECK:	ld1	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x20,0x40,0x0c]
    345 // CHECK:	ld1	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x25,0x40,0x0c]
    346 // CHECK:	ld1	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x2b,0x40,0x0c]
    347 // CHECK:	ld1	{ v0.1d, v1.1d, v2.1d, v3.1d }, [x0] // encoding: [0x00,0x2c,0x40,0x0c]
    348 
    349          ld1 { v0.16b-v3.16b }, [x0]
    350          ld1 { v15.8h-v18.8h }, [x15]
    351          ld1 { v31.4s-v2.4s }, [sp]
    352          ld1 { v0.2d-v3.2d }, [x0]
    353          ld1 { v0.8b-v3.8b }, [x0]
    354          ld1 { v15.4h-v18.4h }, [x15]
    355          ld1 { v31.2s-v2.2s }, [sp]
    356          ld1 { v0.1d-v3.1d }, [x0]
    357 // CHECK:	ld1	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x20,0x40,0x4c]
    358 // CHECK:	ld1	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x25,0x40,0x4c]
    359 // CHECK:	ld1	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x2b,0x40,0x4c]
    360 // CHECK:	ld1	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x2c,0x40,0x4c]
    361 // CHECK:	ld1	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x20,0x40,0x0c]
    362 // CHECK:	ld1	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x25,0x40,0x0c]
    363 // CHECK:	ld1	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x2b,0x40,0x0c]
    364 // CHECK:	ld1	{ v0.1d, v1.1d, v2.1d, v3.1d }, [x0] // encoding: [0x00,0x2c,0x40,0x0c]
    365 
    366 //------------------------------------------------------------------------------
    367 // Load multiple 4-element structures to two consecutive registers
    368 //------------------------------------------------------------------------------
    369          ld2 { v0.16b, v1.16b }, [x0]
    370          ld2 { v15.8h, v16.8h }, [x15]
    371          ld2 { v31.4s, v0.4s }, [sp]
    372          ld2 { v0.2d, v1.2d }, [x0]
    373          ld2 { v0.8b, v1.8b }, [x0]
    374          ld2 { v15.4h, v16.4h }, [x15]
    375          ld2 { v31.2s, v0.2s }, [sp]
    376 // CHECK:	ld2	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0x80,0x40,0x4c]
    377 // CHECK:	ld2	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0x85,0x40,0x4c]
    378 // CHECK:	ld2	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0x8b,0x40,0x4c]
    379 // CHECK:	ld2	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0x8c,0x40,0x4c]
    380 // CHECK:	ld2	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0x80,0x40,0x0c]
    381 // CHECK:	ld2	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0x85,0x40,0x0c]
    382 // CHECK:	ld2	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0x8b,0x40,0x0c]
    383 
    384          ld2 { v0.16b-v1.16b }, [x0]
    385          ld2 { v15.8h-v16.8h }, [x15]
    386          ld2 { v31.4s-v0.4s }, [sp]
    387          ld2 { v0.2d-v1.2d }, [x0]
    388          ld2 { v0.8b-v1.8b }, [x0]
    389          ld2 { v15.4h-v16.4h }, [x15]
    390          ld2 { v31.2s-v0.2s }, [sp]
    391 // CHECK:	ld2	{ v0.16b, v1.16b }, [x0]  // encoding: [0x00,0x80,0x40,0x4c]
    392 // CHECK:	ld2	{ v15.8h, v16.8h }, [x15] // encoding: [0xef,0x85,0x40,0x4c]
    393 // CHECK:	ld2	{ v31.4s, v0.4s }, [sp]   // encoding: [0xff,0x8b,0x40,0x4c]
    394 // CHECK:	ld2	{ v0.2d, v1.2d }, [x0]    // encoding: [0x00,0x8c,0x40,0x4c]
    395 // CHECK:	ld2	{ v0.8b, v1.8b }, [x0]    // encoding: [0x00,0x80,0x40,0x0c]
    396 // CHECK:	ld2	{ v15.4h, v16.4h }, [x15] // encoding: [0xef,0x85,0x40,0x0c]
    397 // CHECK:	ld2	{ v31.2s, v0.2s }, [sp]   // encoding: [0xff,0x8b,0x40,0x0c]
    398 
    399 //------------------------------------------------------------------------------
    400 // Load multiple 3-element structures to three consecutive registers
    401 //------------------------------------------------------------------------------
    402          ld3 { v0.16b, v1.16b, v2.16b }, [x0]
    403          ld3 { v15.8h, v16.8h, v17.8h }, [x15]
    404          ld3 { v31.4s, v0.4s, v1.4s }, [sp]
    405          ld3 { v0.2d, v1.2d, v2.2d }, [x0]
    406          ld3 { v0.8b, v1.8b, v2.8b }, [x0]
    407          ld3 { v15.4h, v16.4h, v17.4h }, [x15]
    408          ld3 { v31.2s, v0.2s, v1.2s }, [sp]
    409 // CHECK:	ld3	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x40,0x40,0x4c]
    410 // CHECK:	ld3	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x45,0x40,0x4c]
    411 // CHECK:	ld3	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x4b,0x40,0x4c]
    412 // CHECK:	ld3	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x4c,0x40,0x4c]
    413 // CHECK:	ld3	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x40,0x40,0x0c]
    414 // CHECK:	ld3	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x45,0x40,0x0c]
    415 // CHECK:	ld3	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x4b,0x40,0x0c]
    416 
    417          ld3 { v0.16b-v2.16b }, [x0]
    418          ld3 { v15.8h-v17.8h }, [x15]
    419          ld3 { v31.4s-v1.4s }, [sp]
    420          ld3 { v0.2d-v2.2d }, [x0]
    421          ld3 { v0.8b-v2.8b }, [x0]
    422          ld3 { v15.4h-v17.4h }, [x15]
    423          ld3 { v31.2s-v1.2s }, [sp]
    424 // CHECK:	ld3	{ v0.16b, v1.16b, v2.16b }, [x0] // encoding: [0x00,0x40,0x40,0x4c]
    425 // CHECK:	ld3	{ v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0x45,0x40,0x4c]
    426 // CHECK:	ld3	{ v31.4s, v0.4s, v1.4s }, [sp] // encoding: [0xff,0x4b,0x40,0x4c]
    427 // CHECK:	ld3	{ v0.2d, v1.2d, v2.2d }, [x0] // encoding: [0x00,0x4c,0x40,0x4c]
    428 // CHECK:	ld3	{ v0.8b, v1.8b, v2.8b }, [x0] // encoding: [0x00,0x40,0x40,0x0c]
    429 // CHECK:	ld3	{ v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0x45,0x40,0x0c]
    430 // CHECK:	ld3	{ v31.2s, v0.2s, v1.2s }, [sp] // encoding: [0xff,0x4b,0x40,0x0c]
    431 
    432 //------------------------------------------------------------------------------
    433 // Load multiple 4-element structures to four consecutive registers
    434 //------------------------------------------------------------------------------
    435          ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
    436          ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
    437          ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
    438          ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
    439          ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
    440          ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
    441          ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
    442 // CHECK:	ld4	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x00,0x40,0x4c]
    443 // CHECK:	ld4	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x05,0x40,0x4c]
    444 // CHECK:	ld4	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x0b,0x40,0x4c]
    445 // CHECK:	ld4	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x0c,0x40,0x4c]
    446 // CHECK:	ld4	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x00,0x40,0x0c]
    447 // CHECK:	ld4	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x05,0x40,0x0c]
    448 // CHECK:	ld4	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x0b,0x40,0x0c]
    449 
    450          ld4 { v0.16b-v3.16b }, [x0]
    451          ld4 { v15.8h-v18.8h }, [x15]
    452          ld4 { v31.4s-v2.4s }, [sp]
    453          ld4 { v0.2d-v3.2d }, [x0]
    454          ld4 { v0.8b-v3.8b }, [x0]
    455          ld4 { v15.4h-v18.4h }, [x15]
    456          ld4 { v31.2s-v2.2s }, [sp]
    457 // CHECK:	ld4	{ v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x00,0x40,0x4c]
    458 // CHECK:	ld4	{ v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x05,0x40,0x4c]
    459 // CHECK:	ld4	{ v31.4s, v0.4s, v1.4s, v2.4s }, [sp] // encoding: [0xff,0x0b,0x40,0x4c]
    460 // CHECK:	ld4	{ v0.2d, v1.2d, v2.2d, v3.2d }, [x0] // encoding: [0x00,0x0c,0x40,0x4c]
    461 // CHECK:	ld4	{ v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x00,0x40,0x0c]
    462 // CHECK:	ld4	{ v15.4h, v16.4h, v17.4h, v18.4h }, [x15] // encoding: [0xef,0x05,0x40,0x0c]
    463 // CHECK:	ld4	{ v31.2s, v0.2s, v1.2s, v2.2s }, [sp] // encoding: [0xff,0x0b,0x40,0x0c]
    464