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  /external/v8/src/ia32/
assembler-ia32.h 266 // Machine instruction Immediates
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  /external/vixl/src/vixl/a64/
constants-a64.h 119 /* Other immediates */ \
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assembler-a64.h     [all...]
  /toolchain/binutils/binutils-2.25/cpu/
fr30.cpu 419 (comment "immediates have an optional '#' prefix")
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  /toolchain/binutils/binutils-2.25/opcodes/
ChangeLog-2005 465 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
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  /external/llvm/lib/Target/AMDGPU/
AMDGPUISelLowering.cpp 425 // The backend supports 32 and 64 bit floating point immediates.
426 // FIXME: Why are we reporting vectors of FP immediates as legal?
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  /external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.td 323 // Combines the two immediates into a double register.
699 // C2_muxii: Scalar mux immediates.
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HexagonInstrInfoV4.td 318 // The complexity of the combines involving immediates should be greater
328 // A4_combineii: Set two small immediates.
344 // The complexity of the combine with two immediates should be greater than
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HexagonHardwareLoops.cpp 738 // Both, start and end are immediates.
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  /toolchain/binutils/binutils-2.25/gas/config/
tc-xtensa.c     [all...]
tc-metag.c 71 /* Immediates must be prefixed with a hash. */
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  /external/llvm/test/MC/AArch64/
basic-a64-diagnostics.s 78 // Out of range immediates: more than 12 bits
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  /external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp     [all...]
AArch64ISelDAGToDAG.cpp 637 // selected here doesn't support labels/immediates, only base+offset.
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AArch64InstrInfo.cpp     [all...]
  /external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp     [all...]
  /external/llvm/lib/Transforms/Scalar/
LoopStrengthReduce.cpp 244 /// satisfying a use. It may include broken-out immediates and scaled registers.
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  /external/v8/src/crankshaft/x64/
lithium-codegen-x64.cc     [all...]
  /external/valgrind/VEX/priv/
host_mips_isel.c 231 immediate; this guaranteed that all signed immediates that are
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  /external/clang/utils/TableGen/
NeonEmitter.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMInstrVFP.td     [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp     [all...]
  /external/llvm/lib/Target/Hexagon/AsmParser/
HexagonAsmParser.cpp 753 // For instruction aliases, immediates are generated rather than
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  /external/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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