| /external/llvm/lib/Target/NVPTX/ |
| NVPTXReplaceImageHandles.cpp | 134 const MachineRegisterInfo &MRI = MF.getRegInfo();
140 MachineInstr &TexHandleDef = *MRI.getVRegDef(Op.getReg());
|
| /external/llvm/lib/Target/ |
| TargetMachine.cpp | 44 TargetFS(FS), CodeGenInfo(nullptr), AsmInfo(nullptr), MRI(nullptr),
51 delete MRI;
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 208 const MachineRegisterInfo *MRI) const override;
265 const MachineRegisterInfo *MRI) const override;
279 unsigned Reg, MachineRegisterInfo *MRI) const override;
340 const MachineRegisterInfo *MRI,
458 const MachineRegisterInfo &MRI);
483 const ARMBaseRegisterInfo& MRI,
|
| Thumb1FrameLowering.cpp | 45 const ThumbRegisterInfo &MRI,
48 MRI, MIFlags);
92 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
229 nullptr, MRI->getDwarfRegNum(Reg, true), MFI->getObjectOffset(FI)));
247 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
254 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
|
| ThumbRegisterInfo.cpp | 130 const ARMBaseRegisterInfo& MRI,
147 if (!isARMLowRegister(DestReg) && !MRI.isVirtualRegister(DestReg))
159 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes,
185 const ARMBaseRegisterInfo& MRI,
297 TII, MRI, MIFlags);
|
| /toolchain/binutils/binutils-2.25/gas/ |
| NEWS | 443 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
444 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
445 ``.mri 0'' is seen; this can be convenient for inline assembler code.
|
| ChangeLog-9295 | 222 * config/m68k-parse.y (yylex): In MRI mode, '@' can start an octal
224 * expr.c (operand): Handle MRI suffixes after unadorned 0.
691 * cond.c (s_endif): Call demand_empty_rest_of_line. In MRI mode,
695 (s_include): In MRI mode, skip characters after the file name.
699 * config/m68k-parse.y (m68k_reg_parse): In MRI mode, permit
710 Add some support for i960 MRI compatibility mode.
719 TC_I960, in MRI mode permit `sizeof secname' and `startof
723 (expr_begin): Only do MRI changes if TC_M68K.
733 (s_org): Only punt in MRI mode if TC_M68K.
758 * doc/as.texinfo: Document i960 MRI mode
[all...] |
| macro.c | 57 /* Whether we are in MRI mode. */
76 macro_init (int alternate, int mri, int strip_at,
82 macro_mri = mri;
95 /* Switch in and out of MRI mode on the fly. */
98 macro_mri_mode (int mri)
100 macro_mri = mri;
599 /* The same MRI assemblers which treat '@' characters also use
974 but we can't, because the == might be in the MRI
975 comment field, and, since the nature of the MRI
1308 /* Handle the MRI IRP and IRPC pseudo-ops. These are handled as
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 62 const MCRegisterInfo &MRI)
63 : MCInstPrinter(MAI, MII, MRI) {}
277 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID);
287 NewReg = MCOperand::createReg(MRI.getMatchingSuperReg(
288 Reg, ARM::gsub_0, &MRI.getRegClass(ARM::GPRPairRegClassID)));
761 printRegName(O, MRI.getSubReg(Reg, ARM::gsub_0));
763 printRegName(O, MRI.getSubReg(Reg, ARM::gsub_1));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 155 const MachineRegisterInfo *MRI =
157 IsRegCR = MRI->getRegClass(Reg)->hasSuperClassEq(&PPC::CRRCRegClass) ||
158 MRI->getRegClass(Reg)->hasSuperClassEq(&PPC::CRBITRCRegClass);
699 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
701 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
734 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
736 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
771 if (MRI.getRegClass(FirstReg)->contains(PPC::R0) |
[all...] |
| /external/llvm/lib/CodeGen/ |
| EarlyIfConversion.cpp | 84 MachineRegisterInfo *MRI;
158 MRI = &MF.getRegInfo();
245 MachineInstr *DefMI = MRI->getVRegDef(Reg);
491 DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst));
593 MachineRegisterInfo *MRI;
796 MRI = &MF.getRegInfo();
|
| RegAllocGreedy.cpp | 215 ExtraRegInfo.resize(MRI->getNumVirtRegs());
221 ExtraRegInfo.resize(MRI->getNumVirtRegs());
564 const TargetRegisterClass &RC = *MRI->getRegClass(Reg);
631 if (unsigned Hint = MRI->getSimpleHint(VirtReg.reg))
765 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg)) <
766 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(Intf->reg)));
[all...] |
| RegisterScavenging.cpp | 70 MRI = &MF.getRegInfo();
77 assert(MRI->tracksLiveness() &&
242 isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&
|
| TargetRegisterInfo.cpp | 343 const MachineRegisterInfo &MRI = MF.getRegInfo();
344 std::pair<unsigned, unsigned> Hint = MRI.getRegAllocationHint(VirtReg);
359 if (MRI.isReserved(Phys))
|
| /external/llvm/lib/Target/X86/ |
| X86CallFrameOptimization.cpp | 108 const MachineRegisterInfo *MRI;
225 MRI = &MF.getRegInfo();
513 if (MRI->use_empty(Context.SPCopy->getOperand(0).getReg()))
540 if (!MRI->hasOneNonDBGUse(Reg))
543 MachineBasicBlock::iterator DefMI = MRI->getVRegDef(Reg);
|
| /external/llvm/tools/llvm-rtdyld/ |
| llvm-rtdyld.cpp | 622 std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
623 if (!MRI)
626 std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
630 MCContext Ctx(MAI.get(), MRI.get(), nullptr);
640 TheTarget->createMCInstPrinter(Triple(TripleName), 0, *MAI, *MII, *MRI));
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/ |
| ChangeLog-9303 | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 111 MachineRegisterInfo &MRI);
130 MachineRegisterInfo* MRI;
286 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
|
| RegisterPressure.h | 139 const MachineRegisterInfo *MRI);
219 void init(const MachineRegisterInfo &MRI);
269 const MachineRegisterInfo *MRI;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ConditionOptimizer.cpp | 91 const MachineRegisterInfo *MRI;
165 } else if (!MRI->use_empty(I->getOperand(0).getReg())) {
316 MRI = &MF.getRegInfo();
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 229 MachineRegisterInfo &MRI = MF->getRegInfo();
236 unsigned GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass);
283 unsigned GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass);
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.cpp | 86 bool MipsSEDAGToDAGISel::replaceUsesWithZeroReg(MachineRegisterInfo *MRI,
107 for (MachineRegisterInfo::use_iterator U = MRI->use_begin(DstReg),
108 E = MRI->use_end(); U != E;) {
120 if (!MRI->getRegClass(MO.getReg())->contains(ZeroReg))
221 MachineRegisterInfo *MRI = &MF.getRegInfo();
231 replaceUsesWithZeroReg(MRI, *I);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetMachine.h | 100 const MCRegisterInfo *MRI;
164 const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinterDwarf.cpp | 183 const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo();
184 int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false);
|
