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  /external/llvm/lib/CodeGen/
LiveRangeCalc.h 38 const MachineRegisterInfo *MRI;
138 LiveRangeCalc() : MF(nullptr), MRI(nullptr), Indexes(nullptr),
MachineModuleInfo.cpp 190 const MCRegisterInfo &MRI,
192 : ImmutablePass(ID), Context(&MAI, &MRI, MOFI, nullptr, false) {
AggressiveAntiDepBreaker.h 114 MachineRegisterInfo &MRI;
MachineBasicBlock.cpp 384 MachineRegisterInfo &MRI = getParent()->getRegInfo();
392 if (!MRI.constrainRegClass(VirtReg, RC))
398 unsigned VirtReg = MRI.createVirtualRegister(RC);
919 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
920 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
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MachineFunction.cpp 468 MachineRegisterInfo &MRI = getRegInfo();
469 unsigned VReg = MRI.getLiveInVirtReg(PReg);
471 const TargetRegisterClass *VRegRC = MRI.getRegClass(VReg);
483 VReg = MRI.createVirtualRegister(RC);
484 MRI.addLiveIn(PReg, VReg);
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  /external/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp 328 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
329 MRI.constrainRegClass(BaseReg, TII->getRegClass(MCID, 0, this, MF));
  /external/llvm/lib/Target/AMDGPU/
SIInsertWaits.cpp 59 const MachineRegisterInfo *MRI;
462 MRI = &MF.getRegInfo();
R600ISelLowering.cpp 200 MachineRegisterInfo &MRI = MF->getRegInfo();
215 if (!MRI.use_empty(MI->getOperand(DstIdx).getReg()) ||
258 MachineInstr * defInstr = MRI.getVRegDef(maskedRegister);
299 unsigned T0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
300 unsigned T1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
400 unsigned T0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
401 unsigned T1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
656 MachineRegisterInfo &MRI = MF.getRegInfo();
657 MRI.addLiveIn(Reg);
676 MachineRegisterInfo &MRI = MF.getRegInfo()
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  /external/llvm/lib/Target/Sparc/
SparcAsmPrinter.cpp 283 const MachineRegisterInfo &MRI = MF->getRegInfo();
287 if (MRI.use_empty(reg))
  /toolchain/binutils/binutils-2.25/gas/
as.h 351 /* True if we are assembling in MRI mode. */
579 /* True if we are assembling in m68k MRI mode. */
cond.c 218 /* Get a string for the MRI IFC or IFNC pseudo-ops. */
258 /* The MRI IFC and IFNC pseudo-ops. */
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp     [all...]
  /external/clang/lib/Parse/
ParseStmtAsm.cpp 527 std::unique_ptr<llvm::MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TT));
528 std::unique_ptr<llvm::MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TT));
536 llvm::MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &TempSrcMgr);
555 TheTarget->createMCInstPrinter(llvm::Triple(TT), 1, *MAI, *MII, *MRI));
  /external/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUAsmBackend.cpp 183 const MCRegisterInfo &MRI,
  /external/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCAsmBackend.cpp 232 const MCRegisterInfo &MRI,
  /external/llvm/lib/Target/Sparc/MCTargetDesc/
SparcMCCodeEmitter.cpp 77 const MCRegisterInfo &MRI,
  /external/llvm/lib/Target/SystemZ/
SystemZInstrInfo.h 158 const MachineRegisterInfo *MRI) const override;
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/
malis.s 130 # This does not work with GAS in mri mode, the instruction 'if L2 < 24'
  /toolchain/binutils/binutils-2.25/ld/
ldgram.y 40 #include "mri.h"
186 /* SYNTAX WITHIN AN MRI SCRIPT FILE */
190 PUSH_ERROR (_("MRI style script"));
209 einfo(_("%P%F: unrecognised keyword in MRI style script '%s'\n"),$1);
  /external/llvm/include/llvm/MC/
MCContext.h 64 const MCRegisterInfo *MRI;
227 explicit MCContext(const MCAsmInfo *MAI, const MCRegisterInfo *MRI,
236 const MCRegisterInfo *getRegisterInfo() const { return MRI; }
  /external/llvm/lib/MC/
MCContext.cpp 37 MCContext::MCContext(const MCAsmInfo *mai, const MCRegisterInfo *mri,
40 : SrcMgr(mgr), MAI(mai), MRI(mri), MOFI(mofi), Allocator(),
  /external/llvm/lib/Target/Hexagon/
BitTracker.h 72 MachineRegisterInfo &MRI;
344 : TRI(T), MRI(M) {}
430 MachineRegisterInfo &MRI;
  /external/llvm/lib/Target/X86/
X86InstrInfo.h 483 const MachineRegisterInfo *MRI,
514 const MachineRegisterInfo *MRI) const override;
524 const MachineRegisterInfo *MRI,
  /toolchain/binutils/binutils-2.25/gas/config/
m68k-parse.y 199 /* An operand in Motorola syntax. This includes MRI syntax as well,
726 /* In MRI mode, something like foo.bar can be equated to a register
769 /* In MRI mode, this can be the start of an octal number. */
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 133 const MCRegisterInfo *MRI;
358 MRI = getContext().getRegisterInfo();
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