/art/compiler/utils/x86_64/ |
assembler_x86_64.h | 423 void mulsd(XmmRegister dst, XmmRegister src); 424 void mulsd(XmmRegister dst, const Address& src); [all...] |
assembler_x86_64.cc | 633 void X86_64Assembler::mulsd(XmmRegister dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler 643 void X86_64Assembler::mulsd(XmmRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
x86-64-simd-intel.d | 85 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[rax\] 204 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[rax\]
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x86-64-simd-suffix.d | 85 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0 204 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0
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x86-64-simd.d | 85 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0 204 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
x86-64-simd-intel.d | 85 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[rax\] 204 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[rax\]
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x86-64-simd-suffix.d | 85 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0 204 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0
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x86-64-simd.d | 84 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0 203 [ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0
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/external/v8/src/compiler/ia32/ |
code-generator-ia32.cc | [all...] |
/external/v8/src/compiler/x64/ |
code-generator-x64.cc | [all...] |
/external/v8/src/ia32/ |
assembler-ia32.h | [all...] |
/external/llvm/test/CodeGen/X86/ |
machine-combiner.ll | 197 ; SSE-NEXT: mulsd %xmm3, %xmm2 198 ; SSE-NEXT: mulsd %xmm2, %xmm0
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sse2-intrinsics-x86.ll | 247 ; CHECK: mulsd
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stack-folding-fp-sse42.ll | [all...] |
/bionic/libm/x86/ |
libm_sincos_huge.S | 71 mulsd %xmm1, %xmm0
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libm_tancot_huge.S | 73 mulsd %xmm1, %xmm0
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/art/compiler/utils/x86/ |
assembler_x86.cc | 605 void X86Assembler::mulsd(XmmRegister dst, XmmRegister src) { function in class:art::x86::X86Assembler 614 void X86Assembler::mulsd(XmmRegister dst, const Address& src) { function in class:art::x86::X86Assembler [all...] |
/external/llvm/lib/Target/X86/ |
README-SSE.txt | 748 mulsd LCPI1_0, %xmm0 822 and emit 3 mulsd in place of the divs. This can be done as a target-independent
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/external/v8/src/x64/ |
macro-assembler-x64.h | [all...] |
/external/valgrind/none/tests/amd64/ |
insn_sse2.def | 125 mulsd xmm.pd[1234.5678,8765.4321] xmm.pd[3.0,2.0] => 1.pd[3703.7034,2.0] 126 mulsd m128.pd[1234.5678,8765.4321] xmm.pd[3.0,2.0] => 1.pd[3703.7034,2.0] [all...] |
/external/valgrind/none/tests/x86/ |
insn_sse2.def | 125 mulsd xmm.pd[1234.5678,8765.4321] xmm.pd[3.0,2.0] => 1.pd[3703.7034,2.0] 126 mulsd m128.pd[1234.5678,8765.4321] xmm.pd[3.0,2.0] => 1.pd[3703.7034,2.0] [all...] |
/external/llvm/test/MC/X86/ |
x86-32-coverage.s | [all...] |
/external/elfutils/tests/ |
testfile44.expect.bz2 | |
/external/libvpx/libvpx/third_party/libyuv/source/ |
x86inc.asm | 981 AVX_INSTR mulsd, 1, 0, 1
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/third_party/x86inc/ |
x86inc.asm | 1056 AVX_INSTR mulsd, 1, 0, 1
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