| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 674 case Instruction::SRem:
682 if (DemandedMask.ult(RA)) // srem won't affect demanded bits
691 // The low bits of LHS are unchanged by the srem.
[all...] |
| InstCombineVectorOps.cpp | 571 case Instruction::SRem:
634 case Instruction::SRem:
734 case Instruction::SRem:
[all...] |
| InstCombineShifts.cpp | 42 // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
[all...] |
| /external/llvm/lib/Analysis/ |
| DependenceAnalysis.cpp | [all...] |
| CostModel.cpp | 401 case Instruction::SRem:
|
| ObjCARCInstKind.cpp | 276 case Instruction::SRem:
|
| InstructionSimplify.cpp | [all...] |
| ValueTracking.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 92 case Instruction::SRem:
|
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 119 setOperationAction(ISD::SREM, MVT::i64, Expand);
|
| /external/llvm/lib/Target/CppBackend/ |
| CPPBackend.cpp | 878 case Instruction::SRem: Out << "getSRem("; break;
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 403 J->getOpcode() == Instruction::SRem)) {
|
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyIndVar.cpp | 293 bool IsSigned = Rem->getOpcode() == Instruction::SRem;
|
| /external/llvm/test/CodeGen/X86/ |
| optimize-max-0.ll | 89 %19 = srem i32 %y.14, 2
|
| /external/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 355 case 5:{Op = (isFloat?Instruction::FRem : Instruction::SRem); break; }
|
| /external/clang/test/CodeGen/ |
| zvector.c | [all...] |
| /external/llvm/include/llvm/IR/ |
| PatternMatch.h | 494 inline BinaryOp_match<LHS, RHS, Instruction::SRem> m_SRem(const LHS &L,
496 return BinaryOp_match<LHS, RHS, Instruction::SRem>(L, R);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 371 def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 155 setOperationAction(ISD::SREM, MVT::i8, Expand);
161 setOperationAction(ISD::SREM, MVT::i16, Expand);
[all...] |
| /external/llvm/test/Bindings/OCaml/ |
| core.ml | 278 * CHECK: @const_srem = global i64 srem
[all...] |
| /external/llvm/test/Bitcode/ |
| compatibility-3.6.ll | 760 srem i8 %op1, %op2
761 ; CHECK: srem i8 %op1, %op2
[all...] |
| compatibility-3.7.ll | 802 srem i8 %op1, %op2
803 ; CHECK: srem i8 %op1, %op2
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 170 setOperationAction(ISD::SREM, MVT::i32, Legal);
217 setOperationAction(ISD::SREM, MVT::i64, Legal);
267 setOperationAction(ISD::SREM, Ty, Legal);
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| shift.ll | 552 %rem = srem i32 %x, 32
|
| /external/llvm/include/llvm/ADT/ |
| APInt.h | 933 APInt LLVM_ATTRIBUTE_UNUSED_RESULT srem(const APInt &RHS) const;
[all...] |
