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  /external/libhevc/common/arm/
ihevc_sao_edge_offset_class1.s 128 VLD1.8 D11,[r0]! @pu1_cur_row = vld1q_u8(pu1_src)
187 VMOVL.U8 Q4,D11 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
243 VMOVL.U8 Q14,D11 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
272 VLD1.8 D11,[r0]! @pu1_cur_row = vld1q_u8(pu1_src)
ihevc_sao_edge_offset_class1_chroma.s 133 VLD1.8 D11,[r0]! @pu1_cur_row = vld1q_u8(pu1_src)
195 VMOVL.U8 Q14,D11 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
261 VMOVL.U8 Q14,D11 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
290 VLD1.8 D11,[r0]! @pu1_cur_row = vld1q_u8(pu1_src)
ihevc_sao_edge_offset_class2.s 237 VLD1.8 D11,[r8] @pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(pu1_src_top_cpy - 1)
310 VTBL.8 D11,{D7},D19 @I offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
319 VADDW.S8 Q11,Q11,D11 @I pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
419 VTBL.8 D11,{D7},D19 @III offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
429 VADDW.S8 Q9,Q9,D11 @III pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
484 VTBL.8 D11,{D7},D19 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
491 VADDW.S8 Q6,Q6,D11 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
549 VLD1.8 D11,[r8] @pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(pu1_src_top_cpy - 1)
    [all...]
ihevc_sao_edge_offset_class3.s 252 VLD1.8 D11,[r8] @pu1_top_row = vld1q_u8(pu1_src - src_strd + 1)
329 VTBL.8 D11,{D7},D19 @I offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
333 VADDW.S8 Q11,Q11,D11 @I pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
446 VTBL.8 D11,{D7},D19 @III offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
453 VADDW.S8 Q11,Q11,D11 @III pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
578 VLD1.8 D11,[r8] @pu1_top_row = vld1q_u8(pu1_src - src_strd + 1)
    [all...]
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/
scale_sig_neon.s 104 VSHLL.S16 Q13, D11, #16
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/
h264bsdWriteMacroblock.s 63 dRow11 DN D11.U8
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/
h264bsdWriteMacroblock.S 65 #define dRow11 D11
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
omxVCM4P10_PredictIntraChroma_8x8_s.s 132 dHorPred DN D11.S16
151 dMultiplier1 DN D11.S16
armVCM4P10_DeblockingLuma_unsafe_s.s 45 dQ_3 DN D11.U8
127 ;// Inputs - Pixels - p0-p3: D4-D7, q0-q3: D8-D11
261 ;// Inputs - Pixels - p0-p3: D4-D7, q0-q3: D8-D11
omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s 70 dRow7 DN D11.U8
150 ;// q0-q3 - d8-d11
omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s 74 dQ_3 DN D11.U8
195 ;// q0-q3 - d8-d11
omxVCM4P10_PredictIntra_4x4_s.s 143 dOdd1 DN D11.U8
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/
Radix4FFT_v7.s 81 VLD2.I32 {D8, D9, D10, D11}, [r8]
  /external/llvm/lib/Target/AArch64/
AArch64PBQPRegAlloc.cpp 69 case AArch64::D11:
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AsmBackend.cpp 411 // D10/D11 pair = 0x00000200,
417 else if (Reg1 == AArch64::D10 && Reg2 == AArch64::D11 &&
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
omxVCM4P2_PredictReconCoefIntra_s.s 158 dtempPred1 DN D11.S16
162 M_START omxVCM4P2_PredictReconCoefIntra,r11,d11
omxVCM4P2_MCReconBlock_s.s 318 dRow5Shft DN D11.U8
  /external/icu/icu4c/source/data/sprep/
rfc3530cs.txt 165 0D11; ; UNASSIGNED
rfc3530mixp.txt 166 0D11; ; UNASSIGNED
rfc3920res.txt 166 0D11; ; UNASSIGNED
rfc4011.txt 165 0D11; ; UNASSIGNED
rfc4013.txt 166 0D11; ; UNASSIGNED
rfc4505.txt 165 0D11; ; UNASSIGNED
  /external/icu/icu4c/source/test/testdata/
nfs4_cs_prep_cs.txt 157 0D11; ; UNASSIGNED
nfs4_mixed_prep_p.txt 157 0D11; ; UNASSIGNED

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