/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/ |
indexed12.d | 106 tst D12\-D10,x ; \-> tst 255,x \(9\-bit offset\), data seg 108 tst D10\-D12,x ; \-> tst \-255,x \(9\-bit offset\), data seg 110 tst D12\-D10\+1,x ; \-> tst 256,x \(16\-bit offset\), data seg
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/toolchain/binutils/binutils-2.25/opcodes/ |
frv-opc.c | [all...] |
/external/libhevc/decoder/arm/ |
ihevcd_fmt_conv_420sp_to_rgba8888.s | 214 VQSHRN.S32 D12,Q6,#13 @//D12 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES 345 VQSHRN.S32 D12,Q6,#13 @//D12 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 128 dAqflg DN D12.U8 132 dAp1p0 DN D12.U8
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omxVCM4P10_PredictIntraChroma_8x8_s.s | 139 dLeftDiff0U8 DN D12.U8 140 dLeftDiff0U64 DN D12.U64
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omxVCM4P10_PredictIntra_16x16_s.s | 127 dRevLeft64 DN D12.U64 128 dRevLeft DN D12.U8
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armVCM4P10_DeblockingLuma_unsafe_s.s | 52 dAqflg DN D12.U8 128 ;// - Filter masks - filt: D16, aqflg: D12, apflg: D17 262 ;// - Filter masks - filt: D16, aqflg: D12, apflg: D17
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armVCM4P10_Interpolate_Chroma_s.s | 76 dACoeff DN D12.U8
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omxVCM4P10_PredictIntra_4x4_s.s | 144 dOdd2 DN D12.U8 171 M_START omxVCM4P10_PredictIntra_4x4, r12,d12
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/art/compiler/jni/quick/arm64/ |
calling_convention_arm64.cc | 42 D8, D9, D10, D11, D12, D13, D14, D15
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/art/compiler/utils/arm/ |
constants_arm.h | 74 D12 = 12,
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class0.s | 141 VLD1.8 D12,[r12]! @pu1_cur_row = vld1q_u8(pu1_src_cpy) 199 VMOVL.U8 Q9,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 290 VLD1.8 D12,[r12]! @pu1_cur_row = vld1q_u8(pu1_src_cpy) 321 VMOVL.U8 Q14,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row)))
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ihevc_sao_edge_offset_class0_chroma.s | 147 VLD1.8 D12,[r12]! @pu1_cur_row = vld1q_u8(pu1_src_cpy) 217 VMOVL.U8 Q9,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 310 VLD1.8 D12,[r12]! @pu1_cur_row = vld1q_u8(pu1_src_cpy) 382 VMOVL.U8 Q9,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row)))
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ihevc_sao_edge_offset_class2.s | 242 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) 309 VMOVL.U8 Q10,D12 @I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 396 VMOVL.U8 Q13,D12 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 483 VMOVL.U8 Q10,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 554 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) [all...] |
ihevc_sao_edge_offset_class2_chroma.s | 319 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) 416 VMOVL.U8 Q10,D12 @I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 536 VMOVL.U8 Q14,D12 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) [all...] |
ihevc_sao_edge_offset_class3.s | 257 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) 320 VMOVL.U8 Q10,D12 @I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 416 VMOVL.U8 Q14,D12 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 507 VMOVL.U8 Q10,D12 @pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 597 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) [all...] |
ihevc_sao_edge_offset_class3_chroma.s | 314 VLD1.8 D12,[r0]! @pu1_cur_row = vld1q_u8(pu1_src) 407 VMOVL.U8 Q10,D12 @I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) 536 VMOVL.U8 Q14,D12 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row))) [all...] |
/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
scale_sig_neon.s | 115 VSHLL.S16 Q10, D12, #16
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
h264bsdWriteMacroblock.s | 64 dRow12 DN D12.U8
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
h264bsdWriteMacroblock.S | 66 #define dRow12 D12
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/frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
Radix4FFT_v7.s | 93 VLD2.I32 {D12, D13, D14, D15}, [r8]
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/external/llvm/lib/Target/AArch64/ |
AArch64PBQPRegAlloc.cpp | 119 case AArch64::D12:
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 412 // D12/D13 pair = 0x00000400, 420 else if (Reg1 == AArch64::D12 && Reg2 == AArch64::D13 &&
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/external/valgrind/memcheck/ |
mc_machine.c | [all...] |
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
omxVCM4P2_MCReconBlock_s.s | 319 dRow6 DN D12.U8
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