/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
h264bsdWriteMacroblock.s | 65 dRow13 DN D13.U8
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
h264bsdWriteMacroblock.S | 67 #define dRow13 D13
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/ |
indexed12.d | 112 mina D13\-D10,x ; \-> mina 256,x \(16\-bit offset\) 115 mina D10\-D13,x ; \-> mina \-256,x \(9\-bit offset\)
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/frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
Radix4FFT_v7.s | 93 VLD2.I32 {D12, D13, D14, D15}, [r8]
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
armVCM4P10_DeblockingLuma_unsafe_s.s | 55 dAp0q0 DN D13.U8
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armVCM4P10_Interpolate_Chroma_s.s | 77 dBCoeff DN D13.U8
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omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 85 dAp0q0 DN D13.U8
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omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 131 dAp0q0 DN D13.U8
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class0.s | 142 VLD1.8 D13,[r12], r1 @pu1_cur_row = vld1q_u8(pu1_src_cpy) 226 VMOVL.U8 Q7,D13 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 291 VLD1.8 D13,[r12] @pu1_cur_row = vld1q_u8(pu1_src_cpy)
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ihevc_sao_edge_offset_class0_chroma.s | 148 VLD1.8 D13,[r12],r1 @pu1_cur_row = vld1q_u8(pu1_src_cpy) 223 VMOVL.U8 Q6,D13 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 311 VLD1.8 D13,[r12],r1 @pu1_cur_row = vld1q_u8(pu1_src_cpy)
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ihevc_sao_edge_offset_class2.s | 243 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) 314 VMOVL.U8 Q11,D13 @I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 415 VMOVL.U8 Q14,D13 @II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 488 VMOVL.U8 Q6,D13 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 555 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) [all...] |
ihevc_sao_edge_offset_class2_chroma.s | 320 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) 419 VMOVL.U8 Q9,D13 @I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 552 VMOVL.U8 Q13,D13 @II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) [all...] |
ihevc_sao_edge_offset_class3.s | 258 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) 325 VMOVL.U8 Q11,D13 @I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 435 VMOVL.U8 Q13,D13 @II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 510 VMOVL.U8 Q11,D13 @pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 598 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) [all...] |
ihevc_sao_edge_offset_class3_chroma.s | 315 VLD1.8 D13,[r0] @pu1_cur_row = vld1q_u8(pu1_src) 415 VMOVL.U8 Q9,D13 @I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) 544 VMOVL.U8 Q13,D13 @II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row))) [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64PBQPRegAlloc.cpp | 70 case AArch64::D13:
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 412 // D12/D13 pair = 0x00000400, 420 else if (Reg1 == AArch64::D12 && Reg2 == AArch64::D13 &&
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
omxVCM4P2_MCReconBlock_s.s | 320 dRow6Shft DN D13.U8
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/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 125 case AArch64::D13: return AArch64::B13; 165 case AArch64::B13: return AArch64::D13; [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 94 SP::D12, SP::D28, SP::D13, SP::D29,
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/external/valgrind/memcheck/ |
mc_machine.c | [all...] |
/external/libavc/encoder/arm/ |
ime_distortion_metrics_a9q.s | 296 vadd.i16 d12, d12, d13 420 vadd.u16 d12, d12, d13 476 vld1.8 {d12, d13}, [r1], r4 @ load ref2 Row 1 481 vabal.u8 q11, d13, d9 503 vld1.8 {d12, d13}, [r1], r4 @ load ref2 Row 1 508 vabal.u8 q11, d13, d9 650 vadd.i16 d3, d12, d13 @ y top 1054 vtrn.s16 d12, d13 @I Get s2 s3 1056 @D13 S2 S3 A2 A3 1061 vpadd.s16 d16, d12, d13 @I (s1 + s4) (s2 + s3 [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonFrameLowering.cpp | 662 Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13, [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 125 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15, [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | [all...] |
/external/llvm/lib/Target/Hexagon/Disassembler/ |
HexagonDisassembler.cpp | 526 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15}; [all...] |