/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/ |
ptrace-abi.h | 12 #define EAX 6
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/external/mesa3d/src/mesa/x86/ |
x86_cliptest.S | 140 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) 146 MOV_L( EAX, ARG_SOURCE ) /* put stride in ARG_SOURCE */ 260 MOV_L( ARG_DEST, EAX ) 315 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) 320 MOV_L( EAX, ARG_DEST ) /* put stride in ARG_DEST */ 394 MOV_L( ARG_SOURCE, EAX )
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assyntax.h | 96 #define EAX ax 158 #define EAX %eax 442 #define IN_L CHOICE(inl (DX), inl ARG2(DX,EAX), _LTOG in DX) 449 #define IN1_L(a) CHOICE(inl (a), inl ARG2(a,EAX), _LTOG in a) 453 #define IN1_L(a) CHOICE(inl a, inl ARG2(a,EAX), _LTOG in a) 555 #define OUT_L CHOICE(outl (DX), outl ARG2(EAX,DX), _LTOG out DX) 561 #define OUT1_L(a) CHOICE(outl (a), outl ARG2(EAX,a), _LTOG out a) [all...] |
/art/runtime/arch/x86/ |
context_x86.cc | 31 gprs_[EAX] = &arg0_; 68 gprs_[EAX] = const_cast<uintptr_t*>(&gZero);
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context_x86.h | 48 SetGPR(EAX, new_arg0_value);
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCTargetDesc.h | 50 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
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/external/libunwind/src/x86/ |
Gget_save_loc.c | 40 case UNW_X86_EAX: loc = c->dwarf.loc[EAX]; break;
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init.h | 33 c->dwarf.loc[EAX] = DWARF_REG_LOC (&c->dwarf, UNW_X86_EAX);
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Gregs.c | 78 loc = c->dwarf.loc[(reg == UNW_X86_EAX) ? EAX : EDX];
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Gos-freebsd.c | 54 8d 44 24 20 lea 0x20(%esp),%eax 55 50 push %eax 56 b8 a1 01 00 00 mov $0x1a1,%eax 57 50 push %eax 61 8d 44 24 20 lea 0x20(%esp),%eax 62 50 push %eax 63 f7 40 54 00 02 00 testl $0x20000,0x54(%eax) 65 8e 68 14 mov 0x14(%eax),%gs 66 b8 a1 01 00 00 mov $0x1a1,%eax 67 50 push %eax [all...] |
Gos-linux.c | 46 0x58 pop %eax 47 0xb8 0x77 0x00 0x00 0x00 movl 0x77,%eax 53 0xb8 0xad 0x00 0x00 0x00 movl 0xad,%eax 124 c->dwarf.loc[EAX] = DWARF_LOC (sc_addr + LINUX_SC_EAX_OFF, 0);
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/external/lzma/Asm/x86/ |
7zAsm.asm | 46 x0 equ EAX
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/external/valgrind/coregrind/m_sigframe/ |
sigframe-x86-darwin.c | 102 SC2(__eax,EAX); 122 SC2(EAX,__eax);
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sigframe-x86-linux.c | 380 SC2(eax,EAX); 610 tst->arch.vex.guest_EAX = sc->eax;
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/art/compiler/optimizing/ |
code_generator_x86.h | 42 static constexpr Register kRuntimeParameterCoreRegisters[] = { EAX, ECX, EDX, EBX }; 103 return Location::RegisterLocation(EAX); 107 ? Location::RegisterPairLocation(EAX, EDX) 108 : Location::RegisterLocation(EAX);
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intrinsics_x86.cc | 328 locations->SetInAt(0, Location::RegisterLocation(EAX)); 336 DCHECK_EQ(out, EAX); 340 // Sign extend EAX into EDX. 343 // XOR EAX with sign. 344 __ xorl(EAX, EDX); 347 __ subl(EAX, EDX); 349 // The result is in EAX. 700 Location::RegisterLocation(EAX)); 726 // Needs to be EAX for the invoke. 727 locations->AddTemp(Location::RegisterLocation(EAX)); [all...] |
code_generator_x86.cc | 43 static constexpr Register kMethodRegisterArgument = EAX; 225 x86_codegen->Move32(locations->Out(), Location::RegisterLocation(EAX)); 268 x86_codegen->Move32(out, Location::RegisterLocation(EAX)); 342 x86_codegen->Move32(locations->Out(), Location::RegisterLocation(EAX)); 461 x86_codegen->Move32(out_, Location::RegisterLocation(EAX)); 612 x86_codegen->Move32(out_, Location::RegisterLocation(EAX)); 678 x86_codegen->Move32(out_, Location::RegisterLocation(EAX)); 3014 Register eax = locations->GetTemp(0).AsRegister<Register>(); local 3284 Register eax = locations->InAt(0).AsRegister<Register>(); local [all...] |
/external/llvm/lib/Target/X86/ |
X86RegisterInfo.cpp | 650 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 662 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 699 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 735 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 736 return X86::EAX; 771 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
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X86FrameLowering.cpp | 199 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX || 264 Reg = (unsigned)(Is64Bit ? X86::RAX : X86::EAX); 288 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) 740 unsigned AX = Is64Bit ? X86::RAX : X86::EAX; [all...] |
X86SelectionDAGInfo.cpp | 58 X86::ECX, X86::EAX, X86::EDI}; 122 ValReg = X86::EAX;
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X86MCInstLower.cpp | 297 /// \brief Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with 309 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) 331 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl 332 if (Op0 == X86::EAX && Op1 == X86::AX) 335 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq 336 if (Op0 == X86::RAX && Op1 == X86::EAX) 370 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) 546 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; 591 // this with an ugly goto in case the resultant OR uses EAX and needs the 652 // which have a short %eax, etc. form. Handle this by custom lowering, fo [all...] |
/external/google-breakpad/src/common/android/ |
breakpad_getcontext_unittest.cc | 86 CHECK_REG(EAX);
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/external/dng_sdk/source/ |
dng_utils.h | 1116 MOV EAX, x 1144 MOV EAX, x
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/external/llvm/lib/Target/X86/Disassembler/ |
X86DisassemblerDecoder.h | 135 ENTRY(EAX) \ 153 ENTRY(EAX) \
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/external/llvm/include/llvm/DebugInfo/PDB/ |
PDBTypes.h | 389 EAX = 17,
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