| /external/tremolo/Tremolo/ |
| dpen.s | 101 LDRB r7, [r2]
126 LDRB r10,[r8], -r6 @ r10= next=t[chase+bit] r8=chase+bit
143 LDRB r14,[r12,r14,LSR #7] @ r14= t[chase+bit+1+(!bit || t[chase]0x0x80)]
328 LDRB r2, [r4, r2] @ r2 = v = q->val[entry & mask]
372 LDRB r2, [r4], #1 @ r2 = v = *ptr++
476 LDRB r2, [r0],#1 @ r2 = data[j]
|
| bitwiseARM.s | 105 LDRB r12,[r6],#1 @ r12= *buffer
301 LDRB r12,[r6],#1 @ r12= *buffer
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| sp-pc-validations-bad.s | 17 @ LDRB (immediate, ARM)
18 ldrb pc,[r0,#4] @ Unpredictable label
19 ldrb pc,[r0],#4 @ ditto label
20 ldrb pc,[r0,#4]! @ ditto label
22 @ LDRB (literal)
23 ldrb pc, label @ Unpredictable label
24 ldrb pc,[pc,#-0] @ ditto label
26 @ LDRB (register)
27 ldrb pc,[r0,r1, LSL #2] @ Unpredictable label
28 ldrb pc,[r0,r1, LSL #2]! @ ditt label
29 ldrb pc,[r0],r1, LSL #2 @ ditto label
30 ldrb r0,[r1,pc, LSL #2] @ ditto label
31 ldrb r0,[r1,pc, LSL #2]! @ ditto label
32 ldrb r0,[r1],pc, LSL #2 @ ditto label
33 ldrb r0,[pc,r1, LSL #2]! @ ditto label
34 ldrb r0,[pc],r1, LSL #2 @ ditto label
[all...] |
| sp-pc-validations-bad-t.s | 47 @ LDRB (immediate, Thumb)
48 ldrb pc, [r0,#4] @ low reg label
49 @ldrb r0, [pc,#4] @ ALLOWED!
50 ldrb.w sp, [r0,#4] @ Unpredictable
51 ldrb.w pc, [r0,#4] @ => PLD
52 ldrb pc, [r0, #-4] @ => PLD label
53 @ LDRB<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRBT
54 ldrb pc, [r0],#4 @ BadReg label
55 ldrb sp, [r0],#4 @ ditto label
56 ldrb pc,[r0,#4]! @ ditt label
57 ldrb sp,[r0,#4]! @ ditto label
60 ldrb pc,label @ => PLD label
61 ldrb pc,[PC,#-0] @ => PLD (special case) label
62 ldrb sp,label @ Unpredictable label
63 ldrb sp,[PC,#-0] @ ditto label
66 ldrb pc,[r0,r1] @ low reg label
67 ldrb r0,[pc,r1] @ ditto label
68 ldrb r0,[r1,pc] @ ditto label
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_sao_band_offset_luma.s | 87 LDRB r11,[r10],r1 @Load the value
99 LDRB r10,[r9,#-1]
|
| ihevc_sao_edge_offset_class1_chroma.s | 100 LDRB r4,[r5,#2] @pu1_avail[2]
105 LDRB r4,[r5,#3] @pu1_avail[3]
123 LDRB r4,[r5,#2] @pu1_avail[2]
281 LDRB r4,[r5,#2] @pu1_avail[2]
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerProxy.cpp | 215 void ARMAssemblerProxy::LDRB(int cc, int Rd, int Rn, uint32_t offset) {
216 mTarget->LDRB(cc, Rd, Rn, offset);
|
| ARMAssembler.h | 117 virtual void LDRB(int cc, int Rd,
|
| ARMAssemblerProxy.h | 106 virtual void LDRB(int cc, int Rd,
|
| texturing.cpp | 704 LDRB(AL, texel.reg, txPtr.reg);
726 LDRB(AL, pixel, txPtr.reg, reg_scale_pre(offset));
733 LDRB(AL, pixel, txPtr.reg, reg_scale_pre(lb));
740 LDRB(AL, pixel, txPtr.reg);
745 LDRB(AL, pixel, txPtr.reg, reg_scale_pre(rt));
[all...] |
| ARMAssemblerInterface.h | 156 virtual void LDRB(int cc, int Rd,
|
| Arm64Assembler.h | 134 virtual void LDRB(int cc, int Rd,
|
| MIPS64Assembler.h | 122 virtual void LDRB(int cc, int Rd,
|
| ARMAssembler.cpp | 302 void ARMAssembler::LDRB(int cc, int Rd, int Rn, uint32_t offset) {
|
| MIPSAssembler.h | 117 virtual void LDRB(int cc, int Rd,
|
| blending.cpp | 47 LDRB(AL, fogColor.reg, mBuilderContext.Rctx,
|
| Arm64Assembler.cpp | 646 void ArmToArm64Assembler::LDRB(int cc, int Rd, int Rn, uint32_t op_type)
990 "LDR","LDRB","LDRH","STR","STRB","STRH"
[all...] |
| GGLAssembler.cpp | 267 LDRB(AL, parts.dither.reg, parts.dither.reg,
[all...] |
| MIPS64Assembler.cpp | 794 void ArmToMips64Assembler::LDRB(int cc, int Rd, int Rn, uint32_t offset)
[all...] |
| MIPSAssembler.cpp | 802 void ArmToMipsAssembler::LDRB(int cc, int Rd, int Rn, uint32_t offset)
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_sao_edge_offset_class1_chroma.s | 119 LDRB w4,[x5,#2] //pu1_avail[2]
126 LDRB w4,[x5,#3] //pu1_avail[3]
144 LDRB w4,[x5,#2] //pu1_avail[2]
320 LDRB w4,[x5,#2] //pu1_avail[2]
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_PredictReconCoefIntra_s.s | 149 LDRB dcScaler,[index,QP]
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_PredictReconCoefIntra_s.s | 179 LDRB dcScaler,[index,QP]
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 301 @ LDRB (immediate)
303 ldrb r4, [r3]
304 ldrb r5, [r6, #0]
305 ldrb r6, [r7, #31]
307 @ CHECK: ldrb r4, [r3] @ encoding: [0x1c,0x78]
308 @ CHECK: ldrb r5, [r6] @ encoding: [0x35,0x78]
309 @ CHECK: ldrb r6, [r7, #31] @ encoding: [0xfe,0x7f]
313 @ LDRB (register)
315 ldrb r6, [r4, r5]
317 @ CHECK: ldrb r6, [r4, r5] @ encoding: [0x66,0x5d
[all...] |
| /system/core/libpixelflinger/tests/arch-mips64/assembler/ |
| mips64_assembler_test.cpp | 540 case INSTR_LDRB: a64asm->LDRB(test.cond, Rd,Rn,op2); break;
|
