| /external/llvm/lib/CodeGen/ |
| LiveRegMatrix.cpp | 79 LaneBitmask Mask = (*Units).second;
81 if (S.LaneMask & Mask) {
|
| MIRPrinter.cpp | 225 // The used physical register mask is printed as an inverted callee saved
226 // register mask.
416 for (const uint32_t *Mask : TRI->getRegMasks())
417 RegisterMaskIds.insert(std::make_pair(Mask, I++));
696 for (const auto &Mask : BitMasks) {
697 // Check if the flag's bitmask has the bits of the current mask set.
698 if ((BitMask & Mask.first) == Mask.first) {
702 OS << Mask.second;
704 BitMask &= ~(Mask.first)
[all...] |
| RegisterScavenging.cpp | 124 // Apply the mask.
275 /// in Mask.
277 BitVector Mask(TRI->getNumRegs());
281 Mask.set(*I);
282 return Mask;
|
| /external/llvm/lib/Target/AMDGPU/ |
| R600TextureIntrinsicsReplacer.cpp | 125 Constant *Mask[] = {
131 Value *SwizzleMask = ConstantVector::get(Mask);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 238 uint64_t Mask = ((uint64_t)(-1) >>
240 CurVal |= Value & Mask;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 253 int &Mask, int &Value) const override;
257 int Mask, int Value,
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| PPCRegisterInfo.h | 82 void adjustStackMapLiveOutMask(uint32_t *Mask) const override;
|
| /external/pdfium/core/ |
| pdfiumfxcodec.mk | 14 # Mask some warnings. These are benign, but we probably want to fix them
|
| /external/pdfium/fpdfsdk/ |
| pdfium.mk | 14 # Mask some warnings. These are benign, but we probably want to fix them
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/X11/ |
| X.h | 70 typedef unsigned long Mask;
86 typedef CARD32 Mask;
147 /* Input Event Masks. Used as event-mask window attribute and as arguments
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/X11/ |
| X.h | 70 typedef unsigned long Mask;
86 typedef CARD32 Mask;
147 /* Input Event Masks. Used as event-mask window attribute and as arguments
|
| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.cpp | 389 unsigned Mask = (1 << NumBits) - 1;
391 if ((unsigned)Offset <= Mask * Scale) {
406 Mask = (1 << NumBits) - 1;
414 ImmedOffset = ImmedOffset & Mask;
416 Offset &= ~(Mask * Scale);
|
| /external/dbus/dbus/ |
| dbus-string.c | 2587 int i, mask, char_len; local
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| MachineFunction.h | 479 /// \brief Allocate and initialize a register mask with @p NumRegister bits.
482 uint32_t *Mask = Allocator.Allocate<uint32_t>(Size);
484 Mask[i] = 0;
485 return Mask;
|
| MachineInstr.h | 164 unsigned Mask = BundledPred | BundledSucc;
165 Flags = (Flags & Mask) | (flags & ~Mask);
[all...] |
| StackMaps.h | 225 /// \brief Parse the register live-out mask and return a vector of live-out
227 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 799 unsigned Mask = Op.getImm() & 0xf;
806 // For writes, handle extended mask bits if the DSP extension is present.
836 // Handle the basic 8-bit mask.
860 llvm_unreachable("Unexpected mask value!");
908 if (!SpecRegRBit && (Mask == 8 || Mask == 4 || Mask == 12)) {
910 switch (Mask) {
912 llvm_unreachable("Unexpected mask value!");
930 if (Mask) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.cpp | 49 unsigned Mask = MI.getOperand(1).getImm();
52 if (Mask & 1)
55 if (Mask & 2)
58 if (Mask & 4)
61 if (Mask & 8)
64 if (Mask & 16)
67 if (Mask & 32)
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| dbgeng.h | 241 STDMETHOD(GetOutputMask)(THIS_ PULONG Mask) PURE;
242 STDMETHOD(SetOutputMask)(THIS_ ULONG Mask) PURE;
243 STDMETHOD(GetOtherOutputMask)(THIS_ PDEBUG_CLIENT Client,PULONG Mask) PURE;
244 STDMETHOD(SetOtherOutputMask)(THIS_ PDEBUG_CLIENT Client,ULONG Mask) PURE;
312 STDMETHOD(GetOutputMask)(THIS_ PULONG Mask) PURE;
313 STDMETHOD(SetOutputMask)(THIS_ ULONG Mask) PURE;
314 STDMETHOD(GetOtherOutputMask)(THIS_ PDEBUG_CLIENT Client,PULONG Mask) PURE;
315 STDMETHOD(SetOtherOutputMask)(THIS_ PDEBUG_CLIENT Client,ULONG Mask) PURE;
374 STDMETHOD(GetOutputMask)(THIS_ PULONG Mask) PURE;
375 STDMETHOD(SetOutputMask)(THIS_ ULONG Mask) PURE
[all...] |
| /external/llvm/include/llvm/IR/ |
| Function.h | 78 void setGlobalObjectBit(unsigned Mask, bool Value) {
79 setGlobalObjectSubClassData((~Mask & getGlobalObjectSubClassData()) |
80 (Value ? Mask : 0u));
|
| /external/llvm/tools/llvm-dwp/ |
| llvm-dwp.cpp | 198 uint64_t Mask = Buckets.size() - 1;
201 auto H = S & Mask;
205 H += ((S >> 32) & Mask) | 1;
|
| /external/llvm/lib/IR/ |
| IRBuilder.cpp | 207 /// Mask - an vector of booleans which indicates what vector lanes should
213 Value *Mask, Value *PassThru,
221 Value *Ops[] = { Ptr, getInt32(Align), Mask, PassThru};
229 /// Mask - an vector of booleans which indicates what vector lanes should
232 unsigned Align, Value *Mask) {
233 Value *Ops[] = { Val, Ptr, getInt32(Align), Mask };
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineInternal.h | 392 Value *EvaluateInDifferentElementOrder(Value *V, ArrayRef<int> Mask);
477 bool MaskedValueIsZero(Value *V, const APInt &Mask, unsigned Depth = 0,
479 return llvm::MaskedValueIsZero(V, Mask, DL, Depth, AC, CxtI, DT);
554 Value *FoldLogicalPlusAnd(Value *LHS, Value *RHS, ConstantInt *Mask,
|
| /external/llvm/tools/llvm-readobj/ |
| ARMWinEHPrinter.h | 29 uint8_t Mask;
|
