| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 70 StringRef Annot, const MCSubtargetInfo &STI) {
96 if (STI.getFeatureBits()[ARM::HasV8Ops]) {
102 printInstruction(MI, STI, O);
106 printPredicateOperand(MI, 1, STI, O);
121 printSBitModifierOperand(MI, 6, STI, O);
122 printPredicateOperand(MI, 4, STI, O);
143 printSBitModifierOperand(MI, 5, STI, O);
144 printPredicateOperand(MI, 3, STI, O);
168 printPredicateOperand(MI, 2, STI, O);
172 printRegisterList(MI, 4, STI, O)
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCCodeEmitter.h | 41 const MCSubtargetInfo &STI) const = 0;
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.h | 26 explicit ARMInstrInfo(const ARMSubtarget &STI);
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.h | 22 const MCSubtargetInfo *STI;
27 : MCAsmBackend(), STI(ARM_MC::createARMMCSubtargetInfo(TT, "", "")),
31 ~ARMAsmBackend() override { delete STI; }
37 bool hasNOP() const { return STI->getFeatureBits()[ARM::HasV6T2Ops]; }
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsNaClELFStreamer.cpp | 94 const MCSubtargetInfo &STI) {
100 MipsELFStreamer::EmitInstruction(MaskInst, STI);
105 void sandboxIndirectJump(const MCInst &MI, const MCSubtargetInfo &STI) {
109 emitMask(AddrReg, IndirectBranchMaskReg, STI);
110 MipsELFStreamer::EmitInstruction(MI, STI);
117 const MCSubtargetInfo &STI, bool MaskBefore,
123 emitMask(BaseReg, LoadStoreStackMaskReg, STI);
125 MipsELFStreamer::EmitInstruction(MI, STI);
130 emitMask(SPReg, LoadStoreStackMaskReg, STI);
139 const MCSubtargetInfo &STI) override
[all...] |
| /external/llvm/tools/llvm-mc/ |
| Disassembler.h | 33 MCSubtargetInfo &STI,
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| event.d | 23 0000000c <sti>:
24 c: 41 00 STI R1;
25 e: 42 00 STI R2;
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCTargetDesc.cpp | 69 const MCSubtargetInfo &STI) {
74 const MCSubtargetInfo &STI,
76 if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) {
77 return createSIMCCodeEmitter(MCII, STI, Ctx);
79 return createR600MCCodeEmitter(MCII, STI, Ctx);
|
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 46 const MCSubtargetInfo &STI) const override;
51 const MCSubtargetInfo &STI) const override;
90 const MCSubtargetInfo &STI) const {
99 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI);
101 if (!(STI.getFeatureBits()[AMDGPU::FeatureCaymanISA])) {
123 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI);
133 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI);
134 if ((STI.getFeatureBits()[AMDGPU::FeatureR600ALUInst]) &&
168 const MCSubtargetInfo &STI) const {
|
| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 45 const MCSubtargetInfo &STI) const;
51 const MCSubtargetInfo &STI) const;
55 const MCSubtargetInfo &STI) const;
59 const MCSubtargetInfo &STI) const override;
78 const MCSubtargetInfo &STI) const {
109 const MCSubtargetInfo &STI) const {
115 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
138 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
155 const MCSubtargetInfo &STI) const {
|
| /external/llvm/include/llvm/CodeGen/ |
| TargetSchedule.h | 37 const TargetSubtargetInfo *STI;
47 TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {}
54 void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti,
124 return STI->getWriteProcResBegin(SC);
127 return STI->getWriteProcResEnd(SC);
|
| /external/llvm/lib/MC/ |
| MCInstrDesc.cpp | 22 bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI,
25 return ComplexDeprecationInfo(MI, STI, Info);
26 if (DeprecatedFeature != -1 && STI.getFeatureBits()[DeprecatedFeature]) {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64SelectionDAGInfo.cpp | 26 const AArch64Subtarget &STI =
29 (V && V->isNullValue()) ? STI.getBZeroEntry() : nullptr;
33 const AArch64TargetLowering &TLI = *STI.getTargetLowering();
|
| /external/llvm/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 74 const MCSubtargetInfo &STI);
112 const MCSubtargetInfo &STI)
117 OutStreamer.EmitInstruction(CallInst, STI);
122 const MCSubtargetInfo &STI)
128 OutStreamer.EmitInstruction(SETHIInst, STI);
133 const MCSubtargetInfo &STI)
140 OutStreamer.EmitInstruction(Inst, STI);
145 const MCSubtargetInfo &STI) {
146 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI);
151 const MCSubtargetInfo &STI) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.cpp | 98 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
107 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
114 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
150 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP;
157 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
|
| MipsAsmPrinter.h | 68 void EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol);
70 void EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode, unsigned Reg);
72 void EmitInstrRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
75 void EmitInstrRegRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
78 void EmitMovFPIntPair(const MCSubtargetInfo &STI, unsigned MovOpc,
82 void EmitSwapFPIntParams(const MCSubtargetInfo &STI,
86 void EmitSwapFPIntRetval(const MCSubtargetInfo &STI,
|
| MipsAsmPrinter.cpp | 700 const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM);
702 bool IsABICalls = STI.isABICalls();
723 STI.isNaN2008() ? getTargetStreamer().emitDirectiveNaN2008()
729 if (STI.isGP32bit())
737 getTargetStreamer().updateABIInfo(STI);
742 if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit()))
748 if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX()))
774 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol)
[all...] |
| Mips16FrameLowering.cpp | 32 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
33 : MipsFrameLowering(STI, STI.stackAlignment()) {}
40 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
92 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
164 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
|
| MipsMachineFunction.cpp | 38 MipsSubtarget const &STI =
42 STI.inMips16Mode()
44 : STI.inMicroMipsMode()
|
| MipsInstrInfo.h | 49 explicit MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc);
51 static const MipsInstrInfo *create(MipsSubtarget &STI);
146 const MipsInstrInfo *createMips16InstrInfo(const MipsSubtarget &STI);
147 const MipsInstrInfo *createMipsSEInstrInfo(const MipsSubtarget &STI);
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCShuffler.cpp | 40 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, *MI),
55 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, *AddMI),
63 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, *MI),
70 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, *AddMI),
101 bool llvm::HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
103 HexagonMCShuffler MCS(MCII, STI, MCB);
151 llvm::HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
179 HexagonMCShuffler MCS(MCII, STI, Attempt); // copy packet to the shuffler
195 HexagonMCShuffler MCS(MCII, STI, MCB);
205 bool llvm::HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 52 const MCSubtargetInfo &STI) {
58 if (printSysAlias(MI, STI, O)) {
221 if (!printAliasInstr(MI, STI, O))
222 printInstruction(MI, STI, O);
626 const MCSubtargetInfo &STI) {
636 printVectorList(MI, ListOpNum, STI, O, "");
650 printVectorList(MI, OpNum++, STI, O, "");
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86PadShortFunction.cpp | 54 , Threshold(4), STI(nullptr), TII(nullptr) {}
82 const X86Subtarget *STI;
100 STI = &MF.getSubtarget<X86Subtarget>();
101 if (!STI->padShortFunctions())
104 TII = STI->getInstrInfo();
194 CyclesToEnd += TII->getInstrLatency(STI->getInstrItineraryData(), MI);
|
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| BPFInstPrinter.h | 29 const MCSubtargetInfo &STI) override;
|
| /external/llvm/lib/Target/WebAssembly/InstPrinter/ |
| WebAssemblyInstPrinter.h | 33 const MCSubtargetInfo &STI) override;
|
