1 //===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsFrameLowering.h" 15 #include "MCTargetDesc/MipsBaseInfo.h" 16 #include "MipsAnalyzeImmediate.h" 17 #include "MipsInstrInfo.h" 18 #include "MipsMachineFunction.h" 19 #include "MipsTargetMachine.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineFunction.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineModuleInfo.h" 24 #include "llvm/CodeGen/MachineRegisterInfo.h" 25 #include "llvm/IR/DataLayout.h" 26 #include "llvm/IR/Function.h" 27 #include "llvm/Support/CommandLine.h" 28 #include "llvm/Target/TargetOptions.h" 29 30 using namespace llvm; 31 32 33 //===----------------------------------------------------------------------===// 34 // 35 // Stack Frame Processing methods 36 // +----------------------------+ 37 // 38 // The stack is allocated decrementing the stack pointer on 39 // the first instruction of a function prologue. Once decremented, 40 // all stack references are done thought a positive offset 41 // from the stack/frame pointer, so the stack is considering 42 // to grow up! Otherwise terrible hacks would have to be made 43 // to get this stack ABI compliant :) 44 // 45 // The stack frame required by the ABI (after call): 46 // Offset 47 // 48 // 0 ---------- 49 // 4 Args to pass 50 // . saved $GP (used in PIC) 51 // . Alloca allocations 52 // . Local Area 53 // . CPU "Callee Saved" Registers 54 // . saved FP 55 // . saved RA 56 // . FPU "Callee Saved" Registers 57 // StackSize ----------- 58 // 59 // Offset - offset from sp after stack allocation on function prologue 60 // 61 // The sp is the stack pointer subtracted/added from the stack size 62 // at the Prologue/Epilogue 63 // 64 // References to the previous stack (to obtain arguments) are done 65 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1)) 66 // 67 // Examples: 68 // - reference to the actual stack frame 69 // for any local area var there is smt like : FI >= 0, StackOffset: 4 70 // sw REGX, 4(SP) 71 // 72 // - reference to previous stack frame 73 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16. 74 // The emitted instruction will be something like: 75 // lw REGX, 16+StackSize(SP) 76 // 77 // Since the total stack size is unknown on LowerFormalArguments, all 78 // stack references (ObjectOffset) created to reference the function 79 // arguments, are negative numbers. This way, on eliminateFrameIndex it's 80 // possible to detect those references and the offsets are adjusted to 81 // their real location. 82 // 83 //===----------------------------------------------------------------------===// 84 85 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { 86 if (ST.inMips16Mode()) 87 return llvm::createMips16FrameLowering(ST); 88 89 return llvm::createMipsSEFrameLowering(ST); 90 } 91 92 // hasFP - Return true if the specified function should have a dedicated frame 93 // pointer register. This is true if the function has variable sized allocas, 94 // if it needs dynamic stack realignment, if frame pointer elimination is 95 // disabled, or if the frame address is taken. 96 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const { 97 const MachineFrameInfo *MFI = MF.getFrameInfo(); 98 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 99 100 return MF.getTarget().Options.DisableFramePointerElim(MF) || 101 MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken() || 102 TRI->needsStackRealignment(MF); 103 } 104 105 bool MipsFrameLowering::hasBP(const MachineFunction &MF) const { 106 const MachineFrameInfo *MFI = MF.getFrameInfo(); 107 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 108 109 return MFI->hasVarSizedObjects() && TRI->needsStackRealignment(MF); 110 } 111 112 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { 113 const MachineFrameInfo *MFI = MF.getFrameInfo(); 114 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); 115 116 int64_t Offset = 0; 117 118 // Iterate over fixed sized objects. 119 for (int I = MFI->getObjectIndexBegin(); I != 0; ++I) 120 Offset = std::max(Offset, -MFI->getObjectOffset(I)); 121 122 // Conservatively assume all callee-saved registers will be saved. 123 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { 124 unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize(); 125 Offset = RoundUpToAlignment(Offset + Size, Size); 126 } 127 128 unsigned MaxAlign = MFI->getMaxAlignment(); 129 130 // Check that MaxAlign is not zero if there is a stack object that is not a 131 // callee-saved spill. 132 assert(!MFI->getObjectIndexEnd() || MaxAlign); 133 134 // Iterate over other objects. 135 for (unsigned I = 0, E = MFI->getObjectIndexEnd(); I != E; ++I) 136 Offset = RoundUpToAlignment(Offset + MFI->getObjectSize(I), MaxAlign); 137 138 // Call frame. 139 if (MFI->adjustsStack() && hasReservedCallFrame(MF)) 140 Offset = RoundUpToAlignment(Offset + MFI->getMaxCallFrameSize(), 141 std::max(MaxAlign, getStackAlignment())); 142 143 return RoundUpToAlignment(Offset, getStackAlignment()); 144 } 145 146 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions 147 void MipsFrameLowering:: 148 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 149 MachineBasicBlock::iterator I) const { 150 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP; 151 152 if (!hasReservedCallFrame(MF)) { 153 int64_t Amount = I->getOperand(0).getImm(); 154 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) 155 Amount = -Amount; 156 157 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); 158 } 159 160 MBB.erase(I); 161 } 162
