| /external/llvm/lib/Target/X86/ |
| X86AsmPrinter.h | 46 void count(MCInst &Inst, const MCSubtargetInfo &STI);
57 void emitShadowPadding(MCStreamer &OutStreamer, const MCSubtargetInfo &STI);
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| X86CallFrameOptimization.cpp | 107 const X86Subtarget *STI;
131 if (STI->is64Bit())
137 if (STI->isTargetDarwin() &&
222 STI = &MF.getSubtarget<X86Subtarget>();
223 TII = STI->getInstrInfo();
224 TFL = STI->getFrameLowering();
319 STI->getRegisterInfo());
481 bool SlowPUSHrmm = STI->isAtom() || STI->isSLM();
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCTargetDesc.cpp | 83 const MCInst &Inst, const MCSubtargetInfo &STI) override {
89 InstPrinter.printInst(&Inst, TempStream, "", STI);
121 HexagonTargetELFStreamer(MCStreamer &S, MCSubtargetInfo const &STI)
123 auto Bits = STI.getFeatureBits();
198 createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI) {
199 return new HexagonTargetELFStreamer(S, STI);
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| HexagonMCELFStreamer.cpp | 39 const MCSubtargetInfo &STI) {
52 HexagonMCShuffle(*MCII, STI, *MCB);
77 MCObjectStreamer::EmitInstruction(*MCB, STI);
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| HexagonShuffler.h | 142 MCSubtargetInfo const &STI;
160 explicit HexagonShuffler(MCInstrInfo const &MCII, MCSubtargetInfo const &STI);
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| HexagonMCCodeEmitter.cpp | 69 MCSubtargetInfo const &STI) const {
81 EncodeSingleInstruction(HMI, OS, Fixups, STI,
94 const MCSubtargetInfo &STI, uint32_t Parse, size_t Index) const {
161 Binary = getBinaryCodeForInstr(HMB, Fixups, STI);
244 unsigned subInstSlot0Bits = getBinaryCodeForInstr(*subInst0, Fixups, STI);
246 unsigned subInstSlot1Bits = getBinaryCodeForInstr(*subInst1, Fixups, STI);
395 const MCSubtargetInfo &STI) const
408 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI);
409 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI);
724 MCSubtargetInfo const &STI) const
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 33 MipsInstrInfo::MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBr)
35 Subtarget(STI), UncondBrOpc(UncondBr) {}
37 const MipsInstrInfo *MipsInstrInfo::create(MipsSubtarget &STI) {
38 if (STI.inMips16Mode())
39 return llvm::createMips16InstrInfo(STI);
41 return llvm::createMipsSEInstrInfo(STI);
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| Mips16ISelLowering.h | 23 const MipsSubtarget &STI);
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| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.cpp | 69 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>();
70 const TargetInstrInfo &TII = *STI.getInstrInfo();
108 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>();
109 if (STI.isThumb1Only()) {
426 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>();
427 if (!STI.isThumb1Only())
430 const ARMBaseInstrInfo &TII = *STI.getInstrInfo();
450 const ARMSubtarget &STI = MBB.getParent()->getSubtarget<ARMSubtarget>();
451 if (!STI.isThumb1Only())
459 const TargetInstrInfo &TII = *STI.getInstrInfo()
[all...] |
| ARMBaseRegisterInfo.cpp | 51 static unsigned getFramePointerReg(const ARMSubtarget &STI) {
52 if (STI.isTargetMachO()) {
53 if (STI.isTargetDarwin() || STI.isThumb1Only())
57 } else if (STI.isTargetWindows())
60 return STI.isThumb() ? ARM::R7 : ARM::R11;
65 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>();
67 STI.isTargetDarwin() ? CSR_iOS_SaveList : CSR_AAPCS_SaveList;
75 if (STI.isMClass()) {
96 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>()
[all...] |
| Thumb1FrameLowering.cpp | 25 Thumb1FrameLowering::Thumb1FrameLowering(const ARMSubtarget &sti)
26 : ARMFrameLowering(sti) {}
56 *static_cast<const Thumb1InstrInfo *>(STI.getInstrInfo());
58 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
94 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
96 *static_cast<const Thumb1InstrInfo *>(STI.getInstrInfo());
154 if (STI.isTargetMachO()) {
192 if (tryFoldSPUpdateIntoPushPop(STI, MF, std::prev(MBBI), NumBytes)) {
216 if (STI.isTargetMachO())
279 if (STI.isTargetELF() && HasFP
[all...] |
| Thumb2ITBlockPass.cpp | 270 const ARMSubtarget &STI =
272 if (!STI.isThumb2())
275 TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
276 TRI = STI.getRegisterInfo();
277 restrictIT = STI.restrictIT();
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| ARMSubtarget.cpp | 81 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS);
82 if (STI.isThumb1Only())
83 return (ARMFrameLowering *)new Thumb1FrameLowering(STI);
85 return new ARMFrameLowering(STI);
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| Thumb2InstrInfo.h | 27 explicit Thumb2InstrInfo(const ARMSubtarget &STI);
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 44 bool is64BitMode(const MCSubtargetInfo &STI) const {
45 return STI.getFeatureBits()[X86::Mode64Bit];
48 bool is32BitMode(const MCSubtargetInfo &STI) const {
49 return STI.getFeatureBits()[X86::Mode32Bit];
52 bool is16BitMode(const MCSubtargetInfo &STI) const {
53 return STI.getFeatureBits()[X86::Mode16Bit];
59 const MCSubtargetInfo &STI) const {
64 if (is16BitMode(STI) && BaseReg.getReg() == 0 &&
150 const MCSubtargetInfo &STI) const;
154 const MCSubtargetInfo &STI) const override
[all...] |
| /external/llvm/lib/CodeGen/ |
| LLVMTargetMachine.cpp | 52 STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(),
168 const MCSubtargetInfo &STI = *getMCSubtargetInfo();
209 T, *Context, *MAB, Out, MCE, STI, Options.MCOptions.MCRelaxAll,
260 const MCSubtargetInfo &STI = *getMCSubtargetInfo();
262 T, *Ctx, *MAB, Out, MCE, STI, Options.MCOptions.MCRelaxAll,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGVLIW.cpp | 75 const TargetSubtargetInfo &STI = mf.getSubtarget();
76 HazardRec = STI.getInstrInfo()->CreateTargetHazardRecognizer(&STI, this);
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.h | 57 VLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SM)
59 ResourcesModel = STI.getInstrInfo()->CreateTargetScheduleState(STI);
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| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXCopy.cpp | 160 const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
161 if (!STI.hasVSX())
163 TII = STI.getInstrInfo();
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| /external/llvm/include/llvm/MC/ |
| MCTargetAsmParser.h | 98 MCTargetAsmParser(MCTargetOptions const &, const MCSubtargetInfo &STI);
100 /// Create a copy of STI and return a non-const reference to it.
116 /// Current STI.
117 const MCSubtargetInfo *STI;
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| /external/llvm/lib/MC/ |
| MCObjectStreamer.cpp | 229 const MCSubtargetInfo &STI) {
230 MCStreamer::EmitInstruction(Inst, STI);
242 EmitInstToData(Inst, STI);
257 EmitInstToData(Relaxed, STI);
262 EmitInstToFragment(Inst, STI);
266 const MCSubtargetInfo &STI) {
272 MCRelaxableFragment *IF = new MCRelaxableFragment(Inst, STI);
278 STI);
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCTargetDesc.h | 66 const MCSubtargetInfo &STI);
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| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.h | 47 explicit MSP430InstrInfo(MSP430Subtarget &STI);
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| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.h | 32 const MCSubtargetInfo &STI) override;
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| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 33 StringRef Annot, const MCSubtargetInfo &STI) {
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