| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| farcall-thumb-arm.s | 15 @ or no stub if blx is available.
|
| tls-descseq.d | 33 [0-9a-f]+: e12fff31 blx r1
41 [0-9a-f]+: 4788 blx r1
|
| arm-elf.exp | 256 {"Mixed ARM/Thumb shared library" "-shared -T arm-lib.ld -use-blx" "" ""
266 {"Mixed ARM/Thumb arch5 dynamic application" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx" "" ""
308 # there are no attributes to indicate that blx can be used.
402 {"ARM-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv5t" {farcall-arm-thumb.s}
403 {{objdump -d farcall-arm-thumb-blx.d}}
404 "farcall-arm-thumb-blx"}
408 {"ARM-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "-march=armv5t" {farcall-arm-thumb.s}
409 {{objdump -d farcall-arm-thumb-blx-pic-veneer.d}}
410 "farcall-arm-thumb-blx-pic-veneer"}
412 {"Thumb-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv5t" {farcall-thumb (…)
[all...] |
| tls-lib-loc.d | 31 [0-9a-f]+: fafffff2 blx 8154 <.*\+0x8154>
|
| cortex-a8-fix-blx-bcond.d | 1039 9f06: f7ff eff8 blx 9ef8 <arm_target>
1041 9f0e: f7ff eff4 blx 9ef8 <arm_target>
1043 9f16: f7ff eff0 blx 9ef8 <arm_target>
1045 9f1e: f7ff efec blx 9ef8 <arm_target>
1047 9f26: f7ff efe8 blx 9ef8 <arm_target>
1049 9f2e: f7ff efe4 blx 9ef8 <arm_target>
1051 9f36: f7ff efe0 blx 9ef8 <arm_target>
1053 9f3e: f7ff efdc blx 9ef8 <arm_target>
1055 9f46: f7ff efd8 blx 9ef8 <arm_target>
1057 9f4e: f7ff efd4 blx 9ef8 <arm_target
[all...] |
| farcall-mixed-app-v5.d | 38 .*: f7ff efdc blx .* <lib_func2@plt>
78 .*: f000 e806 blx .* <__lib_func2_from_thumb>
|
| mixed-app-v5.d | 53 .*: f7ff efc. blx .* <lib_func2@plt>
|
| /external/llvm/test/MC/ARM/ |
| coff-relocations.s | 38 blx r0
43 @ CHECK-ENCODING-NEXT: blx r0
|
| basic-thumb-instructions.s | 151 @ BL/BLX
153 blx #884800
154 blx #1769600
156 @ CHECK: blx #884800 @ encoding: [0xd8,0xf0,0x20,0xe8]
157 @ CHECK: blx #1769600 @ encoding: [0xb0,0xf1,0x40,0xe8]
178 @ BL/BLX (immediate)
181 blx _baz
187 @ CHECK: blx _baz @ encoding: [A,0xf0'A',A,0xc0'A']
189 @ CHECK-BE: blx _baz @ encoding: [0xf0'A',A,0xc0'A',A]
194 @ BLX (register
[all...] |
| basic-arm-instructions.s | 603 @ BL/BLX (immediate)
608 blx _bar
610 blx #32424576
611 blx #16212288
621 @ CHECK: blx _bar @ encoding: [A,A,A,0xfa]
623 @ CHECK-BE: blx _bar @ encoding: [0xfa,A,A,A]
626 @ CHECK: blx #32424576 @ encoding: [0xa0,0xb0,0x7b,0xfa]
627 @ CHECK: blx #16212288 @ encoding: [0x50,0xd8,0x3d,0xfa]
629 @ BLX (register)
631 blx r
[all...] |
| /external/v8/src/debug/arm/ |
| debug-arm.cc | 56 // blx ip
62 patcher.masm()->blx(ip);
|
| /art/runtime/arch/arm/ |
| quick_entrypoints_arm.S | 446 blx ip @ call the method
784 blx lr
788 blx lr
812 blx lr
[all...] |
| /external/llvm/test/MC/MachO/ARM/ |
| darwin-Thumb-reloc.s | 13 blx _printf
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb32.s | 208 @ bl, blx have no short form.
233 bra blx
237 blx r0
238 blx r9
|
| thumb2_bad_reg.s | 92 @ BLX (register)
93 blx r13 @ OK
94 blx r15
|
| thumb32.d | 325 0[0-9a-f]+ <[^>]+> f7ff efa6 blx 0+358 <[^>]+>
326 0[0-9a-f]+ <[^>]+> f000 e800 blx 0+410 <[^>]+>
328 0[0-9a-f]+ <[^>]+> 4780 blx r0
329 0[0-9a-f]+ <[^>]+> 47c8 blx r9
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 816 blx(scratch.AsCoreRegister());
829 blx(scratch.AsCoreRegister());
868 __ blx(R12);
[all...] |
| assembler_thumb2.h | 261 void blx(Label* label);
262 void blx(Register rm, Condition cond = AL) OVERRIDE;
416 kUnconditionalLinkX, // BLX.
[all...] |
| assembler_arm32.h | 216 void blx(Register rm, Condition cond = AL) OVERRIDE;
|
| assembler_arm32_test.cc | 846 TEST_F(AssemblerArm32Test, Blx) {
847 T2Helper(&arm::Arm32Assembler::blx, true, "blx{cond} {reg1}", "blx");
|
| /external/v8/src/arm/ |
| assembler-arm.h | 740 // blx ip
767 void blx(int branch_offset); // v5 and above
768 void blx(Register target, Condition cond = al); // v5 and above
776 void blx(Label* L); // v5 and above
[all...] |
| disasm-arm.cc | 895 case BLX:
896 Format(instr, "blx'cond 'rm");
[all...] |
| assembler-arm.cc | 444 B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX;
757 // blx ip
816 DCHECK_EQ(5 * B25, instr & 7 * B25); // b, bl, or blx imm24
820 // blx uses bit 24 to encode bit 2 of imm26
902 DCHECK_EQ(5 * B25, instr & 7 * B25); // b, bl, or blx imm24
904 // blx uses bit 24 to encode bit 2 of imm26
931 DCHECK((instr & 7*B25) == 5*B25); // b, bl, or blx
936 b = "blx";
1390 void Assembler::blx(int branch_offset) { \/\/ v5 and above function in class:v8::internal::Assembler
1399 void Assembler::blx(Register target, Condition cond) { \/\/ v5 and above function in class:v8::internal::Assembler
1423 void Assembler::blx(Label* L) { function in class:v8::internal::Assembler
[all...] |
| macro-assembler-arm.cc | 72 blx(target, cond);
115 // blx ip
120 // blx ip
124 blx(ip, cond);
164 // We use blx, like a call, but it does not return here. The link register is
170 blx(ip);
176 blx(ip);
185 // blx ip @ This never returns.
189 // blx ip @ This never returns.
[all...] |
