/dalvik/dx/src/com/android/dx/rop/code/ |
DexTranslationAdvice.java | 67 opcode.getOpcode() == RegOps.SUB) { 77 switch (opcode.getOpcode()) {
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Insn.java | 124 public final Rop getOpcode() { 157 if (opcode.getOpcode() == RegOps.MARK_LOCAL) { 187 * is just a convenient wrapper for {@code getOpcode().canThrow()}. 279 return opcode == b.getOpcode()
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/external/clang/lib/StaticAnalyzer/Checkers/ |
UndefResultChecker.cpp | 78 << BinaryOperator::getOpcodeStr(B->getOpcode()) 84 << BinaryOperator::getOpcodeStr(B->getOpcode())
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
DexTranslationAdvice.java | 67 opcode.getOpcode() == RegOps.SUB) { 77 switch (opcode.getOpcode()) {
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Insn.java | 124 public final Rop getOpcode() { 157 if (opcode.getOpcode() == RegOps.MARK_LOCAL) { 187 * is just a convenient wrapper for {@code getOpcode().canThrow()}. 279 return opcode == b.getOpcode()
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/external/llvm/lib/Target/AArch64/ |
AArch64AdvSIMDScalarPass.cpp | 140 if (MI->getOpcode() == AArch64::FMOVDXr || 141 MI->getOpcode() == AArch64::FMOVXDr) 145 if (MI->getOpcode() == AArch64::UMOVvi64 && MI->getOperand(2).getImm() == 0) { 151 if (MI->getOpcode() == AArch64::COPY) { 193 unsigned Opc = MI->getOpcode(); 261 else if (Use->getOpcode() == AArch64::INSERT_SUBREG || 262 Use->getOpcode() == AArch64::INSvi64gpr) 300 unsigned OldOpc = MI->getOpcode();
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AArch64LoadStoreOptimizer.cpp | 175 return isUnscaledLdSt(MI->getOpcode()); 179 switch (MI->getOpcode()) { 208 return isNarrowStore(MI->getOpcode()); 228 return isNarrowLoad(MI->getOpcode()); 233 switch (MI->getOpcode()) { 521 switch (MI->getOpcode()) { 586 SExtIdx == -1 ? I->getOpcode() : getMatchingNonSExtOpcode(I->getOpcode()); 664 if (RtMI->getOpcode() == getMatchingNonSExtOpcode(RtMI->getOpcode())) { [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyStoreResults.cpp | 81 switch (MI.getOpcode()) { 98 if (Where->getOpcode() == TargetOpcode::PHI) {
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/dalvik/dx/src/com/android/dx/ssa/ |
LiteralOpUpgrader.java | 96 Rop opcode = originalRopInsn.getOpcode(); 113 RegOps.flippedIfOpcode(opcode.getOpcode()), null); 116 opcode.getOpcode(), null); 147 Rop opcode = originalRopInsn.getOpcode(); 151 opcode.getOpcode() != RegOps.CONST) { 159 if (opcode.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
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/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
LiteralOpUpgrader.java | 97 Rop opcode = originalRopInsn.getOpcode(); 114 RegOps.flippedIfOpcode(opcode.getOpcode()), null); 117 opcode.getOpcode(), null); 148 Rop opcode = originalRopInsn.getOpcode(); 152 opcode.getOpcode() != RegOps.CONST) { 160 if (opcode.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
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/external/llvm/lib/Target/AMDGPU/ |
R600ClauseMergePass.cpp | 35 switch (MI->getOpcode()) { 77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); 83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); 115 if (RootCFAlu->getOpcode() == AMDGPU::CF_ALU_PUSH_BEFORE) 166 RootCFAlu->setDesc(TII->get(LatrCFAlu->getOpcode())); 180 TII->mustBeLastInClause(MI->getOpcode()))
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SILowerI1Copies.cpp | 89 if (MI.getOpcode() == AMDGPU::IMPLICIT_DEF) { 97 if (MI.getOpcode() != AMDGPU::COPY) 116 if (DefInst->getOpcode() == AMDGPU::S_MOV_B64) {
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/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 137 if (!DisableOptSZExt && MI->getOpcode() == Hexagon::A2_sxtw) { 156 MI->getOpcode () == Hexagon::A4_combineir) { 173 if (MI->getOpcode() == Hexagon::S2_lsr_i_p) { 188 (MI->getOpcode() == Hexagon::C2_not)) { 258 int NewOp = QII->getInvertedPredicatedOpcode(MI->getOpcode()); 268 unsigned Op = MI->getOpcode();
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
AnalyzedInstruction.java | 133 assert originalInstruction.getOpcode().odexOnly(); 138 assert originalInstruction.getOpcode().odexOnly(); 301 if (instruction == null || !instruction.getOpcode().canInitializeReference()) { 316 return instruction.getOpcode().setsRegister(); 320 return instruction.getOpcode().setsWideRegister(); 371 if (!this.instruction.getOpcode().setsRegister()) {
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/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.cpp | 46 if (MI->getOpcode() == SP::LDri || 47 MI->getOpcode() == SP::LDXri || 48 MI->getOpcode() == SP::LDFri || 49 MI->getOpcode() == SP::LDDFri || 50 MI->getOpcode() == SP::LDQFri) { 67 if (MI->getOpcode() == SP::STri || 68 MI->getOpcode() == SP::STXri || 69 MI->getOpcode() == SP::STFri || 70 MI->getOpcode() == SP::STDFri || 71 MI->getOpcode() == SP::STQFri) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.cpp | 198 switch (Inst.getOpcode()) { 250 switch (MI.getOpcode()) { 264 switch (MI->getOpcode()) { 293 switch (MI->getOpcode()) { 326 if (MI->getOpcode() != PPC::RLWIMI && 327 MI->getOpcode() != PPC::RLWIMIo) 411 int AltOpc = PPC::getAltVSXFMAOpcode(MI->getOpcode()); 464 if (LastInst->getOpcode() == PPC::B) { 469 } else if (LastInst->getOpcode() == PPC::BCC) { 477 } else if (LastInst->getOpcode() == PPC::BC) [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelDAGToDAG.cpp | 96 if (Addr.getOpcode() == ISD::ADD) { 118 switch (Op.getOpcode()) { 135 switch (N->getOpcode()) { 215 if (Chain->getOpcode() != ISD::TokenFactor) 237 if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN) 267 if (nextAddr->getOpcode() == XCoreISD::PCRelativeWrapper && 268 nextAddr->getOperand(0)->getOpcode() == ISD::TargetBlockAddress) {
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/external/llvm/lib/Analysis/ |
PHITransAddr.cpp | 34 if (Inst->getOpcode() == Instruction::Add && 201 return AddAsInput(ConstantExpr::getCast(Cast->getOpcode(), 208 if (CastI->getOpcode() == Cast->getOpcode() && 255 if (Inst->getOpcode() == Instruction::Add && 267 if (BOp->getOpcode() == Instruction::Add) 296 if (BO->getOpcode() == Instruction::Add && 390 CastInst *New = CastInst::Create(Cast->getOpcode(), OpVal, InVal->getType(), 424 if (Inst->getOpcode() == Instruction::Add &&
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonMCCompound.cpp | 86 switch (MI.getOpcode()) { 187 switch (HMCI.getOpcode()) { 211 switch (L.getOpcode()) { 351 unsigned Opca = MIa.getOpcode(); 386 DEBUG(dbgs() << "J,B: " << JumpInst->getOpcode() << "," 387 << Inst->getOpcode() << "\n"); 391 DEBUG(dbgs() << "B: " << Inst->getOpcode() << "," 392 << JumpInst->getOpcode() << " Compounds to " 393 << CompoundInsn->getOpcode() << "\n");
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
PPCMCCodeEmitter.cpp | 108 unsigned Opcode = MI.getOpcode(); 334 assert((MI.getOpcode() == PPC::MTOCRF || MI.getOpcode() == PPC::MTOCRF8 || 335 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && 348 assert((MI.getOpcode() != PPC::MTOCRF && MI.getOpcode() != PPC::MTOCRF8 && 349 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) ||
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/external/llvm/lib/Target/X86/ |
X86CallFrameOptimization.cpp | 154 if (MI.getOpcode() == FrameSetupOpcode) { 158 } else if (MI.getOpcode() == FrameDestroyOpcode) { 238 if (I->getOpcode() == FrameSetupOpcode) { 262 int Opcode = MI->getOpcode(); 323 assert(I->getOpcode() == TII->getCallFrameSetupOpcode()); 340 while (I->getOpcode() == X86::LEA32r) 422 if ((++I)->getOpcode() != FrameDestroyOpcode) 463 if (MOV->getOpcode() == X86::MOV32mi) { 547 if (DefMI->getOpcode() != X86::MOV32rm ||
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/dalvik/dx/src/com/android/dx/io/instructions/ |
InstructionCodec.java | 109 out.write(codeUnit(insn.getOpcode(), insn.getA())); 126 out.write(codeUnit(insn.getOpcode(), relativeTarget)); 162 codeUnit(insn.getOpcode(), insn.getLiteralByte()), 181 codeUnit(insn.getOpcode(), insn.getA()), 201 out.write(codeUnit(insn.getOpcode(), insn.getA()), relativeTarget); 219 codeUnit(insn.getOpcode(), insn.getA()), 246 int opcode = insn.getOpcode(); 269 codeUnit(insn.getOpcode(), insn.getA()), 290 codeUnit(insn.getOpcode(), insn.getA()), 311 codeUnit(insn.getOpcode(), insn.getA()) [all...] |
/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
InstructionCodec.java | 110 out.write(codeUnit(insn.getOpcode(), insn.getA())); 127 out.write(codeUnit(insn.getOpcode(), relativeTarget)); 163 codeUnit(insn.getOpcode(), insn.getLiteralByte()), 182 codeUnit(insn.getOpcode(), insn.getA()), 202 out.write(codeUnit(insn.getOpcode(), insn.getA()), relativeTarget); 220 codeUnit(insn.getOpcode(), insn.getA()), 247 int opcode = insn.getOpcode(); 270 codeUnit(insn.getOpcode(), insn.getA()), 291 codeUnit(insn.getOpcode(), insn.getA()), 312 codeUnit(insn.getOpcode(), insn.getA()) [all...] |
/external/smali/smalidea/src/main/java/org/jf/smalidea/dexlib/instruction/ |
SmalideaInstruction.java | 62 switch (instruction.getOpcode().format) { 124 @Nonnull public Opcode getOpcode() { 125 return psiInstruction.getOpcode(); 129 return getOpcode().format.size / 2; 217 return psiInstruction.getOpcode().referenceType;
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/external/llvm/lib/Target/SystemZ/ |
SystemZISelDAGToDAG.cpp | 182 if (SystemZISD::isPCREL(Addr.getOpcode())) { 434 unsigned Opcode = N.getOpcode(); 437 Opcode = N.getOpcode(); 443 unsigned Op0Code = Op0->getOpcode(); 444 unsigned Op1Code = Op1->getOpcode(); 502 if (Base->getOpcode() == ISD::FrameIndex) 531 unsigned IndexOpcode = Index->getOpcode(); 553 if (Addr.getOpcode() == ISD::Constant && 600 else if (Base.getOpcode() == ISD::FrameIndex) { 676 if (Index.getOpcode() == ISD::ZERO_EXTEND [all...] |