| /external/mockito/cglib-and-asm/src/org/mockito/cglib/core/ | 
| CodeEmitter.java | 244     public void math(int op, Type type) { mv.visitInsn(type.getOpcode(op)); } 246     public void array_load(Type type) { mv.visitInsn(type.getOpcode(Constants.IALOAD)); }
 247     public void array_store(Type type) { mv.visitInsn(type.getOpcode(Constants.IASTORE)); }
 399         mv.visitVarInsn(t.getOpcode(Constants.ILOAD), pos);
 404         mv.visitVarInsn(t.getOpcode(Constants.ISTORE), pos);
 420         mv.visitInsn(state.sig.getReturnType().getOpcode(Constants.IRETURN));
 
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| /external/llvm/lib/Target/Mips/AsmParser/ | 
| MipsAsmParser.cpp | [all...] | 
| /external/llvm/lib/Target/AArch64/Disassembler/ | 
| AArch64Disassembler.cpp | 617                                      Inst.getOpcode() != AArch64::LDRXl, 0, 4)) [all...]
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| /external/llvm/lib/Target/AMDGPU/ | 
| AMDILCFGStructurizer.cpp | 446     if (I->getOpcode() == AMDGPU::PRED_X) { 599   switch (MI->getOpcode()) {
 610   switch (MI->getOpcode()) {
 650       else if (!TII->isMov(MI->getOpcode()))
 661     if (instr->getOpcode() == AMDGPU::RETURN)
 671     if (MI->getOpcode() == AMDGPU::CONTINUE)
 728      if (Pre->getOpcode() == AMDGPU::CONTINUE
 729          && It->getOpcode() == AMDGPU::ENDLOOP)
 [all...]
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| /external/llvm/lib/Target/MSP430/ | 
| MSP430ISelLowering.cpp | 185   switch (Op.getOpcode()) { 738   unsigned Opc = Op.getOpcode();
 824     if (LHS.getOpcode() == ISD::Constant)
 [all...]
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| /external/llvm/lib/Target/Mips/Disassembler/ | 
| MipsDisassembler.cpp | [all...] | 
| /external/llvm/lib/Transforms/InstCombine/ | 
| InstCombineCasts.cpp | 46       if (I->getOpcode() == Instruction::Shl) { 53       if (I->getOpcode() == Instruction::Mul) {
 60       if (I->getOpcode() == Instruction::Add) {
 172   unsigned Opc = I->getOpcode();
 242   Instruction::CastOps firstOp = Instruction::CastOps(CI->getOpcode());
 295             isEliminableCastPair(CSrc, CI.getOpcode(), CI.getType(), DL)) {
 352   unsigned Opc = I->getOpcode();
 742   unsigned Opc = I->getOpcode(), Tmp;
 [all...]
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| InstCombineSimplifyDemanded.cpp | 159     if (I->getOpcode() == Instruction::And) { 180     } else if (I->getOpcode() == Instruction::Or) {
 208     } else if (I->getOpcode() == Instruction::Xor) {
 237   switch (I->getOpcode()) {
 384       if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
 [all...]
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| /external/llvm/lib/Target/Mips/ | 
| MipsConstantIslandPass.cpp | 82   switch (MI->getOpcode()) { 633   assert(CPEMI && CPEMI->getOpcode() == Mips::CONSTPOOL_ENTRY);
 679       int Opc = I->getOpcode();
 [all...]
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| MipsDelaySlotFiller.cpp | 514     (((unsigned) Branch->getOpcode()) == Mips::BEQ) ? Mips::BEQZC_MM 604           DSI->setDesc(TII->get(getEquivalentCallShort(DSI->getOpcode())));
 614     unsigned Opcode = I->getOpcode();
 690       if ((isBasePlusOffsetMemoryAccess(CurrI->getOpcode(), &AddrIdx) &&
 698     unsigned Opcode = (*Slot).getOpcode();
 
 | 
| /external/llvm/lib/Transforms/Vectorize/ | 
| LoopVectorize.cpp | [all...] | 
| /external/mesa3d/src/gallium/drivers/radeon/ | 
| AMDILPeepholeOptimizer.cpp | 402   if (base->getOpcode() == Instruction::Shl) { 404   } else if (base->getOpcode() == Instruction::And) {
 427   if (src->getOpcode() == Instruction::Shl && !shift) {
 430   } else if (src->getOpcode() == Instruction::And && !mask) {
 451   if (inst->getOpcode() != Instruction::Or) {
 691   if (inst->getOpcode() != Instruction::And) {
 739   if (ShiftInst->getOpcode() == Instruction::Shl) {
 [all...]
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| /external/clang/lib/Analysis/ | 
| CFG.cpp | 60   BinaryOperatorKind Op = B->getOpcode(); 667     BinaryOperatorKind Bok = B->getOpcode();
 699     if (BitOp && (BitOp->getOpcode() == BO_And ||
 700                   BitOp->getOpcode() == BO_Or)) {
 714       if ((BitOp->getOpcode() == BO_And && (L2 & L1) != L1) ||
 715           (BitOp->getOpcode() == BO_Or  && (L2 | L1) != L1)) {
 718                                                      B->getOpcode() != BO_EQ);
 719         TryResult(B->getOpcode() != BO_EQ);
 726       return TryResult(B->getOpcode() != BO_EQ);
 836       if (B->getOpcode() == BO_LAnd)
 [all...]
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| UninitializedValues.cpp | 390     switch (BO->getOpcode()) { 425   else if (BO->getOpcode() == BO_Assign || BO->getOpcode() == BO_Comma)
 465       if (UO && UO->getOpcode() == UO_AddrOf)
 746   if (BO->getOpcode() == BO_Assign) {
 
 | 
| /external/llvm/lib/Target/Hexagon/ | 
| HexagonISelLowering.cpp | [all...] | 
| HexagonCopyToCombine.cpp | 117   switch(MI->getOpcode()) { 159   if (I->getOpcode() == Hexagon::TFRI64_V4 ||
 160       I->getOpcode() == Hexagon::A2_tfrsi) {
 172   unsigned HiOpc = HighRegInst->getOpcode();
 173   unsigned LoOpc = LowRegInst->getOpcode();
 
 | 
| HexagonEarlyIfConv.cpp | 226   unsigned Opc = T1I->getOpcode(); 238   assert(T2I == B->end() || T2I->getOpcode() == Hexagon::J2_jump);
 352     unsigned Opc = MI.getOpcode();
 619   unsigned Opc = MI->getOpcode();
 717   unsigned Opc = MI->getOpcode();
 [all...]
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ | 
| nv50_ir_from_tgsi.cpp | 156    inline uint getOpcode() const { return insn->Instruction.Opcode; } 187       return translateOpcode(getOpcode()); }
 363    switch (getOpcode()) {
 404    switch (getOpcode()) {
 419    switch (getOpcode()) {
 945    return insn.getOpcode() == TGSI_OPCODE_MOV &&
 [all...]
 | 
| /external/clang/include/clang/AST/ | 
| Expr.h | [all...] | 
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ | 
| HexagonMCInstrInfo.cpp | 190   return (MCII.get(MCI.getOpcode())); 255   return MCII.getName(MCI.getOpcode());
 366   auto Result = Hexagon::BUNDLE == MCI.getOpcode();
 413            (MCI.getOpcode() != Hexagon::C4_addipc))
 453   auto Op = MCI.getOpcode();
 
 | 
| /external/llvm/lib/Target/Sparc/ | 
| SparcISelLowering.cpp | [all...] | 
| /external/llvm/lib/Target/AArch64/ | 
| AArch64FastISel.cpp | 518       Opcode = I->getOpcode(); 522     Opcode = C->getOpcode();
 689       if (AI->getOpcode() == Instruction::And) {
 865     Opcode = I->getOpcode();
 869     Opcode = C->getOpcode();
 [all...]
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| /external/llvm/lib/CodeGen/SelectionDAG/ | 
| ScheduleDAGRRList.cpp | 289     if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) { 417     if (N->getOpcode() == ISD::TokenFactor) {
 443     if (N->getOpcode() == ISD::EntryToken)
 464     if (N->getOpcode() == ISD::TokenFactor) {
 503     if (N->getOpcode() == ISD::EntryToken)
 672   switch (SU->getNode()->getOpcode()) {
 [all...]
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| /dalvik/dx/src/com/android/dx/ssa/ | 
| SsaMethod.java | 690                     && insn.getOpcode().getOpcode() == RegOps.MARK_LOCAL) { 842                     || lastInsn.getOriginalRopInsn().getOpcode()
 
 | 
| /external/clang/lib/StaticAnalyzer/Core/ | 
| SymbolManager.cpp | 34      << BinaryOperator::getOpcodeStr(getOpcode()) << ' ' 45      << BinaryOperator::getOpcodeStr(getOpcode())
 55      << BinaryOperator::getOpcodeStr(getOpcode())
 
 |