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  /external/llvm/test/MC/Mips/msa/
test_elm.s 8 sldi.b $w0, $w29[4] # CHECK: sldi.b $w0, $w29[4] # encoding: [0x78,0x04,0xe8,0x19]
9 sldi.h $w8, $w17[0] # CHECK: sldi.h $w8, $w17[0] # encoding: [0x78,0x20,0x8a,0x19]
10 sldi.w $w20, $w27[2] # CHECK: sldi.w $w20, $w27[2] # encoding: [0x78,0x32,0xdd,0x19]
11 sldi.d $w4, $w12[0] # CHECK: sldi.d $w4, $w12[0] # encoding: [0x78,0x38,0x61,0x19]
invalid-64.s 43 sldi.b $w0, $w29[-1] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
44 sldi.b $w0, $w29[16] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
45 sldi.d $w4, $w12[-1] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
46 sldi.d $w4, $w12[2] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
47 sldi.h $w8, $w17[-1] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
48 sldi.h $w8, $w17[8] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
49 sldi.w $w20, $w27[-1] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
50 sldi.w $w20, $w27[4] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
invalid.s 44 sldi.b $w0, $w29[-1] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
45 sldi.b $w0, $w29[16] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
46 sldi.d $w4, $w12[-1] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
47 sldi.d $w4, $w12[2] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
48 sldi.h $w8, $w17[-1] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
49 sldi.h $w8, $w17[8] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
50 sldi.w $w20, $w27[-1] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
51 sldi.w $w20, $w27[4] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
  /external/llvm/test/CodeGen/PowerPC/
arr-fp-arg-no-copy.ll 14 ; CHECK-DAG: sldi 3, [[REG1]], 52
15 ; CHECK-DAG: sldi 4, [[REG2]], 62
variable_elem_vec_extracts.ll 17 ; CHECK-DAG: sldi [[SHIFTREG:[0-9]+]], [[MASKREG]], 2
22 ; CHECK-DAG: sldi [[SHAMREG:[0-9]+]], [[ELEMSREG]], 5
26 ; CHECK-P7-DAG: sldi [[ELEMOFFREG:[0-9]+]], 5, 2
30 ; CHECK-BE-DAG: sldi [[SLREG:[0-9]+]], [[ANDREG]], 2
35 ; CHECK-BE-DAG: sldi [[SHAMREG:[0-9]+]], [[ANDCREG]], 5
51 ; CHECK-DAG: sldi [[SHIFTREG:[0-9]+]], [[MASKREG]], 3
55 ; CHECK-P7-DAG: sldi [[ELEMOFFREG:[0-9]+]], 5, 3
59 ; CHECK-BE-DAG: sldi [[SLREG:[0-9]+]], [[ANDREG]], 3
78 ; CHECK-P7-DAG: sldi [[ELEMOFFREG:[0-9]+]], 5, 2
81 ; CHECK-BE: sldi [[ELNOREG:[0-9]+]], 5,
    [all...]
fp128-bitcast-after-operation.ll 15 ; PPC64: sldi [[MASK_REG]], [[MASK_REG]], 63
27 ; PPC64-P8-DAG: sldi [[SHIFT_REG:[0-9]+]], [[MASK_REG]], 63
57 ; PPC64-DAG: sldi [[FLIP_BIT]], [[FLIP_BIT]], 63
69 ; PPC64-P8-DAG: sldi [[FLIP_BIT]], [[IMM1]], 63
97 ; PPC64-DAG: sldi [[SIGN]], [[SIGN]], 63
99 ; PPC64-DAG: sldi [[CST_HI:[0-9]+]], [[HI_TMP]], 48
101 ; PPC64-DAG: sldi [[CST_LO:[0-9]+]], [[LO_TMP]], 52
112 ; PPC64-P8-DAG: sldi [[SIGN]], [[SIGN]], 63
114 ; PPC64-P8-DAG: sldi [[CST_HI:[0-9]+]], [[HI_TMP]], 48
116 ; PPC64-P8-DAG: sldi [[CST_LO:[0-9]+]], [[LO_TMP]], 5
    [all...]
2011-12-08-DemandedBitsMiscompile.ll 13 ; CHECK: sldi {{.*}}, {{.*}}, 32
store-update.ll 47 ; CHECK-NEXT: sldi
70 ; CHECK-NEXT: sldi
119 ; CHECK-NEXT: sldi
144 ; CHECK-NEXT: sldi
167 ; CHECK-NEXT: sldi
bperm.ll 50 ; CHECK-DAG: sldi [[REG2:[0-9]+]], [[REG1]], 19
65 ; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 32
81 ; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 34
108 ; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 19
153 ; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 19
173 ; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 32
194 ; CHECK-DAG: sldi [[REG4:[0-9]+]], [[REG2]], 25
195 ; CHECK-DAG: sldi [[REG5:[0-9]+]], [[REG3]], 37
constants-i64.ll 34 ; CHECK: sldi 3, [[REG1]], 36
45 ; CHECK: sldi 3, [[REG1]], 30
ppc64le-aggregates.ll 239 ; CHECK-DAG: sldi [[REG1]], [[REG1]], 32
240 ; CHECK-DAG: sldi [[REG3]], [[REG3]], 32
285 ; CHECK-DAG: sldi [[REG2:[0-9]+]], [[REG1]], 32
fast-isel-ret.ll 155 ; ELF64: sldi
p8-scalar_vector_conversions.ll 19 ; CHECK: sldi [[REG1:[0-9]+]], 3, 56
34 ; CHECK: sldi [[REG1:[0-9]+]], 3, 48
49 ; CHECK: sldi [[REG1:[0-9]+]], 3, 32
687 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
698 ; CHECK-DAG-LE: sldi [[SHL:[0-9]+]], [[AND]], 3
721 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
732 ; CHECK-DAG-LE: sldi [[SHL:[0-9]+]], [[AND]], 3
1033 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
1039 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 4
1045 ; CHECK-DAG-LE: sldi [[MUL2:[0-9]+]], [[ANDC]],
    [all...]
  /external/llvm/test/MC/Disassembler/Mips/msa/
test_elm.txt 8 0x78 0x04 0xe8 0x19 # CHECK: sldi.b $w0, $w29[4]
9 0x78 0x20 0x8a 0x19 # CHECK: sldi.h $w8, $w17[0]
10 0x78 0x32 0xdd 0x19 # CHECK: sldi.w $w20, $w27[2]
11 0x78 0x38 0x61 0x19 # CHECK: sldi.d $w4, $w12[0]
  /external/llvm/test/CodeGen/Mips/msa/
elm_shift_slide.ll 15 %2 = tail call <16 x i8> @llvm.mips.sldi.b(<16 x i8> %0, <16 x i8> %1, i32 1)
20 declare <16 x i8> @llvm.mips.sldi.b(<16 x i8>, <16 x i8>, i32) nounwind
24 ; CHECK: sldi.b
36 %2 = tail call <8 x i16> @llvm.mips.sldi.h(<8 x i16> %0, <8 x i16> %1, i32 1)
41 declare <8 x i16> @llvm.mips.sldi.h(<8 x i16>, <8 x i16>, i32) nounwind
45 ; CHECK: sldi.h
57 %2 = tail call <4 x i32> @llvm.mips.sldi.w(<4 x i32> %0, <4 x i32> %1, i32 1)
62 declare <4 x i32> @llvm.mips.sldi.w(<4 x i32>, <4 x i32>, i32) nounwind
66 ; CHECK: sldi.w
78 %2 = tail call <2 x i64> @llvm.mips.sldi.d(<2 x i64> %0, <2 x i64> %1, i32 1
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/
simpshft.s 6 sldi %r5,%r5,8
39 sldi %r4,%r3,0
40 sldi %r4,%r3,63
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
msa.s 380 sldi.b $w10,$w11[0]
381 sldi.b $w12,$w13[15]
382 sldi.h $w14,$w15[0]
383 sldi.h $w16,$w17[7]
384 sldi.w $w18,$w19[0]
385 sldi.w $w20,$w21[3]
386 sldi.d $w22,$w23[0]
387 sldi.d $w24,$w25[1]
micromips@msa.d 383 [0-9a-f]+ <[^>]*> 5800 5a96 sldi\.b \$w10,\$w11\[0\]
384 [0-9a-f]+ <[^>]*> 580f 6b16 sldi\.b \$w12,\$w13\[15\]
385 [0-9a-f]+ <[^>]*> 5820 7b96 sldi\.h \$w14,\$w15\[0\]
386 [0-9a-f]+ <[^>]*> 5827 8c16 sldi\.h \$w16,\$w17\[7\]
387 [0-9a-f]+ <[^>]*> 5830 9c96 sldi\.w \$w18,\$w19\[0\]
388 [0-9a-f]+ <[^>]*> 5833 ad16 sldi\.w \$w20,\$w21\[3\]
389 [0-9a-f]+ <[^>]*> 5838 bd96 sldi\.d \$w22,\$w23\[0\]
390 [0-9a-f]+ <[^>]*> 5839 ce16 sldi\.d \$w24,\$w25\[1\]
    [all...]
mipsr6@msa.d 383 [0-9a-f]+ <[^>]*> 78005a99 sldi\.b \$w10,\$w11\[0\]
384 [0-9a-f]+ <[^>]*> 780f6b19 sldi\.b \$w12,\$w13\[15\]
385 [0-9a-f]+ <[^>]*> 78207b99 sldi\.h \$w14,\$w15\[0\]
386 [0-9a-f]+ <[^>]*> 78278c19 sldi\.h \$w16,\$w17\[7\]
387 [0-9a-f]+ <[^>]*> 78309c99 sldi\.w \$w18,\$w19\[0\]
388 [0-9a-f]+ <[^>]*> 7833ad19 sldi\.w \$w20,\$w21\[3\]
389 [0-9a-f]+ <[^>]*> 7838bd99 sldi\.d \$w22,\$w23\[0\]
390 [0-9a-f]+ <[^>]*> 7839ce19 sldi\.d \$w24,\$w25\[1\]
    [all...]
msa.d 382 [0-9a-f]+ <[^>]*> 78005a99 sldi\.b \$w10,\$w11\[0\]
383 [0-9a-f]+ <[^>]*> 780f6b19 sldi\.b \$w12,\$w13\[15\]
384 [0-9a-f]+ <[^>]*> 78207b99 sldi\.h \$w14,\$w15\[0\]
385 [0-9a-f]+ <[^>]*> 78278c19 sldi\.h \$w16,\$w17\[7\]
386 [0-9a-f]+ <[^>]*> 78309c99 sldi\.w \$w18,\$w19\[0\]
387 [0-9a-f]+ <[^>]*> 7833ad19 sldi\.w \$w20,\$w21\[3\]
388 [0-9a-f]+ <[^>]*> 7838bd99 sldi\.d \$w22,\$w23\[0\]
389 [0-9a-f]+ <[^>]*> 7839ce19 sldi\.d \$w24,\$w25\[1\]
    [all...]
  /external/valgrind/coregrind/m_syswrap/
syswrap-ppc64-linux.c 259 " sldi 4,4,32\n" // CR now in hi half r4
261 " sldi 3,3,32\n"
331 " sldi 4,4,32\n" // CR now in hi half r4
333 " sldi 3,3,32\n"
    [all...]
  /external/llvm/lib/Target/PowerPC/InstPrinter/
PPCInstPrinter.cpp 95 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
  /external/clang/test/CodeGen/
builtins-mips-msa.c     [all...]
  /external/valgrind/coregrind/m_dispatch/
dispatch-ppc64be-linux.S 472 sldi 4,4,4 /* entry# * sizeof(FastCacheEntry) */
dispatch-ppc64le-linux.S 537 sldi 4,4,4 /* entry# * sizeof(FastCacheEntry) */

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