1 %default {"preinstr":""} 2 /* 3 * Generic 32-bit unary operation. Provide an "instr" line that 4 * specifies an instruction that performs "result = op w0". 5 * This could be an ARM instruction or a function call. 6 * 7 * for: neg-int, not-int, neg-float, int-to-float, float-to-int, 8 * int-to-byte, int-to-char, int-to-short 9 */ 10 /* unop vA, vB */ 11 lsr w3, wINST, #12 // w3<- B 12 GET_VREG w0, w3 // w0<- vB 13 ubfx w9, wINST, #8, #4 // w9<- A 14 $preinstr // optional op; may set condition codes 15 FETCH_ADVANCE_INST 1 // advance rPC, load rINST 16 $instr // w0<- op, w0-w3 changed 17 GET_INST_OPCODE ip // extract opcode from rINST 18 SET_VREG w0, w9 // vAA<- w0 19 GOTO_OPCODE ip // jump to next instruction 20 /* 8-9 instructions */ 21
