1 //===-- HexagonSubtarget.cpp - Hexagon Subtarget Information --------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the Hexagon specific subclass of TargetSubtarget. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "HexagonSubtarget.h" 15 #include "Hexagon.h" 16 #include "HexagonRegisterInfo.h" 17 #include "llvm/Support/CommandLine.h" 18 #include "llvm/Support/ErrorHandling.h" 19 #include <map> 20 21 using namespace llvm; 22 23 #define DEBUG_TYPE "hexagon-subtarget" 24 25 #define GET_SUBTARGETINFO_CTOR 26 #define GET_SUBTARGETINFO_TARGET_DESC 27 #include "HexagonGenSubtargetInfo.inc" 28 29 static cl::opt<bool> EnableMemOps("enable-hexagon-memops", 30 cl::Hidden, cl::ZeroOrMore, cl::ValueDisallowed, cl::init(true), 31 cl::desc("Generate V4 MEMOP in code generation for Hexagon target")); 32 33 static cl::opt<bool> DisableMemOps("disable-hexagon-memops", 34 cl::Hidden, cl::ZeroOrMore, cl::ValueDisallowed, cl::init(false), 35 cl::desc("Do not generate V4 MEMOP in code generation for Hexagon target")); 36 37 static cl::opt<bool> EnableIEEERndNear("enable-hexagon-ieee-rnd-near", 38 cl::Hidden, cl::ZeroOrMore, cl::init(false), 39 cl::desc("Generate non-chopped conversion from fp to int.")); 40 41 static cl::opt<bool> EnableBSBSched("enable-bsb-sched", 42 cl::Hidden, cl::ZeroOrMore, cl::init(true)); 43 44 static cl::opt<bool> EnableHexagonHVXDouble("enable-hexagon-hvx-double", 45 cl::Hidden, cl::ZeroOrMore, cl::init(false), 46 cl::desc("Enable Hexagon Double Vector eXtensions")); 47 48 static cl::opt<bool> EnableHexagonHVX("enable-hexagon-hvx", 49 cl::Hidden, cl::ZeroOrMore, cl::init(false), 50 cl::desc("Enable Hexagon Vector eXtensions")); 51 52 static cl::opt<bool> DisableHexagonMISched("disable-hexagon-misched", 53 cl::Hidden, cl::ZeroOrMore, cl::init(false), 54 cl::desc("Disable Hexagon MI Scheduling")); 55 56 void HexagonSubtarget::initializeEnvironment() { 57 UseMemOps = false; 58 ModeIEEERndNear = false; 59 UseBSBScheduling = false; 60 } 61 62 HexagonSubtarget & 63 HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { 64 CPUString = HEXAGON_MC::selectHexagonCPU(getTargetTriple(), CPU); 65 66 static std::map<StringRef, HexagonArchEnum> CpuTable { 67 { "hexagonv4", V4 }, 68 { "hexagonv5", V5 }, 69 { "hexagonv55", V55 }, 70 { "hexagonv60", V60 }, 71 }; 72 73 auto foundIt = CpuTable.find(CPUString); 74 if (foundIt != CpuTable.end()) 75 HexagonArchVersion = foundIt->second; 76 else 77 llvm_unreachable("Unrecognized Hexagon processor version"); 78 79 UseHVXOps = false; 80 UseHVXDblOps = false; 81 ParseSubtargetFeatures(CPUString, FS); 82 83 if (EnableHexagonHVX.getPosition()) 84 UseHVXOps = EnableHexagonHVX; 85 if (EnableHexagonHVXDouble.getPosition()) 86 UseHVXDblOps = EnableHexagonHVXDouble; 87 88 return *this; 89 } 90 91 HexagonSubtarget::HexagonSubtarget(const Triple &TT, StringRef CPU, 92 StringRef FS, const TargetMachine &TM) 93 : HexagonGenSubtargetInfo(TT, CPU, FS), CPUString(CPU), 94 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), 95 FrameLowering() { 96 97 initializeEnvironment(); 98 99 // Initialize scheduling itinerary for the specified CPU. 100 InstrItins = getInstrItineraryForCPU(CPUString); 101 102 // UseMemOps on by default unless disabled explicitly 103 if (DisableMemOps) 104 UseMemOps = false; 105 else if (EnableMemOps) 106 UseMemOps = true; 107 else 108 UseMemOps = false; 109 110 if (EnableIEEERndNear) 111 ModeIEEERndNear = true; 112 else 113 ModeIEEERndNear = false; 114 115 UseBSBScheduling = hasV60TOps() && EnableBSBSched; 116 } 117 118 // Pin the vtable to this file. 119 void HexagonSubtarget::anchor() {} 120 121 bool HexagonSubtarget::enableMachineScheduler() const { 122 if (DisableHexagonMISched.getNumOccurrences()) 123 return !DisableHexagonMISched; 124 return true; 125 } 126