1 //===----------------------------------------------------------------------===// 2 // MicroMIPS Base Classes 3 //===----------------------------------------------------------------------===// 4 5 // 6 // Base class for MicroMips instructions. 7 // This class does not depend on the instruction size. 8 // 9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern, 10 InstrItinClass itin, Format f> : Instruction 11 { 12 let Namespace = "Mips"; 13 let DecoderNamespace = "MicroMips"; 14 15 let OutOperandList = outs; 16 let InOperandList = ins; 17 18 let AsmString = asmstr; 19 let Pattern = pattern; 20 let Itinerary = itin; 21 22 let Predicates = [InMicroMips]; 23 24 Format Form = f; 25 } 26 27 // 28 // Base class for MicroMIPS 16-bit instructions. 29 // 30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 31 InstrItinClass itin, Format f> : 32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f> 33 { 34 let Size = 2; 35 field bits<16> Inst; 36 field bits<16> SoftFail = 0; 37 bits<6> Opcode = 0x0; 38 } 39 40 //===----------------------------------------------------------------------===// 41 // MicroMIPS 16-bit Instruction Formats 42 //===----------------------------------------------------------------------===// 43 44 class ARITH_FM_MM16<bit funct> { 45 bits<3> rd; 46 bits<3> rt; 47 bits<3> rs; 48 49 bits<16> Inst; 50 51 let Inst{15-10} = 0x01; 52 let Inst{9-7} = rd; 53 let Inst{6-4} = rt; 54 let Inst{3-1} = rs; 55 let Inst{0} = funct; 56 } 57 58 class ANDI_FM_MM16<bits<6> funct> { 59 bits<3> rd; 60 bits<3> rs; 61 bits<4> imm; 62 63 bits<16> Inst; 64 65 let Inst{15-10} = funct; 66 let Inst{9-7} = rd; 67 let Inst{6-4} = rs; 68 let Inst{3-0} = imm; 69 } 70 71 class LOGIC_FM_MM16<bits<4> funct> { 72 bits<3> rt; 73 bits<3> rs; 74 75 bits<16> Inst; 76 77 let Inst{15-10} = 0x11; 78 let Inst{9-6} = funct; 79 let Inst{5-3} = rt; 80 let Inst{2-0} = rs; 81 } 82 83 class SHIFT_FM_MM16<bits<1> funct> { 84 bits<3> rd; 85 bits<3> rt; 86 bits<3> shamt; 87 88 bits<16> Inst; 89 90 let Inst{15-10} = 0x09; 91 let Inst{9-7} = rd; 92 let Inst{6-4} = rt; 93 let Inst{3-1} = shamt; 94 let Inst{0} = funct; 95 } 96 97 class ADDIUR2_FM_MM16 { 98 bits<3> rd; 99 bits<3> rs; 100 bits<3> imm; 101 102 bits<16> Inst; 103 104 let Inst{15-10} = 0x1b; 105 let Inst{9-7} = rd; 106 let Inst{6-4} = rs; 107 let Inst{3-1} = imm; 108 let Inst{0} = 0; 109 } 110 111 class LOAD_STORE_FM_MM16<bits<6> op> { 112 bits<3> rt; 113 bits<7> addr; 114 115 bits<16> Inst; 116 117 let Inst{15-10} = op; 118 let Inst{9-7} = rt; 119 let Inst{6-4} = addr{6-4}; 120 let Inst{3-0} = addr{3-0}; 121 } 122 123 class LOAD_STORE_SP_FM_MM16<bits<6> op> { 124 bits<5> rt; 125 bits<5> offset; 126 127 bits<16> Inst; 128 129 let Inst{15-10} = op; 130 let Inst{9-5} = rt; 131 let Inst{4-0} = offset; 132 } 133 134 class LOAD_GP_FM_MM16<bits<6> op> { 135 bits<3> rt; 136 bits<7> offset; 137 138 bits<16> Inst; 139 140 let Inst{15-10} = op; 141 let Inst{9-7} = rt; 142 let Inst{6-0} = offset; 143 } 144 145 class ADDIUS5_FM_MM16 { 146 bits<5> rd; 147 bits<4> imm; 148 149 bits<16> Inst; 150 151 let Inst{15-10} = 0x13; 152 let Inst{9-5} = rd; 153 let Inst{4-1} = imm; 154 let Inst{0} = 0; 155 } 156 157 class ADDIUSP_FM_MM16 { 158 bits<9> imm; 159 160 bits<16> Inst; 161 162 let Inst{15-10} = 0x13; 163 let Inst{9-1} = imm; 164 let Inst{0} = 1; 165 } 166 167 class MOVE_FM_MM16<bits<6> funct> { 168 bits<5> rs; 169 bits<5> rd; 170 171 bits<16> Inst; 172 173 let Inst{15-10} = funct; 174 let Inst{9-5} = rd; 175 let Inst{4-0} = rs; 176 } 177 178 class LI_FM_MM16 { 179 bits<3> rd; 180 bits<7> imm; 181 182 bits<16> Inst; 183 184 let Inst{15-10} = 0x3b; 185 let Inst{9-7} = rd; 186 let Inst{6-0} = imm; 187 } 188 189 class JALR_FM_MM16<bits<5> op> { 190 bits<5> rs; 191 192 bits<16> Inst; 193 194 let Inst{15-10} = 0x11; 195 let Inst{9-5} = op; 196 let Inst{4-0} = rs; 197 } 198 199 class MFHILO_FM_MM16<bits<5> funct> { 200 bits<5> rd; 201 202 bits<16> Inst; 203 204 let Inst{15-10} = 0x11; 205 let Inst{9-5} = funct; 206 let Inst{4-0} = rd; 207 } 208 209 class JRADDIUSP_FM_MM16<bits<5> op> { 210 bits<5> rs; 211 bits<5> imm; 212 213 bits<16> Inst; 214 215 let Inst{15-10} = 0x11; 216 let Inst{9-5} = op; 217 let Inst{4-0} = imm; 218 } 219 220 class ADDIUR1SP_FM_MM16 { 221 bits<3> rd; 222 bits<6> imm; 223 224 bits<16> Inst; 225 226 let Inst{15-10} = 0x1b; 227 let Inst{9-7} = rd; 228 let Inst{6-1} = imm; 229 let Inst{0} = 1; 230 } 231 232 class BRKSDBBP16_FM_MM<bits<6> op> { 233 bits<4> code_; 234 bits<16> Inst; 235 236 let Inst{15-10} = 0x11; 237 let Inst{9-4} = op; 238 let Inst{3-0} = code_; 239 } 240 241 class BEQNEZ_FM_MM16<bits<6> op> { 242 bits<3> rs; 243 bits<7> offset; 244 245 bits<16> Inst; 246 247 let Inst{15-10} = op; 248 let Inst{9-7} = rs; 249 let Inst{6-0} = offset; 250 } 251 252 class B16_FM { 253 bits<10> offset; 254 255 bits<16> Inst; 256 257 let Inst{15-10} = 0x33; 258 let Inst{9-0} = offset; 259 } 260 261 class MOVEP_FM_MM16 { 262 bits<3> dst_regs; 263 bits<3> rt; 264 bits<3> rs; 265 266 bits<16> Inst; 267 268 let Inst{15-10} = 0x21; 269 let Inst{9-7} = dst_regs; 270 let Inst{6-4} = rt; 271 let Inst{3-1} = rs; 272 let Inst{0} = 0; 273 } 274 275 //===----------------------------------------------------------------------===// 276 // MicroMIPS 32-bit Instruction Formats 277 //===----------------------------------------------------------------------===// 278 279 class MMArch { 280 string Arch = "micromips"; 281 list<dag> Pattern = []; 282 } 283 284 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch { 285 bits<5> rt; 286 bits<5> rs; 287 bits<5> rd; 288 289 bits<32> Inst; 290 291 let Inst{31-26} = op; 292 let Inst{25-21} = rt; 293 let Inst{20-16} = rs; 294 let Inst{15-11} = rd; 295 let Inst{10} = 0; 296 let Inst{9-0} = funct; 297 } 298 299 class ADDI_FM_MM<bits<6> op> : MMArch { 300 bits<5> rs; 301 bits<5> rt; 302 bits<16> imm16; 303 304 bits<32> Inst; 305 306 let Inst{31-26} = op; 307 let Inst{25-21} = rt; 308 let Inst{20-16} = rs; 309 let Inst{15-0} = imm16; 310 } 311 312 class SLTI_FM_MM<bits<6> op> : MMArch { 313 bits<5> rt; 314 bits<5> rs; 315 bits<16> imm16; 316 317 bits<32> Inst; 318 319 let Inst{31-26} = op; 320 let Inst{25-21} = rt; 321 let Inst{20-16} = rs; 322 let Inst{15-0} = imm16; 323 } 324 325 class LUI_FM_MM : MMArch { 326 bits<5> rt; 327 bits<16> imm16; 328 329 bits<32> Inst; 330 331 let Inst{31-26} = 0x10; 332 let Inst{25-21} = 0xd; 333 let Inst{20-16} = rt; 334 let Inst{15-0} = imm16; 335 } 336 337 class MULT_FM_MM<bits<10> funct> : MMArch { 338 bits<5> rs; 339 bits<5> rt; 340 341 bits<32> Inst; 342 343 let Inst{31-26} = 0x00; 344 let Inst{25-21} = rt; 345 let Inst{20-16} = rs; 346 let Inst{15-6} = funct; 347 let Inst{5-0} = 0x3c; 348 } 349 350 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch { 351 bits<5> rd; 352 bits<5> rt; 353 bits<5> shamt; 354 355 bits<32> Inst; 356 357 let Inst{31-26} = 0; 358 let Inst{25-21} = rd; 359 let Inst{20-16} = rt; 360 let Inst{15-11} = shamt; 361 let Inst{10} = rotate; 362 let Inst{9-0} = funct; 363 } 364 365 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch { 366 bits<5> rd; 367 bits<5> rt; 368 bits<5> rs; 369 370 bits<32> Inst; 371 372 let Inst{31-26} = 0; 373 let Inst{25-21} = rt; 374 let Inst{20-16} = rs; 375 let Inst{15-11} = rd; 376 let Inst{10} = rotate; 377 let Inst{9-0} = funct; 378 } 379 380 class LW_FM_MM<bits<6> op> : MMArch { 381 bits<5> rt; 382 bits<21> addr; 383 384 bits<32> Inst; 385 386 let Inst{31-26} = op; 387 let Inst{25-21} = rt; 388 let Inst{20-16} = addr{20-16}; 389 let Inst{15-0} = addr{15-0}; 390 } 391 392 class POOL32C_LHUE_FM_MM<bits<6> op, bits<4> fmt, bits<3> funct> : MMArch { 393 bits<5> rt; 394 bits<21> addr; 395 bits<5> base = addr{20-16}; 396 bits<9> offset = addr{8-0}; 397 398 bits<32> Inst; 399 400 let Inst{31-26} = op; 401 let Inst{25-21} = rt; 402 let Inst{20-16} = base; 403 let Inst{15-12} = fmt; 404 let Inst{11-9} = funct; 405 let Inst{8-0} = offset; 406 } 407 408 class LWL_FM_MM<bits<4> funct> { 409 bits<5> rt; 410 bits<21> addr; 411 412 bits<32> Inst; 413 414 let Inst{31-26} = 0x18; 415 let Inst{25-21} = rt; 416 let Inst{20-16} = addr{20-16}; 417 let Inst{15-12} = funct; 418 let Inst{11-0} = addr{11-0}; 419 } 420 421 class POOL32C_STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> { 422 bits<5> rt; 423 bits<21> addr; 424 bits<5> base = addr{20-16}; 425 bits<9> offset = addr{8-0}; 426 427 bits<32> Inst; 428 429 let Inst{31-26} = 0x18; 430 let Inst{25-21} = rt; 431 let Inst{20-16} = base; 432 let Inst{15-12} = type; 433 let Inst{11-9} = funct; 434 let Inst{8-0} = offset; 435 } 436 437 class CMov_F_I_FM_MM<bits<7> func> : MMArch { 438 bits<5> rd; 439 bits<5> rs; 440 bits<3> fcc; 441 442 bits<32> Inst; 443 444 let Inst{31-26} = 0x15; 445 let Inst{25-21} = rd; 446 let Inst{20-16} = rs; 447 let Inst{15-13} = fcc; 448 let Inst{12-6} = func; 449 let Inst{5-0} = 0x3b; 450 } 451 452 class MTLO_FM_MM<bits<10> funct> : MMArch { 453 bits<5> rs; 454 455 bits<32> Inst; 456 457 let Inst{31-26} = 0x00; 458 let Inst{25-21} = 0x00; 459 let Inst{20-16} = rs; 460 let Inst{15-6} = funct; 461 let Inst{5-0} = 0x3c; 462 } 463 464 class MFLO_FM_MM<bits<10> funct> : MMArch { 465 bits<5> rd; 466 467 bits<32> Inst; 468 469 let Inst{31-26} = 0x00; 470 let Inst{25-21} = 0x00; 471 let Inst{20-16} = rd; 472 let Inst{15-6} = funct; 473 let Inst{5-0} = 0x3c; 474 } 475 476 class CLO_FM_MM<bits<10> funct> : MMArch { 477 bits<5> rd; 478 bits<5> rs; 479 480 bits<32> Inst; 481 482 let Inst{31-26} = 0x00; 483 let Inst{25-21} = rd; 484 let Inst{20-16} = rs; 485 let Inst{15-6} = funct; 486 let Inst{5-0} = 0x3c; 487 } 488 489 class SEB_FM_MM<bits<10> funct> : MMArch { 490 bits<5> rd; 491 bits<5> rt; 492 493 bits<32> Inst; 494 495 let Inst{31-26} = 0x00; 496 let Inst{25-21} = rd; 497 let Inst{20-16} = rt; 498 let Inst{15-6} = funct; 499 let Inst{5-0} = 0x3c; 500 } 501 502 class EXT_FM_MM<bits<6> funct> : MMArch { 503 bits<5> rt; 504 bits<5> rs; 505 bits<5> pos; 506 bits<5> size; 507 508 bits<32> Inst; 509 510 let Inst{31-26} = 0x00; 511 let Inst{25-21} = rt; 512 let Inst{20-16} = rs; 513 let Inst{15-11} = size; 514 let Inst{10-6} = pos; 515 let Inst{5-0} = funct; 516 } 517 518 class J_FM_MM<bits<6> op> : MMArch { 519 bits<26> target; 520 521 bits<32> Inst; 522 523 let Inst{31-26} = op; 524 let Inst{25-0} = target; 525 } 526 527 class JR_FM_MM<bits<8> funct> : MMArch { 528 bits<5> rs; 529 530 bits<32> Inst; 531 532 let Inst{31-21} = 0x00; 533 let Inst{20-16} = rs; 534 let Inst{15-14} = 0x0; 535 let Inst{13-6} = funct; 536 let Inst{5-0} = 0x3c; 537 } 538 539 class JALR_FM_MM<bits<10> funct> { 540 bits<5> rs; 541 bits<5> rd; 542 543 bits<32> Inst; 544 545 let Inst{31-26} = 0x00; 546 let Inst{25-21} = rd; 547 let Inst{20-16} = rs; 548 let Inst{15-6} = funct; 549 let Inst{5-0} = 0x3c; 550 } 551 552 class BEQ_FM_MM<bits<6> op> : MMArch { 553 bits<5> rs; 554 bits<5> rt; 555 bits<16> offset; 556 557 bits<32> Inst; 558 559 let Inst{31-26} = op; 560 let Inst{25-21} = rt; 561 let Inst{20-16} = rs; 562 let Inst{15-0} = offset; 563 } 564 565 class BGEZ_FM_MM<bits<5> funct> : MMArch { 566 bits<5> rs; 567 bits<16> offset; 568 569 bits<32> Inst; 570 571 let Inst{31-26} = 0x10; 572 let Inst{25-21} = funct; 573 let Inst{20-16} = rs; 574 let Inst{15-0} = offset; 575 } 576 577 class BGEZAL_FM_MM<bits<5> funct> : MMArch { 578 bits<5> rs; 579 bits<16> offset; 580 581 bits<32> Inst; 582 583 let Inst{31-26} = 0x10; 584 let Inst{25-21} = funct; 585 let Inst{20-16} = rs; 586 let Inst{15-0} = offset; 587 } 588 589 class SYNC_FM_MM : MMArch { 590 bits<5> stype; 591 592 bits<32> Inst; 593 594 let Inst{31-26} = 0x00; 595 let Inst{25-21} = 0x0; 596 let Inst{20-16} = stype; 597 let Inst{15-6} = 0x1ad; 598 let Inst{5-0} = 0x3c; 599 } 600 601 class BRK_FM_MM : MMArch { 602 bits<10> code_1; 603 bits<10> code_2; 604 bits<32> Inst; 605 let Inst{31-26} = 0x0; 606 let Inst{25-16} = code_1; 607 let Inst{15-6} = code_2; 608 let Inst{5-0} = 0x07; 609 } 610 611 class SYS_FM_MM : MMArch { 612 bits<10> code_; 613 bits<32> Inst; 614 let Inst{31-26} = 0x0; 615 let Inst{25-16} = code_; 616 let Inst{15-6} = 0x22d; 617 let Inst{5-0} = 0x3c; 618 } 619 620 class WAIT_FM_MM { 621 bits<10> code_; 622 bits<32> Inst; 623 624 let Inst{31-26} = 0x00; 625 let Inst{25-16} = code_; 626 let Inst{15-6} = 0x24d; 627 let Inst{5-0} = 0x3c; 628 } 629 630 class ER_FM_MM<bits<10> funct> : MMArch { 631 bits<32> Inst; 632 633 let Inst{31-26} = 0x00; 634 let Inst{25-16} = 0x00; 635 let Inst{15-6} = funct; 636 let Inst{5-0} = 0x3c; 637 } 638 639 class EI_FM_MM<bits<10> funct> : MMArch { 640 bits<32> Inst; 641 bits<5> rt; 642 643 let Inst{31-26} = 0x00; 644 let Inst{25-21} = 0x00; 645 let Inst{20-16} = rt; 646 let Inst{15-6} = funct; 647 let Inst{5-0} = 0x3c; 648 } 649 650 class TEQ_FM_MM<bits<6> funct> : MMArch { 651 bits<5> rs; 652 bits<5> rt; 653 bits<4> code_; 654 655 bits<32> Inst; 656 657 let Inst{31-26} = 0x00; 658 let Inst{25-21} = rt; 659 let Inst{20-16} = rs; 660 let Inst{15-12} = code_; 661 let Inst{11-6} = funct; 662 let Inst{5-0} = 0x3c; 663 } 664 665 class TEQI_FM_MM<bits<5> funct> : MMArch { 666 bits<5> rs; 667 bits<16> imm16; 668 669 bits<32> Inst; 670 671 let Inst{31-26} = 0x10; 672 let Inst{25-21} = funct; 673 let Inst{20-16} = rs; 674 let Inst{15-0} = imm16; 675 } 676 677 class LL_FM_MM<bits<4> funct> { 678 bits<5> rt; 679 bits<21> addr; 680 681 bits<32> Inst; 682 683 let Inst{31-26} = 0x18; 684 let Inst{25-21} = rt; 685 let Inst{20-16} = addr{20-16}; 686 let Inst{15-12} = funct; 687 let Inst{11-0} = addr{11-0}; 688 } 689 690 class LLE_FM_MM<bits<4> funct> { 691 bits<5> rt; 692 bits<21> addr; 693 bits<5> base = addr{20-16}; 694 bits<9> offset = addr{8-0}; 695 696 bits<32> Inst; 697 698 let Inst{31-26} = 0x18; 699 let Inst{25-21} = rt; 700 let Inst{20-16} = base; 701 let Inst{15-12} = funct; 702 let Inst{11-9} = 0x6; 703 let Inst{8-0} = offset; 704 } 705 706 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch { 707 bits<5> ft; 708 bits<5> fs; 709 bits<5> fd; 710 711 bits<32> Inst; 712 713 let Inst{31-26} = 0x15; 714 let Inst{25-21} = ft; 715 let Inst{20-16} = fs; 716 let Inst{15-11} = fd; 717 let Inst{10} = 0; 718 let Inst{9-8} = fmt; 719 let Inst{7-0} = funct; 720 721 list<dag> Pattern = []; 722 } 723 724 class LWXC1_FM_MM<bits<9> funct> : MMArch { 725 bits<5> fd; 726 bits<5> base; 727 bits<5> index; 728 729 bits<32> Inst; 730 731 let Inst{31-26} = 0x15; 732 let Inst{25-21} = index; 733 let Inst{20-16} = base; 734 let Inst{15-11} = fd; 735 let Inst{10-9} = 0x0; 736 let Inst{8-0} = funct; 737 } 738 739 class SWXC1_FM_MM<bits<9> funct> : MMArch { 740 bits<5> fs; 741 bits<5> base; 742 bits<5> index; 743 744 bits<32> Inst; 745 746 let Inst{31-26} = 0x15; 747 let Inst{25-21} = index; 748 let Inst{20-16} = base; 749 let Inst{15-11} = fs; 750 let Inst{10-9} = 0x0; 751 let Inst{8-0} = funct; 752 } 753 754 class CEQS_FM_MM<bits<2> fmt> : MMArch { 755 bits<5> fs; 756 bits<5> ft; 757 bits<4> cond; 758 759 bits<32> Inst; 760 761 let Inst{31-26} = 0x15; 762 let Inst{25-21} = ft; 763 let Inst{20-16} = fs; 764 let Inst{15-13} = 0x0; // cc 765 let Inst{12} = 0; 766 let Inst{11-10} = fmt; 767 let Inst{9-6} = cond; 768 let Inst{5-0} = 0x3c; 769 } 770 771 class BC1F_FM_MM<bits<5> tf> : MMArch { 772 bits<16> offset; 773 774 bits<32> Inst; 775 776 let Inst{31-26} = 0x10; 777 let Inst{25-21} = tf; 778 let Inst{20-18} = 0x0; // cc 779 let Inst{17-16} = 0x0; 780 let Inst{15-0} = offset; 781 } 782 783 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch { 784 bits<5> fd; 785 bits<5> fs; 786 787 bits<32> Inst; 788 789 let Inst{31-26} = 0x15; 790 let Inst{25-21} = fd; 791 let Inst{20-16} = fs; 792 let Inst{15} = 0; 793 let Inst{14} = fmt; 794 let Inst{13-6} = funct; 795 let Inst{5-0} = 0x3b; 796 } 797 798 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch { 799 bits<5> fd; 800 bits<5> fs; 801 802 bits<32> Inst; 803 804 let Inst{31-26} = 0x15; 805 let Inst{25-21} = fd; 806 let Inst{20-16} = fs; 807 let Inst{15} = 0; 808 let Inst{14-13} = fmt; 809 let Inst{12-6} = funct; 810 let Inst{5-0} = 0x3b; 811 } 812 813 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch { 814 bits<5> fd; 815 bits<5> fs; 816 817 bits<32> Inst; 818 819 let Inst{31-26} = 0x15; 820 let Inst{25-21} = fd; 821 let Inst{20-16} = fs; 822 let Inst{15-13} = 0x0; //cc 823 let Inst{12-11} = 0x0; 824 let Inst{10-9} = fmt; 825 let Inst{8-0} = func; 826 } 827 828 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch { 829 bits<5> fd; 830 bits<5> fs; 831 bits<5> rt; 832 833 bits<32> Inst; 834 835 let Inst{31-26} = 0x15; 836 let Inst{25-21} = rt; 837 let Inst{20-16} = fs; 838 let Inst{15-11} = fd; 839 let Inst{9-8} = fmt; 840 let Inst{7-0} = funct; 841 } 842 843 class MFC1_FM_MM<bits<8> funct> : MMArch { 844 bits<5> rt; 845 bits<5> fs; 846 847 bits<32> Inst; 848 849 let Inst{31-26} = 0x15; 850 let Inst{25-21} = rt; 851 let Inst{20-16} = fs; 852 let Inst{15-14} = 0x0; 853 let Inst{13-6} = funct; 854 let Inst{5-0} = 0x3b; 855 } 856 857 class MADDS_FM_MM<bits<6> funct>: MMArch { 858 bits<5> ft; 859 bits<5> fs; 860 bits<5> fd; 861 bits<5> fr; 862 863 bits<32> Inst; 864 865 let Inst{31-26} = 0x15; 866 let Inst{25-21} = ft; 867 let Inst{20-16} = fs; 868 let Inst{15-11} = fd; 869 let Inst{10-6} = fr; 870 let Inst{5-0} = funct; 871 } 872 873 class COMPACT_BRANCH_FM_MM<bits<5> funct> { 874 bits<5> rs; 875 bits<16> offset; 876 877 bits<32> Inst; 878 879 let Inst{31-26} = 0x10; 880 let Inst{25-21} = funct; 881 let Inst{20-16} = rs; 882 let Inst{15-0} = offset; 883 } 884 885 class COP0_TLB_FM_MM<bits<10> op> : MMArch { 886 bits<32> Inst; 887 888 let Inst{31-26} = 0x0; 889 let Inst{25-16} = 0x0; 890 let Inst{15-6} = op; 891 let Inst{5-0} = 0x3c; 892 } 893 894 class SDBBP_FM_MM : MMArch { 895 bits<10> code_; 896 897 bits<32> Inst; 898 899 let Inst{31-26} = 0x0; 900 let Inst{25-16} = code_; 901 let Inst{15-6} = 0x36d; 902 let Inst{5-0} = 0x3c; 903 } 904 905 class RDHWR_FM_MM : MMArch { 906 bits<5> rt; 907 bits<5> rd; 908 909 bits<32> Inst; 910 911 let Inst{31-26} = 0x0; 912 let Inst{25-21} = rt; 913 let Inst{20-16} = rd; 914 let Inst{15-6} = 0x1ac; 915 let Inst{5-0} = 0x3c; 916 } 917 918 class LWXS_FM_MM<bits<10> funct> { 919 bits<5> rd; 920 bits<5> base; 921 bits<5> index; 922 923 bits<32> Inst; 924 925 let Inst{31-26} = 0x0; 926 let Inst{25-21} = index; 927 let Inst{20-16} = base; 928 let Inst{15-11} = rd; 929 let Inst{10} = 0; 930 let Inst{9-0} = funct; 931 } 932 933 class LWM_FM_MM<bits<4> funct> : MMArch { 934 bits<5> rt; 935 bits<21> addr; 936 937 bits<32> Inst; 938 939 let Inst{31-26} = 0x8; 940 let Inst{25-21} = rt; 941 let Inst{20-16} = addr{20-16}; 942 let Inst{15-12} = funct; 943 let Inst{11-0} = addr{11-0}; 944 } 945 946 class LWM_FM_MM16<bits<4> funct> : MMArch, PredicateControl { 947 bits<2> rt; 948 bits<4> addr; 949 950 bits<16> Inst; 951 952 let Inst{15-10} = 0x11; 953 let Inst{9-6} = funct; 954 let Inst{5-4} = rt; 955 let Inst{3-0} = addr; 956 } 957 958 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch { 959 bits<21> addr; 960 bits<5> hint; 961 bits<5> base = addr{20-16}; 962 bits<12> offset = addr{11-0}; 963 964 bits<32> Inst; 965 966 let Inst{31-26} = op; 967 let Inst{25-21} = hint; 968 let Inst{20-16} = base; 969 let Inst{15-12} = funct; 970 let Inst{11-0} = offset; 971 } 972 973 class CACHE_PREFE_FM_MM<bits<6> op, bits<3> funct> : MMArch { 974 bits<21> addr; 975 bits<5> hint; 976 bits<5> base = addr{20-16}; 977 bits<9> offset = addr{8-0}; 978 979 bits<32> Inst; 980 981 let Inst{31-26} = op; 982 let Inst{25-21} = hint; 983 let Inst{20-16} = base; 984 let Inst{15-12} = 0xA; 985 let Inst{11-9} = funct; 986 let Inst{8-0} = offset; 987 } 988 989 class POOL32F_PREFX_FM_MM<bits<6> op, bits<9> funct> : MMArch { 990 bits<5> index; 991 bits<5> base; 992 bits<5> hint; 993 994 bits<32> Inst; 995 996 let Inst{31-26} = op; 997 let Inst{25-21} = index; 998 let Inst{20-16} = base; 999 let Inst{15-11} = hint; 1000 let Inst{10-9} = 0x0; 1001 let Inst{8-0} = funct; 1002 } 1003 1004 class BARRIER_FM_MM<bits<5> op> : MMArch { 1005 bits<32> Inst; 1006 1007 let Inst{31-26} = 0x0; 1008 let Inst{25-21} = 0x0; 1009 let Inst{20-16} = 0x0; 1010 let Inst{15-11} = op; 1011 let Inst{10-6} = 0x0; 1012 let Inst{5-0} = 0x0; 1013 } 1014 1015 class ADDIUPC_FM_MM { 1016 bits<3> rs; 1017 bits<23> imm; 1018 1019 bits<32> Inst; 1020 1021 let Inst{31-26} = 0x1e; 1022 let Inst{25-23} = rs; 1023 let Inst{22-0} = imm; 1024 } 1025
