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      1 ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600
      2 ; RUN: llc < %s -march=amdgcn --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI
      3 ; RUN: llc < %s -march=amdgcn --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI
      4 
      5 ; R600-LABEL: {{^}}sqrt_f32:
      6 ; R600: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
      7 ; R600: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
      8 ; SI-LABEL: {{^}}sqrt_f32:
      9 ; SI: v_sqrt_f32_e32
     10 define void @sqrt_f32(float addrspace(1)* %out, float %in) {
     11 entry:
     12   %0 = call float @llvm.sqrt.f32(float %in)
     13   store float %0, float addrspace(1)* %out
     14   ret void
     15 }
     16 
     17 ; R600-LABEL: {{^}}sqrt_v2f32:
     18 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
     19 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
     20 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
     21 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
     22 ; SI-LABEL: {{^}}sqrt_v2f32:
     23 ; SI: v_sqrt_f32_e32
     24 ; SI: v_sqrt_f32_e32
     25 define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
     26 entry:
     27   %0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
     28   store <2 x float> %0, <2 x float> addrspace(1)* %out
     29   ret void
     30 }
     31 
     32 ; R600-LABEL: {{^}}sqrt_v4f32:
     33 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
     34 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
     35 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
     36 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
     37 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
     38 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
     39 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
     40 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
     41 ; SI-LABEL: {{^}}sqrt_v4f32:
     42 ; SI: v_sqrt_f32_e32
     43 ; SI: v_sqrt_f32_e32
     44 ; SI: v_sqrt_f32_e32
     45 ; SI: v_sqrt_f32_e32
     46 define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
     47 entry:
     48   %0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
     49   store <4 x float> %0, <4 x float> addrspace(1)* %out
     50   ret void
     51 }
     52 
     53 ; SI-LABEL: {{^}}elim_redun_check:
     54 ; SI: v_sqrt_f32_e32
     55 ; SI-NOT: v_cndmask
     56 define void @elim_redun_check(float addrspace(1)* %out, float %in) {
     57 entry:
     58   %sqrt = call float @llvm.sqrt.f32(float %in)
     59   %cmp = fcmp olt float %in, -0.000000e+00
     60   %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt
     61   store float %res, float addrspace(1)* %out
     62   ret void
     63 }
     64 
     65 ; SI-LABEL: {{^}}elim_redun_check_ult:
     66 ; SI: v_sqrt_f32_e32
     67 ; SI-NOT: v_cndmask
     68 define void @elim_redun_check_ult(float addrspace(1)* %out, float %in) {
     69 entry:
     70   %sqrt = call float @llvm.sqrt.f32(float %in)
     71   %cmp = fcmp ult float %in, -0.000000e+00
     72   %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt
     73   store float %res, float addrspace(1)* %out
     74   ret void
     75 }
     76 
     77 ; SI-LABEL: {{^}}elim_redun_check_v2:
     78 ; SI: v_sqrt_f32_e32
     79 ; SI: v_sqrt_f32_e32
     80 ; SI-NOT: v_cndmask
     81 define void @elim_redun_check_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) {
     82 entry:
     83   %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
     84   %cmp = fcmp olt <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>
     85   %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt
     86   store <2 x float> %res, <2 x float> addrspace(1)* %out
     87   ret void
     88 }
     89 
     90 ; SI-LABEL: {{^}}elim_redun_check_v2_ult
     91 ; SI: v_sqrt_f32_e32
     92 ; SI: v_sqrt_f32_e32
     93 ; SI-NOT: v_cndmask
     94 define void @elim_redun_check_v2_ult(<2 x float> addrspace(1)* %out, <2 x float> %in) {
     95 entry:
     96   %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
     97   %cmp = fcmp ult <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>
     98   %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt
     99   store <2 x float> %res, <2 x float> addrspace(1)* %out
    100   ret void
    101 }
    102 
    103 declare float @llvm.sqrt.f32(float %in)
    104 declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
    105 declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
    106