1 ; RUN: llc -march=hexagon -O2 -mcpu=hexagonv60 < %s | FileCheck %s 2 3 ; Look for an instruction, we really just do not want to see an abort. 4 ; CHECK: trace_event 5 ; REQUIRES: asserts 6 7 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32" 8 target triple = "hexagon-unknown--elf" 9 10 ; Function Attrs: nounwind 11 define void @_ZN6Halide7Runtime8Internal13default_traceEPvPK18halide_trace_event() #0 { 12 entry: 13 br i1 undef, label %if.then, label %if.else 14 15 if.then: ; preds = %entry 16 br label %while.cond 17 18 while.cond: ; preds = %while.cond, %if.then 19 br i1 undef, label %while.cond, label %while.end 20 21 while.end: ; preds = %while.cond 22 %add = add i32 undef, 48 23 br i1 undef, label %if.end, label %if.then17 24 25 if.then17: ; preds = %while.end 26 unreachable 27 28 if.end: ; preds = %while.end 29 %arrayidx21 = getelementptr inbounds [4096 x i8], [4096 x i8]* undef, i32 0, i32 8 30 store i8 undef, i8* %arrayidx21, align 4, !tbaa !1 31 br i1 undef, label %for.body42.preheader6, label %min.iters.checked 32 33 for.body42.preheader6: ; preds = %vector.body.preheader, %min.iters.checked, %if.end 34 unreachable 35 36 min.iters.checked: ; preds = %if.end 37 br i1 undef, label %for.body42.preheader6, label %vector.body.preheader 38 39 vector.body.preheader: ; preds = %min.iters.checked 40 br i1 undef, label %for.cond48.preheader, label %for.body42.preheader6 41 42 for.cond48.preheader: ; preds = %vector.body.preheader 43 br i1 undef, label %while.cond.i, label %for.body61.lr.ph 44 45 for.body61.lr.ph: ; preds = %for.cond48.preheader 46 br i1 undef, label %for.body61, label %min.iters.checked595 47 48 min.iters.checked595: ; preds = %for.body61.lr.ph 49 br i1 undef, label %for.body61, label %vector.memcheck608 50 51 vector.memcheck608: ; preds = %min.iters.checked595 52 %scevgep600 = getelementptr [4096 x i8], [4096 x i8]* undef, i32 0, i32 %add 53 %bound0604 = icmp ule i8* %scevgep600, undef 54 %memcheck.conflict607 = and i1 undef, %bound0604 55 br i1 %memcheck.conflict607, label %for.body61, label %vector.body590 56 57 vector.body590: ; preds = %vector.body590, %vector.memcheck608 58 br i1 undef, label %middle.block591, label %vector.body590, !llvm.loop !4 59 60 middle.block591: ; preds = %vector.body590 61 %cmp.n613 = icmp eq i32 undef, 0 62 br i1 %cmp.n613, label %while.cond.i, label %for.body61 63 64 while.cond.i: ; preds = %for.body61, %while.cond.i, %middle.block591, %for.cond48.preheader 65 br i1 undef, label %_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit, label %while.cond.i 66 67 _ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit: ; preds = %while.cond.i 68 unreachable 69 70 for.body61: ; preds = %for.body61, %middle.block591, %vector.memcheck608, %min.iters.checked595, %for.body61.lr.ph 71 %cmp59 = icmp ult i32 undef, undef 72 br i1 %cmp59, label %for.body61, label %while.cond.i, !llvm.loop !7 73 74 if.else: ; preds = %entry 75 unreachable 76 } 77 78 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 79 80 !llvm.module.flags = !{!0} 81 82 !0 = !{i32 2, !"halide_mattrs", !"+hvx"} 83 !1 = !{!2, !2, i64 0} 84 !2 = !{!"omnipotent char", !3, i64 0} 85 !3 = !{!"Simple C/C++ TBAA"} 86 !4 = distinct !{!4, !5, !6} 87 !5 = !{!"llvm.loop.vectorize.width", i32 1} 88 !6 = !{!"llvm.loop.interleave.count", i32 1} 89 !7 = distinct !{!7, !5, !6} 90
