1 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hsdr < %s | FileCheck %s 2 ; This one should generate a combine with two immediates. 3 ; CHECK: combine(#7, #7) 4 @B = common global [400 x i32] zeroinitializer, align 8 5 @A = common global [400 x i32] zeroinitializer, align 8 6 @C = common global [400 x i32] zeroinitializer, align 8 7 8 define void @run() nounwind { 9 entry: 10 br label %polly.loop_body 11 12 polly.loop_after: ; preds = %polly.loop_body 13 ret void 14 15 polly.loop_body: ; preds = %entry, %polly.loop_body 16 %polly.loopiv23 = phi i32 [ 0, %entry ], [ %polly.next_loopiv, %polly.loop_body ] 17 %polly.next_loopiv = add nsw i32 %polly.loopiv23, 4 18 %p_arrayidx1 = getelementptr [400 x i32], [400 x i32]* @A, i32 0, i32 %polly.loopiv23 19 %p_arrayidx = getelementptr [400 x i32], [400 x i32]* @B, i32 0, i32 %polly.loopiv23 20 %vector_ptr = bitcast i32* %p_arrayidx to <4 x i32>* 21 %_p_vec_full = load <4 x i32>, <4 x i32>* %vector_ptr, align 8 22 %mulp_vec = mul <4 x i32> %_p_vec_full, <i32 7, i32 7, i32 7, i32 7> 23 %vector_ptr12 = bitcast i32* %p_arrayidx1 to <4 x i32>* 24 %_p_vec_full13 = load <4 x i32>, <4 x i32>* %vector_ptr12, align 8 25 %addp_vec = add <4 x i32> %_p_vec_full13, %mulp_vec 26 store <4 x i32> %addp_vec, <4 x i32>* %vector_ptr12, align 8 27 %0 = icmp slt i32 %polly.next_loopiv, 400 28 br i1 %0, label %polly.loop_body, label %polly.loop_after 29 } 30
