1 ; Test the handling of the frame pointer (%r11). 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -disable-fp-elim | FileCheck %s 4 5 ; We should always initialise %r11 when FP elimination is disabled. 6 ; We don't need to allocate any more than the caller-provided 160-byte 7 ; area though. 8 define i32 @f1(i32 %x) { 9 ; CHECK-LABEL: f1: 10 ; CHECK: stmg %r11, %r15, 88(%r15) 11 ; CHECK: .cfi_offset %r11, -72 12 ; CHECK: .cfi_offset %r15, -40 13 ; CHECK-NOT: ag 14 ; CHECK: lgr %r11, %r15 15 ; CHECK: .cfi_def_cfa_register %r11 16 ; CHECK: lmg %r11, %r15, 88(%r11) 17 ; CHECK: br %r14 18 %y = add i32 %x, 1 19 ret i32 %y 20 } 21 22 ; Make sure that frame accesses after the initial allocation are relative 23 ; to %r11 rather than %r15. 24 define void @f2(i64 %x) { 25 ; CHECK-LABEL: f2: 26 ; CHECK: stmg %r11, %r15, 88(%r15) 27 ; CHECK: .cfi_offset %r11, -72 28 ; CHECK: .cfi_offset %r15, -40 29 ; CHECK: aghi %r15, -168 30 ; CHECK: .cfi_def_cfa_offset 328 31 ; CHECK: lgr %r11, %r15 32 ; CHECK: .cfi_def_cfa_register %r11 33 ; CHECK: stg %r2, 160(%r11) 34 ; CHECK: lmg %r11, %r15, 256(%r11) 35 ; CHECK: br %r14 36 %y = alloca i64, align 8 37 store volatile i64 %x, i64* %y 38 ret void 39 } 40 41 ; This function should require all GPRs but no other spill slots. 42 ; It shouldn't need to allocate its own frame. 43 define void @f3(i32 *%ptr) { 44 ; CHECK-LABEL: f3: 45 ; CHECK: stmg %r6, %r15, 48(%r15) 46 ; CHECK-NOT: %r15 47 ; CHECK-NOT: %r11 48 ; CHECK: .cfi_offset %r6, -112 49 ; CHECK: .cfi_offset %r7, -104 50 ; CHECK: .cfi_offset %r8, -96 51 ; CHECK: .cfi_offset %r9, -88 52 ; CHECK: .cfi_offset %r10, -80 53 ; CHECK: .cfi_offset %r11, -72 54 ; CHECK: .cfi_offset %r12, -64 55 ; CHECK: .cfi_offset %r13, -56 56 ; CHECK: .cfi_offset %r14, -48 57 ; CHECK: .cfi_offset %r15, -40 58 ; CHECK-NOT: ag 59 ; CHECK: lgr %r11, %r15 60 ; CHECK: .cfi_def_cfa_register %r11 61 ; ...main function body... 62 ; CHECK-NOT: %r15 63 ; CHECK-NOT: %r11 64 ; CHECK: st {{.*}}, 4(%r2) 65 ; CHECK: lmg %r6, %r15, 48(%r11) 66 ; CHECK: br %r14 67 %l0 = load volatile i32 , i32 *%ptr 68 %l1 = load volatile i32 , i32 *%ptr 69 %l3 = load volatile i32 , i32 *%ptr 70 %l4 = load volatile i32 , i32 *%ptr 71 %l5 = load volatile i32 , i32 *%ptr 72 %l6 = load volatile i32 , i32 *%ptr 73 %l7 = load volatile i32 , i32 *%ptr 74 %l8 = load volatile i32 , i32 *%ptr 75 %l9 = load volatile i32 , i32 *%ptr 76 %l10 = load volatile i32 , i32 *%ptr 77 %l12 = load volatile i32 , i32 *%ptr 78 %l13 = load volatile i32 , i32 *%ptr 79 %l14 = load volatile i32 , i32 *%ptr 80 %add0 = add i32 %l0, %l0 81 %add1 = add i32 %l1, %add0 82 %add3 = add i32 %l3, %add1 83 %add4 = add i32 %l4, %add3 84 %add5 = add i32 %l5, %add4 85 %add6 = add i32 %l6, %add5 86 %add7 = add i32 %l7, %add6 87 %add8 = add i32 %l8, %add7 88 %add9 = add i32 %l9, %add8 89 %add10 = add i32 %l10, %add9 90 %add12 = add i32 %l12, %add10 91 %add13 = add i32 %l13, %add12 92 %add14 = add i32 %l14, %add13 93 store volatile i32 %add0, i32 *%ptr 94 store volatile i32 %add1, i32 *%ptr 95 store volatile i32 %add3, i32 *%ptr 96 store volatile i32 %add4, i32 *%ptr 97 store volatile i32 %add5, i32 *%ptr 98 store volatile i32 %add6, i32 *%ptr 99 store volatile i32 %add7, i32 *%ptr 100 store volatile i32 %add8, i32 *%ptr 101 store volatile i32 %add9, i32 *%ptr 102 store volatile i32 %add10, i32 *%ptr 103 store volatile i32 %add12, i32 *%ptr 104 store volatile i32 %add13, i32 *%ptr 105 %final = getelementptr i32, i32 *%ptr, i32 1 106 store volatile i32 %add14, i32 *%final 107 ret void 108 } 109 110 ; The largest frame for which the LMG is in range. This frame has two 111 ; emergency spill slots at 160(%r11), so create a frame of size 524192 112 ; by allocating (524192 - 176) / 8 = 65502 doublewords. 113 define void @f4(i64 %x) { 114 ; CHECK-LABEL: f4: 115 ; CHECK: stmg %r11, %r15, 88(%r15) 116 ; CHECK: .cfi_offset %r11, -72 117 ; CHECK: .cfi_offset %r15, -40 118 ; CHECK: agfi %r15, -524192 119 ; CHECK: .cfi_def_cfa_offset 524352 120 ; CHECK: lgr %r11, %r15 121 ; CHECK: .cfi_def_cfa_register %r11 122 ; CHECK: stg %r2, 176(%r11) 123 ; CHECK-NOT: ag 124 ; CHECK: lmg %r11, %r15, 524280(%r11) 125 ; CHECK: br %r14 126 %y = alloca [65502 x i64], align 8 127 %ptr = getelementptr inbounds [65502 x i64], [65502 x i64]* %y, i64 0, i64 0 128 store volatile i64 %x, i64* %ptr 129 ret void 130 } 131 132 ; The next frame size larger than f4. 133 define void @f5(i64 %x) { 134 ; CHECK-LABEL: f5: 135 ; CHECK: stmg %r11, %r15, 88(%r15) 136 ; CHECK: .cfi_offset %r11, -72 137 ; CHECK: .cfi_offset %r15, -40 138 ; CHECK: agfi %r15, -524200 139 ; CHECK: .cfi_def_cfa_offset 524360 140 ; CHECK: lgr %r11, %r15 141 ; CHECK: .cfi_def_cfa_register %r11 142 ; CHECK: stg %r2, 176(%r11) 143 ; CHECK: aghi %r11, 8 144 ; CHECK: lmg %r11, %r15, 524280(%r11) 145 ; CHECK: br %r14 146 %y = alloca [65503 x i64], align 8 147 %ptr = getelementptr inbounds [65503 x i64], [65503 x i64]* %y, i64 0, i64 0 148 store volatile i64 %x, i64* %ptr 149 ret void 150 } 151 152 ; The tests above establish that %r11 is handled like %r15 for LMG. 153 ; Rely on the %r15-based tests in frame-08.ll for other cases. 154
