1 ; Test insertions of register values into a nonzero index of an undef. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 4 5 ; Test v16i8 insertion into an undef, with an arbitrary index. 6 define <16 x i8> @f1(i8 %val) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: vlvgb %v24, %r2, 12 9 ; CHECK-NEXT: br %r14 10 %ret = insertelement <16 x i8> undef, i8 %val, i32 12 11 ret <16 x i8> %ret 12 } 13 14 ; Test v16i8 insertion into an undef, with the first good index for VLVGP. 15 define <16 x i8> @f2(i8 %val) { 16 ; CHECK-LABEL: f2: 17 ; CHECK: vlvgp %v24, %r2, %r2 18 ; CHECK-NEXT: br %r14 19 %ret = insertelement <16 x i8> undef, i8 %val, i32 7 20 ret <16 x i8> %ret 21 } 22 23 ; Test v16i8 insertion into an undef, with the second good index for VLVGP. 24 define <16 x i8> @f3(i8 %val) { 25 ; CHECK-LABEL: f3: 26 ; CHECK: vlvgp %v24, %r2, %r2 27 ; CHECK-NEXT: br %r14 28 %ret = insertelement <16 x i8> undef, i8 %val, i32 15 29 ret <16 x i8> %ret 30 } 31 32 ; Test v8i16 insertion into an undef, with an arbitrary index. 33 define <8 x i16> @f4(i16 %val) { 34 ; CHECK-LABEL: f4: 35 ; CHECK: vlvgh %v24, %r2, 5 36 ; CHECK-NEXT: br %r14 37 %ret = insertelement <8 x i16> undef, i16 %val, i32 5 38 ret <8 x i16> %ret 39 } 40 41 ; Test v8i16 insertion into an undef, with the first good index for VLVGP. 42 define <8 x i16> @f5(i16 %val) { 43 ; CHECK-LABEL: f5: 44 ; CHECK: vlvgp %v24, %r2, %r2 45 ; CHECK-NEXT: br %r14 46 %ret = insertelement <8 x i16> undef, i16 %val, i32 3 47 ret <8 x i16> %ret 48 } 49 50 ; Test v8i16 insertion into an undef, with the second good index for VLVGP. 51 define <8 x i16> @f6(i16 %val) { 52 ; CHECK-LABEL: f6: 53 ; CHECK: vlvgp %v24, %r2, %r2 54 ; CHECK-NEXT: br %r14 55 %ret = insertelement <8 x i16> undef, i16 %val, i32 7 56 ret <8 x i16> %ret 57 } 58 59 ; Test v4i32 insertion into an undef, with an arbitrary index. 60 define <4 x i32> @f7(i32 %val) { 61 ; CHECK-LABEL: f7: 62 ; CHECK: vlvgf %v24, %r2, 2 63 ; CHECK-NEXT: br %r14 64 %ret = insertelement <4 x i32> undef, i32 %val, i32 2 65 ret <4 x i32> %ret 66 } 67 68 ; Test v4i32 insertion into an undef, with the first good index for VLVGP. 69 define <4 x i32> @f8(i32 %val) { 70 ; CHECK-LABEL: f8: 71 ; CHECK: vlvgp %v24, %r2, %r2 72 ; CHECK-NEXT: br %r14 73 %ret = insertelement <4 x i32> undef, i32 %val, i32 1 74 ret <4 x i32> %ret 75 } 76 77 ; Test v4i32 insertion into an undef, with the second good index for VLVGP. 78 define <4 x i32> @f9(i32 %val) { 79 ; CHECK-LABEL: f9: 80 ; CHECK: vlvgp %v24, %r2, %r2 81 ; CHECK-NEXT: br %r14 82 %ret = insertelement <4 x i32> undef, i32 %val, i32 3 83 ret <4 x i32> %ret 84 } 85 86 ; Test v2i64 insertion into an undef. 87 define <2 x i64> @f10(i64 %val) { 88 ; CHECK-LABEL: f10: 89 ; CHECK: vlvgp %v24, %r2, %r2 90 ; CHECK-NEXT: br %r14 91 %ret = insertelement <2 x i64> undef, i64 %val, i32 1 92 ret <2 x i64> %ret 93 } 94 95 ; Test v4f32 insertion into an undef. 96 define <4 x float> @f11(float %val) { 97 ; CHECK-LABEL: f11: 98 ; CHECK: vrepf %v24, %v0, 0 99 ; CHECK: br %r14 100 %ret = insertelement <4 x float> undef, float %val, i32 2 101 ret <4 x float> %ret 102 } 103 104 ; Test v2f64 insertion into an undef. 105 define <2 x double> @f12(double %val) { 106 ; CHECK-LABEL: f12: 107 ; CHECK: vrepg %v24, %v0, 0 108 ; CHECK: br %r14 109 %ret = insertelement <2 x double> undef, double %val, i32 1 110 ret <2 x double> %ret 111 } 112
