1 ; Test vector merge low. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 4 5 ; Test a canonical v16i8 merge low. 6 define <16 x i8> @f1(<16 x i8> %val1, <16 x i8> %val2) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: vmrlb %v24, %v24, %v26 9 ; CHECK: br %r14 10 %ret = shufflevector <16 x i8> %val1, <16 x i8> %val2, 11 <16 x i32> <i32 8, i32 24, i32 9, i32 25, 12 i32 10, i32 26, i32 11, i32 27, 13 i32 12, i32 28, i32 13, i32 29, 14 i32 14, i32 30, i32 15, i32 31> 15 ret <16 x i8> %ret 16 } 17 18 ; Test a reversed v16i8 merge low. 19 define <16 x i8> @f2(<16 x i8> %val1, <16 x i8> %val2) { 20 ; CHECK-LABEL: f2: 21 ; CHECK: vmrlb %v24, %v26, %v24 22 ; CHECK: br %r14 23 %ret = shufflevector <16 x i8> %val1, <16 x i8> %val2, 24 <16 x i32> <i32 24, i32 8, i32 25, i32 9, 25 i32 26, i32 10, i32 27, i32 11, 26 i32 28, i32 12, i32 29, i32 13, 27 i32 30, i32 14, i32 31, i32 15> 28 ret <16 x i8> %ret 29 } 30 31 ; Test a v16i8 merge low with only the first operand being used. 32 define <16 x i8> @f3(<16 x i8> %val1, <16 x i8> %val2) { 33 ; CHECK-LABEL: f3: 34 ; CHECK: vmrlb %v24, %v24, %v24 35 ; CHECK: br %r14 36 %ret = shufflevector <16 x i8> %val1, <16 x i8> %val2, 37 <16 x i32> <i32 8, i32 8, i32 9, i32 9, 38 i32 10, i32 10, i32 11, i32 11, 39 i32 12, i32 12, i32 13, i32 13, 40 i32 14, i32 14, i32 15, i32 15> 41 ret <16 x i8> %ret 42 } 43 44 ; Test a v16i8 merge low with only the second operand being used. 45 ; This is converted into @f3 by target-independent code. 46 define <16 x i8> @f4(<16 x i8> %val1, <16 x i8> %val2) { 47 ; CHECK-LABEL: f4: 48 ; CHECK: vmrlb %v24, %v26, %v26 49 ; CHECK: br %r14 50 %ret = shufflevector <16 x i8> %val1, <16 x i8> %val2, 51 <16 x i32> <i32 24, i32 24, i32 25, i32 25, 52 i32 26, i32 26, i32 27, i32 27, 53 i32 28, i32 28, i32 29, i32 29, 54 i32 30, i32 30, i32 31, i32 31> 55 ret <16 x i8> %ret 56 } 57 58 ; Test a v16i8 merge with both operands being the same. This too is 59 ; converted into @f3 by target-independent code. 60 define <16 x i8> @f5(<16 x i8> %val) { 61 ; CHECK-LABEL: f5: 62 ; CHECK: vmrlb %v24, %v24, %v24 63 ; CHECK: br %r14 64 %ret = shufflevector <16 x i8> %val, <16 x i8> %val, 65 <16 x i32> <i32 8, i32 24, i32 25, i32 25, 66 i32 26, i32 10, i32 11, i32 11, 67 i32 28, i32 28, i32 13, i32 13, 68 i32 14, i32 30, i32 31, i32 15> 69 ret <16 x i8> %ret 70 } 71 72 ; Test a v16i8 merge in which some of the indices are don't care. 73 define <16 x i8> @f6(<16 x i8> %val1, <16 x i8> %val2) { 74 ; CHECK-LABEL: f6: 75 ; CHECK: vmrlb %v24, %v24, %v26 76 ; CHECK: br %r14 77 %ret = shufflevector <16 x i8> %val1, <16 x i8> %val2, 78 <16 x i32> <i32 8, i32 undef, i32 9, i32 25, 79 i32 undef, i32 26, i32 undef, i32 undef, 80 i32 undef, i32 28, i32 13, i32 29, 81 i32 undef, i32 30, i32 15, i32 undef> 82 ret <16 x i8> %ret 83 } 84 85 ; Test a v16i8 merge in which one of the operands is undefined and where 86 ; indices for that operand are "don't care". Target-independent code 87 ; converts the indices themselves into "undef"s. 88 define <16 x i8> @f7(<16 x i8> %val) { 89 ; CHECK-LABEL: f7: 90 ; CHECK: vmrlb %v24, %v24, %v24 91 ; CHECK: br %r14 92 %ret = shufflevector <16 x i8> undef, <16 x i8> %val, 93 <16 x i32> <i32 11, i32 24, i32 25, i32 5, 94 i32 26, i32 10, i32 27, i32 27, 95 i32 28, i32 28, i32 29, i32 3, 96 i32 2, i32 30, i32 9, i32 31> 97 ret <16 x i8> %ret 98 } 99 100 ; Test a canonical v8i16 merge low. 101 define <8 x i16> @f8(<8 x i16> %val1, <8 x i16> %val2) { 102 ; CHECK-LABEL: f8: 103 ; CHECK: vmrlh %v24, %v24, %v26 104 ; CHECK: br %r14 105 %ret = shufflevector <8 x i16> %val1, <8 x i16> %val2, 106 <8 x i32> <i32 4, i32 12, i32 5, i32 13, 107 i32 6, i32 14, i32 7, i32 15> 108 ret <8 x i16> %ret 109 } 110 111 ; Test a reversed v8i16 merge low. 112 define <8 x i16> @f9(<8 x i16> %val1, <8 x i16> %val2) { 113 ; CHECK-LABEL: f9: 114 ; CHECK: vmrlh %v24, %v26, %v24 115 ; CHECK: br %r14 116 %ret = shufflevector <8 x i16> %val1, <8 x i16> %val2, 117 <8 x i32> <i32 12, i32 4, i32 13, i32 5, 118 i32 14, i32 6, i32 15, i32 7> 119 ret <8 x i16> %ret 120 } 121 122 ; Test a canonical v4i32 merge low. 123 define <4 x i32> @f10(<4 x i32> %val1, <4 x i32> %val2) { 124 ; CHECK-LABEL: f10: 125 ; CHECK: vmrlf %v24, %v24, %v26 126 ; CHECK: br %r14 127 %ret = shufflevector <4 x i32> %val1, <4 x i32> %val2, 128 <4 x i32> <i32 2, i32 6, i32 3, i32 7> 129 ret <4 x i32> %ret 130 } 131 132 ; Test a reversed v4i32 merge low. 133 define <4 x i32> @f11(<4 x i32> %val1, <4 x i32> %val2) { 134 ; CHECK-LABEL: f11: 135 ; CHECK: vmrlf %v24, %v26, %v24 136 ; CHECK: br %r14 137 %ret = shufflevector <4 x i32> %val1, <4 x i32> %val2, 138 <4 x i32> <i32 6, i32 2, i32 7, i32 3> 139 ret <4 x i32> %ret 140 } 141 142 ; Test a canonical v2i64 merge low. 143 define <2 x i64> @f12(<2 x i64> %val1, <2 x i64> %val2) { 144 ; CHECK-LABEL: f12: 145 ; CHECK: vmrlg %v24, %v24, %v26 146 ; CHECK: br %r14 147 %ret = shufflevector <2 x i64> %val1, <2 x i64> %val2, 148 <2 x i32> <i32 1, i32 3> 149 ret <2 x i64> %ret 150 } 151 152 ; Test a reversed v2i64 merge low. 153 define <2 x i64> @f13(<2 x i64> %val1, <2 x i64> %val2) { 154 ; CHECK-LABEL: f13: 155 ; CHECK: vmrlg %v24, %v26, %v24 156 ; CHECK: br %r14 157 %ret = shufflevector <2 x i64> %val1, <2 x i64> %val2, 158 <2 x i32> <i32 3, i32 1> 159 ret <2 x i64> %ret 160 } 161 162 ; Test a canonical v4f32 merge low. 163 define <4 x float> @f14(<4 x float> %val1, <4 x float> %val2) { 164 ; CHECK-LABEL: f14: 165 ; CHECK: vmrlf %v24, %v24, %v26 166 ; CHECK: br %r14 167 %ret = shufflevector <4 x float> %val1, <4 x float> %val2, 168 <4 x i32> <i32 2, i32 6, i32 3, i32 7> 169 ret <4 x float> %ret 170 } 171 172 ; Test a reversed v4f32 merge low. 173 define <4 x float> @f15(<4 x float> %val1, <4 x float> %val2) { 174 ; CHECK-LABEL: f15: 175 ; CHECK: vmrlf %v24, %v26, %v24 176 ; CHECK: br %r14 177 %ret = shufflevector <4 x float> %val1, <4 x float> %val2, 178 <4 x i32> <i32 6, i32 2, i32 7, i32 3> 179 ret <4 x float> %ret 180 } 181 182 ; Test a canonical v2f64 merge low. 183 define <2 x double> @f16(<2 x double> %val1, <2 x double> %val2) { 184 ; CHECK-LABEL: f16: 185 ; CHECK: vmrlg %v24, %v24, %v26 186 ; CHECK: br %r14 187 %ret = shufflevector <2 x double> %val1, <2 x double> %val2, 188 <2 x i32> <i32 1, i32 3> 189 ret <2 x double> %ret 190 } 191 192 ; Test a reversed v2f64 merge low. 193 define <2 x double> @f17(<2 x double> %val1, <2 x double> %val2) { 194 ; CHECK-LABEL: f17: 195 ; CHECK: vmrlg %v24, %v26, %v24 196 ; CHECK: br %r14 197 %ret = shufflevector <2 x double> %val1, <2 x double> %val2, 198 <2 x i32> <i32 3, i32 1> 199 ret <2 x double> %ret 200 } 201
