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      1 //===-- AMDGPUInstrInfo.td - AMDGPU DAG nodes --------------*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains DAG node defintions for the AMDGPU target.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 //===----------------------------------------------------------------------===//
     15 // AMDGPU DAG Profiles
     16 //===----------------------------------------------------------------------===//
     17 
     18 def AMDGPUDTIntTernaryOp : SDTypeProfile<1, 3, [
     19   SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>, SDTCisInt<3>
     20 ]>;
     21 
     22 //===----------------------------------------------------------------------===//
     23 // AMDGPU DAG Nodes
     24 //
     25 
     26 // out = ((a << 32) | b) >> c)
     27 //
     28 // Can be used to optimize rtol:
     29 // rotl(a, b) = bitalign(a, a, 32 - b)
     30 def AMDGPUbitalign : SDNode<"AMDGPUISD::BITALIGN", AMDGPUDTIntTernaryOp>;
     31 
     32 // out = a - floor(a)
     33 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>;
     34 
     35 // out = max(a, b) a and b are floats
     36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
     37   [SDNPCommutative, SDNPAssociative]
     38 >;
     39 
     40 // out = max(a, b) a and b are signed ints
     41 def AMDGPUsmax : SDNode<"AMDGPUISD::SMAX", SDTIntBinOp,
     42   [SDNPCommutative, SDNPAssociative]
     43 >;
     44 
     45 // out = max(a, b) a and b are unsigned ints
     46 def AMDGPUumax : SDNode<"AMDGPUISD::UMAX", SDTIntBinOp,
     47   [SDNPCommutative, SDNPAssociative]
     48 >;
     49 
     50 // out = min(a, b) a and b are floats
     51 def AMDGPUfmin : SDNode<"AMDGPUISD::FMIN", SDTFPBinOp,
     52   [SDNPCommutative, SDNPAssociative]
     53 >;
     54 
     55 // out = min(a, b) a snd b are signed ints
     56 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp,
     57   [SDNPCommutative, SDNPAssociative]
     58 >;
     59 
     60 // out = min(a, b) a and b are unsigned ints
     61 def AMDGPUumin : SDNode<"AMDGPUISD::UMIN", SDTIntBinOp,
     62   [SDNPCommutative, SDNPAssociative]
     63 >;
     64 
     65 // urecip - This operation is a helper for integer division, it returns the
     66 // result of 1 / a as a fractional unsigned integer.
     67 // out = (2^32 / a) + e
     68 // e is rounding error
     69 def AMDGPUurecip : SDNode<"AMDGPUISD::URECIP", SDTIntUnaryOp>;
     70