1 // Copyright 2015, ARM Limited 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28 // --------------------------------------------------------------------- 29 // This file is auto generated using tools/generate_simulator_traces.py. 30 // 31 // PLEASE DO NOT EDIT. 32 // --------------------------------------------------------------------- 33 34 #ifndef VIXL_SIM_DUP_D_2OPIMM_TRACE_A64_H_ 35 #define VIXL_SIM_DUP_D_2OPIMM_TRACE_A64_H_ 36 37 const uint64_t kExpected_NEON_dup_D_2OPIMM[] = { 38 0xffffffffffffffff, 39 0x0000000000000000, 40 0x0000000000000000, 41 0x0000000000000001, 42 0x0000000000000001, 43 0x0000000000000002, 44 0x0000000000000002, 45 0x0000000000000040, 46 0x0000000000000040, 47 0x000000000000007d, 48 0x000000000000007d, 49 0x000000000000007e, 50 0x000000000000007e, 51 0x000000000000007f, 52 0x000000000000007f, 53 0x0000000000007ffd, 54 0x0000000000007ffd, 55 0x0000000000007ffe, 56 0x0000000000007ffe, 57 0x0000000000007fff, 58 0x0000000000007fff, 59 0x000000007ffffffd, 60 0x000000007ffffffd, 61 0x000000007ffffffe, 62 0x000000007ffffffe, 63 0x000000007fffffff, 64 0x000000007fffffff, 65 0x3333333333333333, 66 0x3333333333333333, 67 0x5555555555555555, 68 0x5555555555555555, 69 0x7ffffffffffffffd, 70 0x7ffffffffffffffd, 71 0x7ffffffffffffffe, 72 0x7ffffffffffffffe, 73 0x7fffffffffffffff, 74 0x7fffffffffffffff, 75 0x8000000000000000, 76 0x8000000000000000, 77 0x8000000000000001, 78 0x8000000000000001, 79 0x8000000000000002, 80 0x8000000000000002, 81 0x8000000000000003, 82 0x8000000000000003, 83 0xaaaaaaaaaaaaaaaa, 84 0xaaaaaaaaaaaaaaaa, 85 0xcccccccccccccccc, 86 0xcccccccccccccccc, 87 0xffffffff80000000, 88 0xffffffff80000000, 89 0xffffffff80000001, 90 0xffffffff80000001, 91 0xffffffff80000002, 92 0xffffffff80000002, 93 0xffffffff80000003, 94 0xffffffff80000003, 95 0xffffffffffff8000, 96 0xffffffffffff8000, 97 0xffffffffffff8001, 98 0xffffffffffff8001, 99 0xffffffffffff8002, 100 0xffffffffffff8002, 101 0xffffffffffff8003, 102 0xffffffffffff8003, 103 0xffffffffffffff80, 104 0xffffffffffffff80, 105 0xffffffffffffff81, 106 0xffffffffffffff81, 107 0xffffffffffffff82, 108 0xffffffffffffff82, 109 0xffffffffffffff83, 110 0xffffffffffffff83, 111 0xffffffffffffffc0, 112 0xffffffffffffffc0, 113 0xfffffffffffffffd, 114 0xfffffffffffffffd, 115 0xfffffffffffffffe, 116 0xfffffffffffffffe, 117 0xffffffffffffffff, 118 }; 119 const unsigned kExpectedCount_NEON_dup_D_2OPIMM = 80; 120 121 #endif // VIXL_SIM_DUP_D_2OPIMM_TRACE_A64_H_ 122
