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      1 ;//
      2 ;// Copyright (C) 2007-2008 ARM Limited
      3 ;//
      4 ;// Licensed under the Apache License, Version 2.0 (the "License");
      5 ;// you may not use this file except in compliance with the License.
      6 ;// You may obtain a copy of the License at
      7 ;//
      8 ;//      http://www.apache.org/licenses/LICENSE-2.0
      9 ;//
     10 ;// Unless required by applicable law or agreed to in writing, software
     11 ;// distributed under the License is distributed on an "AS IS" BASIS,
     12 ;// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13 ;// See the License for the specific language governing permissions and
     14 ;// limitations under the License.
     15 ;//
     16 ;//
     17 ;//
     18 ;// File Name:  omxVCM4P2_IDCT8x8blk_s.s
     19 ;// OpenMAX DL: v1.0.2
     20 ;// Revision:   9641
     21 ;// Date:       Thursday, February 7, 2008
     22 ;//
     23 ;//
     24 ;//
     25 ;//
     26 
     27 ;// Function:
     28 ;//     omxVCM4P2_IDCT8x8blk
     29 ;//
     30         ;// Include headers
     31         INCLUDE omxtypes_s.h
     32         INCLUDE armCOMM_s.h
     33 
     34         ;// Define cpu variants
     35         M_VARIANTS ARM1136JS
     36 
     37         INCLUDE armCOMM_IDCT_s.h
     38 
     39         IMPORT armCOMM_IDCTPreScale
     40         ;//
     41         ;// Function prototype
     42         ;//
     43         ;//     OMXResult
     44         ;//     omxVCM4P2_IDCT8x8blk(const OMX_S16* pSrc,
     45         ;//                                       OMX_S16* pDst)
     46         ;//
     47 
     48     IF ARM1136JS :LOR: CortexA8
     49         M_ALLOC4  ppDest, 4
     50         M_ALLOC4  pStride, 4
     51         M_ALLOC8  pBlk, 2*8*8
     52     ENDIF
     53 
     54     IF ARM1136JS
     55         M_START omxVCM4P2_IDCT8x8blk, r11
     56     ENDIF
     57 
     58 
     59     IF ARM1136JS :LOR: CortexA8
     60 
     61 ;// Declare input registers
     62 pSrc            RN 0
     63 pDst            RN 1
     64 
     65 ;// Declare other intermediate registers
     66 Result          RN 0
     67 
     68 ;// Prototype for macro M_IDCT
     69 ;// pSrc            RN 0  ;// source data buffer
     70 ;// Stride          RN 1  ;// destination stride in bytes
     71 ;// pDest           RN 2  ;// destination data buffer
     72 ;// pScale          RN 3  ;// pointer to scaling table
     73 
     74 pSrc    RN 0
     75 Stride  RN 1
     76 pDest   RN 2
     77 pScale  RN 3
     78 
     79         MOV         pDest, pDst
     80         LDR         pScale, =armCOMM_IDCTPreScale
     81         M_IDCT      s9, s16, 16
     82         MOV         Result, #OMX_Sts_NoErr
     83         M_END
     84     ENDIF
     85         ;// ARM1136JS :LOR: CortexA8
     86 
     87     END
     88