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      1 Intel NUC NUC5i5MYBE                             {#nuc5}
      2 ====================
      3 
      4 Pinmuxing on the 5th generation Intel NUCs is done in the BIOS. This is only
      5 tested on bios 0024+ (MYBDWi5v.86A). By default the custom solution header is
      6 disabled, currently in Linux (as of 4.2). Both i2c buses are currently
      7 supported.
      8 
      9 The NUCs supported are the NUC5i5MYBE & NUC5i3MYBE which also come as the
     10 NUC5i5MYHE and NUC5i3MYHE motherboards. It's possible that others expose the IO
     11 in a very similar way so could be supported, get in touch if you have one!
     12 
     13 In the BIOS you are required to enable the following:
     14 Devices -> Onboard Devices - GPIO Lockdown
     15 Select I2c under GPIO for the 12/13 14/15 pins
     16 
     17 Interface notes
     18 ---------------
     19 
     20 **I2C** Depending on your system you may need to load `i2c-dev`
     21 
     22 Custom Solutions Header mapping
     23 -------------------------------
     24 
     25 The mapping is the same as the DE3815tykhe.
     26 
     27 | MRAA Number | Physical Pin | Function     | Notes                |
     28 |-------------|--------------|--------------|----------------------|
     29 | 0           | 1            | 1.8V sby     |                      |
     30 | 1           | 2            | GND          |                      |
     31 | 2           | 3            | HDMI_CEC     |                      |
     32 | 3           | 4            | DMIC_CLK     |                      |
     33 | 4           | 5            | 3.3V sby     |                      |
     34 | 5           | 6            | DMIC_DATA    |                      |
     35 | 6           | 7            | Key (no pin) |                      |
     36 | 7           | 8            | SMB_ALERT#   |                      |
     37 | 8           | 9            | 5V sby (2A)  |                      |
     38 | 9           | 10           | SCI_SMI_GPIO |                      |
     39 | 10          | 11           | PWM[0]       |                      |
     40 | 11          | 12           | PWM[1]       |                      |
     41 | 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
     42 | 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
     43 | 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
     44 | 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
     45 | 16          | 17           | SMB_CLK      |                      |
     46 | 17          | 18           | SMB_DATA     |                      |
     47