1 /*-------------------------------------------------------------------------- 2 Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions 6 are met: 7 8 * Redistributions of source code must retain the above copyright 9 notice, this list of conditions and the following disclaimer. 10 * Redistributions in binary form must reproduce the above 11 copyright notice, this list of conditions and the following 12 disclaimer in the documentation and/or other materials provided 13 with the distribution. 14 * Neither the name of The Linux Foundation nor the names of its 15 contributors may be used to endorse or promote products derived 16 from this software without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 19 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 22 BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25 BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28 IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 --------------------------------------------------------------------------*/ 30 #ifndef __OMX_VDEC_HEVC_H__ 31 #define __OMX_VDEC_HEVC_H__ 32 /*============================================================================ 33 O p e n M A X Component 34 Video Decoder 35 36 *//** @file comx_vdec_hevc.h 37 This module contains the class definition for openMAX decoder component. 38 39 *//*========================================================================*/ 40 41 ////////////////////////////////////////////////////////////////////////////// 42 // Include Files 43 ////////////////////////////////////////////////////////////////////////////// 44 45 #include <stdlib.h> 46 #include <stdio.h> 47 #include <string.h> 48 #include <inttypes.h> 49 #include <cstddef> 50 51 #include "SwVdecTypes.h" 52 #include "SwVdecAPI.h" 53 54 static ptrdiff_t x; 55 56 #ifdef _ANDROID_ 57 #ifdef MAX_RES_720P 58 #define LOG_TAG "OMX-VDEC-720P" 59 #elif MAX_RES_1080P 60 #define LOG_TAG "OMX-VDEC-1080P" 61 #else 62 #define LOG_TAG "OMX-VDEC" 63 #endif 64 65 #ifdef USE_ION 66 #include <linux/msm_ion.h> 67 #endif 68 #include <binder/MemoryHeapBase.h> 69 #include <ui/ANativeObjectBase.h> 70 extern "C"{ 71 #include <utils/Log.h> 72 } 73 #include <linux/videodev2.h> 74 #include <poll.h> 75 #include "hevc_utils.h" 76 #define TIMEOUT 5000 77 78 #else //_ANDROID_ 79 #define DEBUG_PRINT_LOW(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 80 #define DEBUG_PRINT_HIGH(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 81 #define DEBUG_PRINT_ERROR(fmt, ...) printf(fmt "\n", ##__VA_ARGS__) 82 #endif // _ANDROID_ 83 84 85 #if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 86 #include <media/hardware/HardwareAPI.h> 87 #endif 88 89 #include <unistd.h> 90 91 #if defined (_ANDROID_ICS_) 92 #include <gralloc_priv.h> 93 #endif 94 95 #include <pthread.h> 96 #ifndef PC_DEBUG 97 #include <semaphore.h> 98 #endif 99 #include "OMX_Core.h" 100 #include "OMX_QCOMExtns.h" 101 #include "OMX_Video.h" 102 #include "qc_omx_component.h" 103 #include <linux/msm_vidc_dec.h> 104 #include <media/msm_vidc.h> 105 #include "frameparser.h" 106 #ifdef MAX_RES_1080P 107 #include "mp4_utils.h" 108 #endif 109 #include <linux/android_pmem.h> 110 #include "extra_data_handler.h" 111 #include "ts_parser.h" 112 #include "vidc_color_converter.h" 113 #include "vidc_debug.h" 114 #ifdef _ANDROID_ 115 #include <cutils/properties.h> 116 #else 117 #define PROPERTY_VALUE_MAX 92 118 #endif 119 extern "C" { 120 OMX_API void * get_omx_component_factory_fn(void); 121 } 122 123 #ifdef _ANDROID_ 124 using namespace android; 125 #ifdef USE_ION 126 class VideoHeap : public MemoryHeapBase 127 { 128 public: 129 VideoHeap(int devicefd, size_t size, void* base,ion_user_handle_t handle,int mapfd); 130 virtual ~VideoHeap() {} 131 private: 132 int m_ion_device_fd; 133 ion_user_handle_t m_ion_handle; 134 }; 135 #else 136 // local pmem heap object 137 class VideoHeap : public MemoryHeapBase 138 { 139 public: 140 VideoHeap(int fd, size_t size, void* base); 141 virtual ~VideoHeap() {} 142 }; 143 #endif 144 #endif // _ANDROID_ 145 ////////////////////////////////////////////////////////////////////////////// 146 // Module specific globals 147 ////////////////////////////////////////////////////////////////////////////// 148 #define OMX_SPEC_VERSION 0x00000101 149 150 151 ////////////////////////////////////////////////////////////////////////////// 152 // Macros 153 ////////////////////////////////////////////////////////////////////////////// 154 #define PrintFrameHdr(bufHdr) DEBUG_PRINT("bufHdr %x buf %x size %d TS %d\n",\ 155 (unsigned) bufHdr,\ 156 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->pBuffer,\ 157 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nFilledLen,\ 158 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nTimeStamp) 159 160 // BitMask Management logic 161 #define BITS_PER_BYTE 32 162 #define BITMASK_SIZE(mIndex) (((mIndex) + BITS_PER_BYTE - 1)/BITS_PER_BYTE) 163 #define BITMASK_OFFSET(mIndex) ((mIndex)/BITS_PER_BYTE) 164 #define BITMASK_FLAG(mIndex) (1 << ((mIndex) % BITS_PER_BYTE)) 165 #define BITMASK_CLEAR(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 166 &= ~(BITMASK_FLAG(mIndex)) 167 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 168 |= BITMASK_FLAG(mIndex) 169 #define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 170 & BITMASK_FLAG(mIndex)) 171 #define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 172 & BITMASK_FLAG(mIndex)) == 0x0) 173 #define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 174 & BITMASK_FLAG(mIndex)) 175 #define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 176 & BITMASK_FLAG(mIndex)) == 0x0) 177 178 #define OMX_CORE_CONTROL_CMDQ_SIZE 100 179 #define OMX_CORE_QCIF_HEIGHT 144 180 #define OMX_CORE_QCIF_WIDTH 176 181 #define OMX_CORE_VGA_HEIGHT 480 182 #define OMX_CORE_VGA_WIDTH 640 183 #define OMX_CORE_WVGA_HEIGHT 480 184 #define OMX_CORE_WVGA_WIDTH 800 185 #define OMX_CORE_FWVGA_HEIGHT 480 186 #define OMX_CORE_FWVGA_WIDTH 864 187 188 #define DESC_BUFFER_SIZE (8192 * 16) 189 190 #ifdef _ANDROID_ 191 #define MAX_NUM_INPUT_OUTPUT_BUFFERS 32 192 #endif 193 194 #define OMX_FRAMEINFO_EXTRADATA 0x00010000 195 #define OMX_INTERLACE_EXTRADATA 0x00020000 196 #define OMX_TIMEINFO_EXTRADATA 0x00040000 197 #define OMX_PORTDEF_EXTRADATA 0x00080000 198 #define OMX_EXTNUSER_EXTRADATA 0x00100000 199 #define DRIVER_EXTRADATA_MASK 0x0000FFFF 200 201 #define OMX_INTERLACE_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 202 sizeof(OMX_STREAMINTERLACEFORMAT) + 3)&(~3)) 203 #define OMX_FRAMEINFO_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 204 sizeof(OMX_QCOM_EXTRADATA_FRAMEINFO) + 3)&(~3)) 205 #define OMX_PORTDEF_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 206 sizeof(OMX_PARAM_PORTDEFINITIONTYPE) + 3)&(~3)) 207 208 // Define next macro with required values to enable default extradata, 209 // VDEC_EXTRADATA_MB_ERROR_MAP 210 // OMX_INTERLACE_EXTRADATA 211 // OMX_FRAMEINFO_EXTRADATA 212 // OMX_TIMEINFO_EXTRADATA 213 214 //#define DEFAULT_EXTRADATA (OMX_FRAMEINFO_EXTRADATA|OMX_INTERLACE_EXTRADATA) 215 216 enum port_indexes 217 { 218 OMX_CORE_INPUT_PORT_INDEX =0, 219 OMX_CORE_OUTPUT_PORT_INDEX =1 220 }; 221 222 enum interm_buffer_state 223 { 224 WITH_COMPONENT = 0, 225 WITH_SWVDEC, 226 WITH_DSP 227 }; 228 229 #ifdef USE_ION 230 struct vdec_ion 231 { 232 int ion_device_fd; 233 struct ion_fd_data fd_ion_data; 234 struct ion_allocation_data ion_alloc_data; 235 }; 236 #endif 237 238 #ifdef _MSM8974_ 239 struct extradata_buffer_info { 240 int buffer_size; 241 char* uaddr; 242 int count; 243 int size; 244 #ifdef USE_ION 245 struct vdec_ion ion; 246 #endif 247 }; 248 #endif 249 250 struct video_driver_context 251 { 252 int video_driver_fd; 253 enum vdec_codec decoder_format; 254 enum vdec_output_fromat output_format; 255 enum vdec_interlaced_format interlace; 256 enum vdec_output_order picture_order; 257 struct vdec_picsize video_resolution; 258 struct vdec_allocatorproperty ip_buf; 259 struct vdec_allocatorproperty op_buf; 260 struct vdec_bufferpayload *ptr_inputbuffer; 261 struct vdec_bufferpayload *ptr_outputbuffer; 262 struct vdec_output_frameinfo *ptr_respbuffer; 263 264 struct vdec_allocatorproperty interm_op_buf; 265 struct vdec_bufferpayload *ptr_interm_outputbuffer; 266 struct vdec_output_frameinfo *ptr_interm_respbuffer; 267 268 #ifdef USE_ION 269 struct vdec_ion *ip_buf_ion_info; 270 struct vdec_ion *op_buf_ion_info; 271 struct vdec_ion *interm_op_buf_ion_info; 272 struct vdec_ion h264_mv; 273 struct vdec_ion meta_buffer; 274 struct vdec_ion meta_buffer_iommu; 275 #endif 276 struct vdec_framerate frame_rate; 277 unsigned extradata; 278 bool timestamp_adjust; 279 char kind[128]; 280 bool idr_only_decoding; 281 unsigned disable_dmx; 282 #ifdef _MSM8974_ 283 struct extradata_buffer_info extradata_info; 284 int num_planes; 285 #endif 286 }; 287 288 struct video_decoder_capability { 289 unsigned int min_width; 290 unsigned int max_width; 291 unsigned int min_height; 292 unsigned int max_height; 293 }; 294 295 struct debug_cap { 296 bool in_buffer_log; 297 bool out_buffer_log; 298 bool im_buffer_log; 299 char infile_name[PROPERTY_VALUE_MAX + 36]; 300 char outfile_name[PROPERTY_VALUE_MAX + 36]; 301 char imbfile_name[PROPERTY_VALUE_MAX + 36]; 302 char log_loc[PROPERTY_VALUE_MAX]; 303 FILE *infile; 304 FILE *outfile; 305 FILE *imbfile; 306 }; 307 308 struct dynamic_buf_list { 309 OMX_U32 fd; 310 OMX_U32 dup_fd; 311 OMX_U32 offset; 312 OMX_U32 ref_count; 313 }; 314 315 // OMX video decoder class 316 class omx_vdec: public qc_omx_component 317 { 318 319 public: 320 omx_vdec(); // constructor 321 virtual ~omx_vdec(); // destructor 322 323 static int async_message_process (void *context, void* message); 324 static void process_event_cb(void *ctxt,unsigned char id); 325 326 OMX_ERRORTYPE allocate_buffer( 327 OMX_HANDLETYPE hComp, 328 OMX_BUFFERHEADERTYPE **bufferHdr, 329 OMX_U32 port, 330 OMX_PTR appData, 331 OMX_U32 bytes 332 ); 333 334 335 OMX_ERRORTYPE component_deinit(OMX_HANDLETYPE hComp); 336 337 OMX_ERRORTYPE component_init(OMX_STRING role); 338 339 OMX_ERRORTYPE component_role_enum( 340 OMX_HANDLETYPE hComp, 341 OMX_U8 *role, 342 OMX_U32 index 343 ); 344 345 OMX_ERRORTYPE component_tunnel_request( 346 OMX_HANDLETYPE hComp, 347 OMX_U32 port, 348 OMX_HANDLETYPE peerComponent, 349 OMX_U32 peerPort, 350 OMX_TUNNELSETUPTYPE *tunnelSetup 351 ); 352 353 OMX_ERRORTYPE empty_this_buffer( 354 OMX_HANDLETYPE hComp, 355 OMX_BUFFERHEADERTYPE *buffer 356 ); 357 358 359 360 OMX_ERRORTYPE fill_this_buffer( 361 OMX_HANDLETYPE hComp, 362 OMX_BUFFERHEADERTYPE *buffer 363 ); 364 365 366 OMX_ERRORTYPE free_buffer( 367 OMX_HANDLETYPE hComp, 368 OMX_U32 port, 369 OMX_BUFFERHEADERTYPE *buffer 370 ); 371 372 OMX_ERRORTYPE get_component_version( 373 OMX_HANDLETYPE hComp, 374 OMX_STRING componentName, 375 OMX_VERSIONTYPE *componentVersion, 376 OMX_VERSIONTYPE *specVersion, 377 OMX_UUIDTYPE *componentUUID 378 ); 379 380 OMX_ERRORTYPE get_config( 381 OMX_HANDLETYPE hComp, 382 OMX_INDEXTYPE configIndex, 383 OMX_PTR configData 384 ); 385 386 OMX_ERRORTYPE get_extension_index( 387 OMX_HANDLETYPE hComp, 388 OMX_STRING paramName, 389 OMX_INDEXTYPE *indexType 390 ); 391 392 OMX_ERRORTYPE get_parameter(OMX_HANDLETYPE hComp, 393 OMX_INDEXTYPE paramIndex, 394 OMX_PTR paramData); 395 396 OMX_ERRORTYPE get_state(OMX_HANDLETYPE hComp, 397 OMX_STATETYPE *state); 398 399 400 401 OMX_ERRORTYPE send_command(OMX_HANDLETYPE hComp, 402 OMX_COMMANDTYPE cmd, 403 OMX_U32 param1, 404 OMX_PTR cmdData); 405 406 407 OMX_ERRORTYPE set_callbacks(OMX_HANDLETYPE hComp, 408 OMX_CALLBACKTYPE *callbacks, 409 OMX_PTR appData); 410 411 OMX_ERRORTYPE set_config(OMX_HANDLETYPE hComp, 412 OMX_INDEXTYPE configIndex, 413 OMX_PTR configData); 414 415 OMX_ERRORTYPE set_parameter(OMX_HANDLETYPE hComp, 416 OMX_INDEXTYPE paramIndex, 417 OMX_PTR paramData); 418 419 OMX_ERRORTYPE use_buffer(OMX_HANDLETYPE hComp, 420 OMX_BUFFERHEADERTYPE **bufferHdr, 421 OMX_U32 port, 422 OMX_PTR appData, 423 OMX_U32 bytes, 424 OMX_U8 *buffer); 425 426 OMX_ERRORTYPE use_input_heap_buffers( 427 OMX_HANDLETYPE hComp, 428 OMX_BUFFERHEADERTYPE** bufferHdr, 429 OMX_U32 port, 430 OMX_PTR appData, 431 OMX_U32 bytes, 432 OMX_U8* buffer); 433 434 OMX_ERRORTYPE use_EGL_image(OMX_HANDLETYPE hComp, 435 OMX_BUFFERHEADERTYPE **bufferHdr, 436 OMX_U32 port, 437 OMX_PTR appData, 438 void * eglImage); 439 void complete_pending_buffer_done_cbs(); 440 struct video_driver_context drv_ctx; 441 #ifdef _MSM8974_ 442 OMX_ERRORTYPE allocate_extradata(); 443 void free_extradata(); 444 int update_resolution(int width, int height, int stride, int scan_lines); 445 OMX_ERRORTYPE is_video_session_supported(); 446 #endif 447 int m_pipe_in; 448 int m_pipe_out; 449 pthread_t msg_thread_id; 450 pthread_t async_thread_id; 451 bool is_component_secure(); 452 453 void buf_ref_add(int index, OMX_U32 fd, OMX_U32 offset); 454 void buf_ref_remove(OMX_U32 fd, OMX_U32 offset); 455 456 static SWVDEC_STATUS swvdec_input_buffer_done_cb(SWVDEC_HANDLE pSwDec, SWVDEC_IPBUFFER *pIpBuffer, void *pClientHandle); 457 static SWVDEC_STATUS swvdec_fill_buffer_done_cb(SWVDEC_HANDLE pSwDec, SWVDEC_OPBUFFER *pOpBuffer, void *pClientHandle); 458 static SWVDEC_STATUS swvdec_handle_event_cb (SWVDEC_HANDLE pSwDec, SWVDEC_EVENTHANDLER* pEventHandler, void *pClientHandle); 459 void swvdec_input_buffer_done(SWVDEC_IPBUFFER *pIpBuffer); 460 void swvdec_fill_buffer_done(SWVDEC_OPBUFFER *pOpBuffer); 461 void swvdec_handle_event(SWVDEC_EVENTHANDLER *pEvent); 462 463 private: 464 // Bit Positions 465 enum flags_bit_positions 466 { 467 // Defer transition to IDLE 468 OMX_COMPONENT_IDLE_PENDING =0x1, 469 // Defer transition to LOADING 470 OMX_COMPONENT_LOADING_PENDING =0x2, 471 // First Buffer Pending 472 OMX_COMPONENT_FIRST_BUFFER_PENDING =0x3, 473 // Second Buffer Pending 474 OMX_COMPONENT_SECOND_BUFFER_PENDING =0x4, 475 // Defer transition to Enable 476 OMX_COMPONENT_INPUT_ENABLE_PENDING =0x5, 477 // Defer transition to Enable 478 OMX_COMPONENT_OUTPUT_ENABLE_PENDING =0x6, 479 // Defer transition to Disable 480 OMX_COMPONENT_INPUT_DISABLE_PENDING =0x7, 481 // Defer transition to Disable 482 OMX_COMPONENT_OUTPUT_DISABLE_PENDING =0x8, 483 //defer flush notification 484 OMX_COMPONENT_OUTPUT_FLUSH_PENDING =0x9, 485 OMX_COMPONENT_INPUT_FLUSH_PENDING =0xA, 486 OMX_COMPONENT_PAUSE_PENDING =0xB, 487 OMX_COMPONENT_EXECUTE_PENDING =0xC, 488 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, 489 OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED=0xE 490 }; 491 492 // Deferred callback identifiers 493 enum 494 { 495 //Event Callbacks from the vdec component thread context 496 OMX_COMPONENT_GENERATE_EVENT = 0x1, 497 //Buffer Done callbacks from the vdec component thread context 498 OMX_COMPONENT_GENERATE_BUFFER_DONE = 0x2, 499 //Frame Done callbacks from the vdec component thread context 500 OMX_COMPONENT_GENERATE_FRAME_DONE = 0x3, 501 //Buffer Done callbacks from the vdec component thread context 502 OMX_COMPONENT_GENERATE_FTB = 0x4, 503 //Frame Done callbacks from the vdec component thread context 504 OMX_COMPONENT_GENERATE_ETB = 0x5, 505 //Command 506 OMX_COMPONENT_GENERATE_COMMAND = 0x6, 507 //Push-Pending Buffers 508 OMX_COMPONENT_PUSH_PENDING_BUFS = 0x7, 509 // Empty Buffer Done callbacks 510 OMX_COMPONENT_GENERATE_EBD = 0x8, 511 //Flush Event Callbacks from the vdec component thread context 512 OMX_COMPONENT_GENERATE_EVENT_FLUSH = 0x9, 513 OMX_COMPONENT_GENERATE_EVENT_INPUT_FLUSH = 0x0A, 514 OMX_COMPONENT_GENERATE_EVENT_OUTPUT_FLUSH = 0x0B, 515 OMX_COMPONENT_GENERATE_FBD = 0xc, 516 OMX_COMPONENT_GENERATE_START_DONE = 0xD, 517 OMX_COMPONENT_GENERATE_PAUSE_DONE = 0xE, 518 OMX_COMPONENT_GENERATE_RESUME_DONE = 0xF, 519 OMX_COMPONENT_GENERATE_STOP_DONE = 0x10, 520 OMX_COMPONENT_GENERATE_HARDWARE_ERROR = 0x11, 521 OMX_COMPONENT_GENERATE_ETB_ARBITRARY = 0x12, 522 OMX_COMPONENT_GENERATE_PORT_RECONFIG = 0x13, 523 OMX_COMPONENT_GENERATE_EOS_DONE = 0x14, 524 OMX_COMPONENT_GENERATE_INFO_PORT_RECONFIG = 0x15, 525 OMX_COMPONENT_GENERATE_INFO_FIELD_DROPPED = 0x16, 526 527 // SWVDEC events 528 OMX_COMPONENT_GENERATE_ETB_SWVDEC = 0x17, 529 OMX_COMPONENT_GENERATE_EBD_SWVDEC = 0x18, 530 OMX_COMPONENT_GENERATE_FTB_DSP = 0x19, 531 OMX_COMPONENT_GENERATE_FBD_DSP = 0x1A, 532 OMX_COMPONENT_GENERATE_EVENT_OUTPUT_FLUSH_DSP = 0x1C, 533 OMX_COMPONENT_GENERATE_STOP_DONE_SWVDEC = 0x1D, 534 OMX_COMPONENT_GENERATE_UNSUPPORTED_SETTING = 0x1E, 535 }; 536 537 enum vc1_profile_type 538 { 539 VC1_SP_MP_RCV = 1, 540 VC1_AP = 2 541 }; 542 543 #ifdef _MSM8974_ 544 enum v4l2_ports 545 { 546 CAPTURE_PORT, 547 OUTPUT_PORT, 548 MAX_PORT 549 }; 550 #endif 551 552 struct omx_event 553 { 554 unsigned long param1; 555 unsigned long param2; 556 unsigned id; 557 }; 558 559 struct omx_cmd_queue 560 { 561 omx_event m_q[OMX_CORE_CONTROL_CMDQ_SIZE]; 562 unsigned m_read; 563 unsigned m_write; 564 unsigned m_size; 565 566 omx_cmd_queue(); 567 ~omx_cmd_queue(); 568 bool insert_entry(unsigned long p1, unsigned long p2, unsigned long id); 569 bool pop_entry(unsigned long*p1,unsigned long*p2, unsigned long*id); 570 // get msgtype of the first ele from the queue 571 unsigned get_q_msg_type(); 572 573 }; 574 575 #ifdef _ANDROID_ 576 struct ts_entry 577 { 578 OMX_TICKS timestamp; 579 bool valid; 580 }; 581 582 struct ts_arr_list 583 { 584 ts_entry m_ts_arr_list[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 585 586 ts_arr_list(); 587 ~ts_arr_list(); 588 589 bool insert_ts(OMX_TICKS ts); 590 bool pop_min_ts(OMX_TICKS &ts); 591 bool reset_ts_list(); 592 }; 593 #endif 594 595 struct desc_buffer_hdr 596 { 597 OMX_U8 *buf_addr; 598 OMX_U32 desc_data_size; 599 }; 600 bool allocate_done(void); 601 bool allocate_input_done(void); 602 bool allocate_output_done(void); 603 604 OMX_ERRORTYPE free_input_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 605 OMX_ERRORTYPE free_input_buffer(unsigned int bufferindex, 606 OMX_BUFFERHEADERTYPE *pmem_bufferHdr); 607 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 608 void free_output_buffer_header(); 609 void free_input_buffer_header(); 610 611 OMX_ERRORTYPE allocate_input_heap_buffer(OMX_HANDLETYPE hComp, 612 OMX_BUFFERHEADERTYPE **bufferHdr, 613 OMX_U32 port, 614 OMX_PTR appData, 615 OMX_U32 bytes); 616 617 618 OMX_ERRORTYPE allocate_input_buffer(OMX_HANDLETYPE hComp, 619 OMX_BUFFERHEADERTYPE **bufferHdr, 620 OMX_U32 port, 621 OMX_PTR appData, 622 OMX_U32 bytes); 623 624 OMX_ERRORTYPE allocate_output_buffer(OMX_HANDLETYPE hComp, 625 OMX_BUFFERHEADERTYPE **bufferHdr, 626 OMX_U32 port,OMX_PTR appData, 627 OMX_U32 bytes); 628 OMX_ERRORTYPE use_output_buffer(OMX_HANDLETYPE hComp, 629 OMX_BUFFERHEADERTYPE **bufferHdr, 630 OMX_U32 port, 631 OMX_PTR appData, 632 OMX_U32 bytes, 633 OMX_U8 *buffer); 634 #ifdef MAX_RES_720P 635 OMX_ERRORTYPE get_supported_profile_level_for_720p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 636 #endif 637 #ifdef MAX_RES_1080P 638 OMX_ERRORTYPE get_supported_profile_level_for_1080p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 639 #endif 640 641 OMX_ERRORTYPE allocate_desc_buffer(OMX_U32 index); 642 OMX_ERRORTYPE allocate_output_headers(); 643 bool execute_omx_flush(OMX_U32); 644 bool execute_output_flush(); 645 bool execute_input_flush(); 646 bool execute_input_flush_swvdec(); 647 bool execute_output_flush_dsp(); 648 649 OMX_ERRORTYPE empty_buffer_done(OMX_HANDLETYPE hComp, 650 OMX_BUFFERHEADERTYPE * buffer); 651 652 OMX_ERRORTYPE fill_buffer_done(OMX_HANDLETYPE hComp, 653 OMX_BUFFERHEADERTYPE * buffer); 654 OMX_ERRORTYPE empty_this_buffer_proxy(OMX_HANDLETYPE hComp, 655 OMX_BUFFERHEADERTYPE *buffer); 656 657 OMX_ERRORTYPE empty_this_buffer_proxy_arbitrary(OMX_HANDLETYPE hComp, 658 OMX_BUFFERHEADERTYPE *buffer 659 ); 660 661 OMX_ERRORTYPE push_input_buffer (OMX_HANDLETYPE hComp); 662 OMX_ERRORTYPE push_input_hevc (OMX_HANDLETYPE hComp); 663 664 OMX_ERRORTYPE fill_this_buffer_proxy(OMX_HANDLETYPE hComp, 665 OMX_BUFFERHEADERTYPE *buffer); 666 667 OMX_ERRORTYPE empty_this_buffer_proxy_swvdec(OMX_IN OMX_HANDLETYPE hComp, 668 OMX_IN OMX_BUFFERHEADERTYPE* buffer); 669 670 OMX_ERRORTYPE empty_buffer_done_swvdec(OMX_HANDLETYPE hComp, 671 OMX_BUFFERHEADERTYPE* buffer); 672 673 OMX_ERRORTYPE fill_all_buffers_proxy_dsp(OMX_HANDLETYPE hComp); 674 675 OMX_ERRORTYPE fill_this_buffer_proxy_dsp( 676 OMX_IN OMX_HANDLETYPE hComp, 677 OMX_IN OMX_BUFFERHEADERTYPE* bufferAdd); 678 679 OMX_ERRORTYPE fill_buffer_done_dsp(OMX_HANDLETYPE hComp, 680 OMX_BUFFERHEADERTYPE * buffer); 681 682 683 OMX_ERRORTYPE fill_this_buffer_proxy_swvdec( 684 OMX_IN OMX_HANDLETYPE hComp, 685 OMX_IN OMX_BUFFERHEADERTYPE* bufferAdd); 686 687 // OMX_ERRORTYPE allocate_intermediate_buffer(OMX_HANDLETYPE, OMX_PTR, OMX_U32); 688 OMX_ERRORTYPE allocate_interm_buffer(OMX_IN OMX_U32 bytes); 689 690 OMX_ERRORTYPE free_interm_buffers(); 691 692 bool release_done(); 693 694 bool release_output_done(); 695 bool release_input_done(); 696 bool release_interm_done(); 697 698 OMX_ERRORTYPE get_buffer_req(vdec_allocatorproperty *buffer_prop); 699 OMX_ERRORTYPE get_buffer_req_swvdec(); 700 OMX_ERRORTYPE set_buffer_req(vdec_allocatorproperty *buffer_prop); 701 OMX_ERRORTYPE set_buffer_req_swvdec(vdec_allocatorproperty *buffer_prop); 702 703 OMX_ERRORTYPE start_port_reconfig(); 704 OMX_ERRORTYPE update_picture_resolution(); 705 int stream_off(OMX_U32 port); 706 void adjust_timestamp(OMX_S64 &act_timestamp); 707 void set_frame_rate(OMX_S64 act_timestamp); 708 void handle_extradata_secure(OMX_BUFFERHEADERTYPE *p_buf_hdr); 709 void handle_extradata(OMX_BUFFERHEADERTYPE *p_buf_hdr); 710 void print_debug_extradata(OMX_OTHER_EXTRADATATYPE *extra); 711 #ifdef _MSM8974_ 712 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 713 OMX_U32 interlaced_format_type); 714 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool is_internal, 715 bool enable = true); 716 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 717 OMX_U32 num_conceal_mb, 718 OMX_U32 picture_type, 719 OMX_U32 frame_rate, 720 struct msm_vidc_panscan_window_payload *panscan_payload, 721 struct vdec_aspectratioinfo *aspect_ratio_info); 722 #else 723 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 724 OMX_U32 interlaced_format_type, OMX_U32 buf_index); 725 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool enable = true); 726 #endif 727 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 728 OMX_U32 num_conceal_mb, 729 OMX_U32 picture_type, 730 OMX_S64 timestamp, 731 OMX_U32 frame_rate, 732 struct vdec_aspectratioinfo *aspect_ratio_info); 733 void fill_aspect_ratio_info(struct vdec_aspectratioinfo *aspect_ratio_info, 734 OMX_QCOM_EXTRADATA_FRAMEINFO *frame_info); 735 void append_terminator_extradata(OMX_OTHER_EXTRADATATYPE *extra); 736 OMX_ERRORTYPE update_portdef(OMX_PARAM_PORTDEFINITIONTYPE *portDefn); 737 void append_portdef_extradata(OMX_OTHER_EXTRADATATYPE *extra); 738 void append_extn_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_extn); 739 void append_user_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_user); 740 void insert_demux_addr_offset(OMX_U32 address_offset); 741 void extract_demux_addr_offsets(OMX_BUFFERHEADERTYPE *buf_hdr); 742 OMX_ERRORTYPE handle_demux_data(OMX_BUFFERHEADERTYPE *buf_hdr); 743 OMX_U32 count_MB_in_extradata(OMX_OTHER_EXTRADATATYPE *extra); 744 745 bool align_pmem_buffers(int pmem_fd, OMX_U32 buffer_size, 746 OMX_U32 alignment); 747 #ifdef USE_ION 748 int alloc_map_ion_memory(OMX_U32 buffer_size, 749 OMX_U32 alignment, struct ion_allocation_data *alloc_data, 750 struct ion_fd_data *fd_data,int flag, int heap_id = 0); 751 void free_ion_memory(struct vdec_ion *buf_ion_info); 752 #endif 753 754 755 OMX_ERRORTYPE send_command_proxy(OMX_HANDLETYPE hComp, 756 OMX_COMMANDTYPE cmd, 757 OMX_U32 param1, 758 OMX_PTR cmdData); 759 bool post_event( unsigned long p1, 760 unsigned long p2, 761 unsigned long id 762 ); 763 inline int clip2(int x) 764 { 765 x = x -1; 766 x = x | x >> 1; 767 x = x | x >> 2; 768 x = x | x >> 4; 769 x = x | x >> 16; 770 x = x + 1; 771 return x; 772 } 773 774 #ifdef MAX_RES_1080P 775 OMX_ERRORTYPE vdec_alloc_h264_mv(); 776 void vdec_dealloc_h264_mv(); 777 OMX_ERRORTYPE vdec_alloc_meta_buffers(); 778 void vdec_dealloc_meta_buffers(); 779 #endif 780 781 inline void omx_report_error () 782 { 783 if (m_cb.EventHandler && !m_error_propogated) 784 { 785 DEBUG_PRINT_ERROR("\nERROR: Sending OMX_EventError to Client"); 786 m_error_propogated = true; 787 m_cb.EventHandler(&m_cmp,m_app_data, 788 OMX_EventError,OMX_ErrorHardware,0,NULL); 789 } 790 } 791 792 inline void omx_report_unsupported_setting () 793 { 794 if (m_cb.EventHandler && !m_error_propogated) 795 { 796 DEBUG_PRINT_ERROR("ERROR: Sending OMX_ErrorUnsupportedSetting to Client"); 797 m_error_propogated = true; 798 m_cb.EventHandler(&m_cmp,m_app_data, 799 OMX_EventError,OMX_ErrorUnsupportedSetting,0,NULL); 800 } 801 } 802 #if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 803 OMX_ERRORTYPE use_android_native_buffer(OMX_IN OMX_HANDLETYPE hComp, OMX_PTR data); 804 #endif 805 #if defined (_ANDROID_ICS_) 806 struct nativebuffer{ 807 native_handle_t *nativehandle; 808 private_handle_t *privatehandle; 809 int inuse; 810 }; 811 nativebuffer native_buffer[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 812 #endif 813 814 815 //************************************************************* 816 //*******************MEMBER VARIABLES ************************* 817 //************************************************************* 818 pthread_mutex_t m_lock; 819 pthread_mutex_t c_lock; 820 //sem to handle the minimum procesing of commands 821 sem_t m_cmd_lock; 822 bool m_error_propogated; 823 // compression format 824 OMX_VIDEO_CODINGTYPE eCompressionFormat; 825 // OMX State 826 OMX_STATETYPE m_state; 827 // Application data 828 OMX_PTR m_app_data; 829 // Application callbacks 830 OMX_CALLBACKTYPE m_cb; 831 OMX_PRIORITYMGMTTYPE m_priority_mgm ; 832 OMX_PARAM_BUFFERSUPPLIERTYPE m_buffer_supplier; 833 // fill this buffer queue 834 omx_cmd_queue m_ftb_q; 835 // Command Q for rest of the events 836 omx_cmd_queue m_cmd_q; 837 omx_cmd_queue m_etb_q; 838 839 omx_cmd_queue m_ftb_q_dsp; // ftb for dsp 840 omx_cmd_queue m_etb_q_swvdec; // etbs for swvdec 841 842 // Input memory pointer 843 OMX_BUFFERHEADERTYPE *m_inp_mem_ptr; 844 // Output memory pointer 845 OMX_BUFFERHEADERTYPE *m_out_mem_ptr; 846 // number of input bitstream error frame count 847 unsigned int m_inp_err_count; 848 #ifdef _ANDROID_ 849 // Timestamp list 850 ts_arr_list m_timestamp_list; 851 #endif 852 853 bool input_flush_progress; 854 bool output_flush_progress; 855 bool input_use_buffer; 856 bool output_use_buffer; 857 bool ouput_egl_buffers; 858 OMX_BOOL m_use_output_pmem; 859 OMX_BOOL m_out_mem_region_smi; 860 OMX_BOOL m_out_pvt_entry_pmem; 861 862 int pending_input_buffers; 863 int pending_output_buffers; 864 // bitmask array size for output side 865 unsigned int m_out_bm_count; 866 // bitmask array size for input side 867 unsigned int m_inp_bm_count; 868 //Input port Populated 869 OMX_BOOL m_inp_bPopulated; 870 //Output port Populated 871 OMX_BOOL m_out_bPopulated; 872 // encapsulate the waiting states. 873 unsigned int m_flags; 874 875 #ifdef _ANDROID_ 876 // Heap pointer to frame buffers 877 struct vidc_heap 878 { 879 sp<MemoryHeapBase> video_heap_ptr; 880 }; 881 struct vidc_heap *m_heap_ptr; 882 unsigned int m_heap_count; 883 #endif //_ANDROID_ 884 // store I/P PORT state 885 OMX_BOOL m_inp_bEnabled; 886 // store O/P PORT state 887 OMX_BOOL m_out_bEnabled; 888 OMX_U32 m_in_alloc_cnt; 889 OMX_U8 m_cRole[OMX_MAX_STRINGNAME_SIZE]; 890 // Platform specific details 891 OMX_QCOM_PLATFORM_PRIVATE_LIST *m_platform_list; 892 OMX_QCOM_PLATFORM_PRIVATE_ENTRY *m_platform_entry; 893 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO *m_pmem_info; 894 895 // for soft ARM codec 896 SWVDEC_INITPARAMS sSwVdecParameter; 897 SWVDEC_HANDLE m_pSwVdec; 898 SWVDEC_CALLBACK m_callBackInfo; 899 SWVDEC_IPBUFFER *m_pSwVdecIpBuffer; 900 SWVDEC_OPBUFFER *m_pSwVdecOpBuffer; 901 OMX_U32 m_nInputBuffer; 902 OMX_U32 m_nOutputBuffer; 903 904 interm_buffer_state m_interm_buf_state[32]; 905 OMX_BUFFERHEADERTYPE* m_interm_mem_ptr; 906 bool m_interm_flush_dsp_progress; 907 bool m_interm_flush_swvdec_progress; 908 OMX_BOOL m_interm_bPopulated; 909 OMX_BOOL m_interm_bEnabled; 910 int m_swvdec_mode; 911 OMX_BOOL m_fill_internal_bufers; 912 913 // SPS+PPS sent as part of set_config 914 OMX_VENDOR_EXTRADATATYPE m_vendor_config; 915 916 /*Variables for arbitrary Byte parsing support*/ 917 frame_parse m_frame_parser; 918 omx_cmd_queue m_input_pending_q; 919 omx_cmd_queue m_input_free_q; 920 bool arbitrary_bytes; 921 OMX_BUFFERHEADERTYPE h264_scratch; 922 OMX_BUFFERHEADERTYPE *psource_frame; 923 OMX_BUFFERHEADERTYPE *pdest_frame; 924 OMX_BUFFERHEADERTYPE *m_inp_heap_ptr; 925 OMX_BUFFERHEADERTYPE **m_phdr_pmem_ptr; 926 unsigned int m_heap_inp_bm_count; 927 codec_type codec_type_parse; 928 bool first_frame_meta; 929 unsigned frame_count; 930 unsigned nal_count; 931 unsigned nal_length; 932 bool look_ahead_nal; 933 int first_frame; 934 unsigned char *first_buffer; 935 int first_frame_size; 936 unsigned char m_hwdevice_name[80]; 937 FILE *m_device_file_ptr; 938 enum vc1_profile_type m_vc1_profile; 939 OMX_S64 h264_last_au_ts; 940 OMX_U32 h264_last_au_flags; 941 OMX_U32 m_demux_offsets[8192]; 942 OMX_U32 m_demux_entries; 943 OMX_U32 m_disp_hor_size; 944 OMX_U32 m_disp_vert_size; 945 946 OMX_S64 prev_ts; 947 bool rst_prev_ts; 948 OMX_U32 frm_int; 949 950 struct vdec_allocatorproperty op_buf_rcnfg; 951 bool in_reconfig; 952 OMX_NATIVE_WINDOWTYPE m_display_id; 953 h264_stream_parser *h264_parser; 954 OMX_U32 client_extradata; 955 #ifdef _ANDROID_ 956 bool m_debug_timestamp; 957 bool perf_flag; 958 OMX_U32 proc_frms, latency; 959 perf_metrics fps_metrics; 960 perf_metrics dec_time; 961 bool m_enable_android_native_buffers; 962 bool m_use_android_native_buffers; 963 bool m_debug_extradata; 964 bool m_debug_concealedmb; 965 bool m_disable_dynamic_buf_mode; 966 #endif 967 #ifdef MAX_RES_1080P 968 MP4_Utils mp4_headerparser; 969 #endif 970 971 struct h264_mv_buffer{ 972 unsigned char* buffer; 973 int size; 974 int count; 975 int pmem_fd; 976 int offset; 977 }; 978 h264_mv_buffer h264_mv_buff; 979 980 struct meta_buffer{ 981 unsigned char* buffer; 982 int size; 983 int count; 984 int pmem_fd; 985 int pmem_fd_iommu; 986 int offset; 987 }; 988 meta_buffer meta_buff; 989 extra_data_handler extra_data_handle; 990 OMX_PARAM_PORTDEFINITIONTYPE m_port_def; 991 omx_time_stamp_reorder time_stamp_dts; 992 desc_buffer_hdr *m_desc_buffer_ptr; 993 bool secure_mode; 994 bool external_meta_buffer; 995 bool external_meta_buffer_iommu; 996 OMX_QCOM_EXTRADATA_FRAMEINFO *m_extradata; 997 bool codec_config_flag; 998 #ifdef _MSM8974_ 999 int capture_capability; 1000 int output_capability; 1001 bool streaming[MAX_PORT]; 1002 OMX_CONFIG_RECTTYPE rectangle; 1003 int prev_n_filled_len; 1004 #endif 1005 bool m_power_hinted; 1006 OMX_ERRORTYPE power_module_register(); 1007 OMX_ERRORTYPE power_module_deregister(); 1008 bool msg_thread_created; 1009 bool async_thread_created; 1010 1011 bool dynamic_buf_mode; 1012 struct dynamic_buf_list *out_dynamic_list; 1013 1014 bool m_smoothstreaming_mode; 1015 OMX_U32 m_smoothstreaming_width; 1016 OMX_U32 m_smoothstreaming_height; 1017 OMX_ERRORTYPE enable_smoothstreaming(); 1018 1019 unsigned int m_fill_output_msg; 1020 class allocate_color_convert_buf { 1021 public: 1022 allocate_color_convert_buf(); 1023 ~allocate_color_convert_buf(); 1024 void set_vdec_client(void *); 1025 void update_client(); 1026 bool set_color_format(OMX_COLOR_FORMATTYPE dest_color_format); 1027 bool get_color_format(OMX_COLOR_FORMATTYPE &dest_color_format); 1028 bool update_buffer_req(); 1029 bool get_buffer_req(unsigned int &buffer_size); 1030 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(); 1031 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 1032 OMX_BUFFERHEADERTYPE* get_dr_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 1033 OMX_BUFFERHEADERTYPE* convert(OMX_BUFFERHEADERTYPE *header); 1034 OMX_BUFFERHEADERTYPE* queue_buffer(OMX_BUFFERHEADERTYPE *header); 1035 OMX_ERRORTYPE allocate_buffers_color_convert(OMX_HANDLETYPE hComp, 1036 OMX_BUFFERHEADERTYPE **bufferHdr,OMX_U32 port,OMX_PTR appData, 1037 OMX_U32 bytes); 1038 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 1039 private: 1040 #define MAX_COUNT 32 1041 omx_vdec *omx; 1042 bool enabled; 1043 OMX_COLOR_FORMATTYPE ColorFormat; 1044 void init_members(); 1045 bool color_convert_mode; 1046 ColorConvertFormat dest_format; 1047 class omx_c2d_conv c2d; 1048 unsigned int allocated_count; 1049 unsigned int buffer_size_req; 1050 unsigned int buffer_alignment_req; 1051 OMX_QCOM_PLATFORM_PRIVATE_LIST m_platform_list_client[MAX_COUNT]; 1052 OMX_QCOM_PLATFORM_PRIVATE_ENTRY m_platform_entry_client[MAX_COUNT]; 1053 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO m_pmem_info_client[MAX_COUNT]; 1054 OMX_BUFFERHEADERTYPE m_out_mem_ptr_client[MAX_COUNT]; 1055 #ifdef USE_ION 1056 struct vdec_ion op_buf_ion_info[MAX_COUNT]; 1057 #endif 1058 unsigned char *pmem_baseaddress[MAX_COUNT]; 1059 int pmem_fd[MAX_COUNT]; 1060 struct vidc_heap 1061 { 1062 sp<MemoryHeapBase> video_heap_ptr; 1063 }; 1064 struct vidc_heap m_heap_ptr[MAX_COUNT]; 1065 }; 1066 #if defined (_MSM8960_) || defined (_MSM8974_) 1067 allocate_color_convert_buf client_buffers; 1068 #endif 1069 HEVC_Utils mHEVCutils; 1070 struct video_decoder_capability m_decoder_capability; 1071 struct debug_cap m_debug; 1072 int log_input_buffers(const char *, int); 1073 int log_output_buffers(OMX_BUFFERHEADERTYPE *); 1074 int log_im_buffer(OMX_BUFFERHEADERTYPE * buffer); 1075 }; 1076 1077 #ifdef _MSM8974_ 1078 enum instance_state { 1079 MSM_VIDC_CORE_UNINIT_DONE = 0x0001, 1080 MSM_VIDC_CORE_INIT, 1081 MSM_VIDC_CORE_INIT_DONE, 1082 MSM_VIDC_OPEN, 1083 MSM_VIDC_OPEN_DONE, 1084 MSM_VIDC_LOAD_RESOURCES, 1085 MSM_VIDC_LOAD_RESOURCES_DONE, 1086 MSM_VIDC_START, 1087 MSM_VIDC_START_DONE, 1088 MSM_VIDC_STOP, 1089 MSM_VIDC_STOP_DONE, 1090 MSM_VIDC_RELEASE_RESOURCES, 1091 MSM_VIDC_RELEASE_RESOURCES_DONE, 1092 MSM_VIDC_CLOSE, 1093 MSM_VIDC_CLOSE_DONE, 1094 MSM_VIDC_CORE_UNINIT, 1095 }; 1096 1097 enum vidc_resposes_id { 1098 MSM_VIDC_DECODER_FLUSH_DONE = 0x11, 1099 MSM_VIDC_DECODER_EVENT_CHANGE, 1100 }; 1101 1102 #endif // _MSM8974_ 1103 1104 #endif // __OMX_VDEC_H__ 1105
