1 // Do not edit. Bootstrap copy of /usr/local/google/buildbot/src/android/build-tools/out/obj/go/src/cmd/compile/internal/arm/prog.go 2 3 //line /usr/local/google/buildbot/src/android/build-tools/out/obj/go/src/cmd/compile/internal/arm/prog.go:1 4 // Copyright 2013 The Go Authors. All rights reserved. 5 // Use of this source code is governed by a BSD-style 6 // license that can be found in the LICENSE file. 7 8 package arm 9 10 import ( 11 "bootstrap/compile/internal/gc" 12 "bootstrap/internal/obj" 13 "bootstrap/internal/obj/arm" 14 ) 15 16 const ( 17 RightRdwr = gc.RightRead | gc.RightWrite 18 ) 19 20 // This table gives the basic information about instruction 21 // generated by the compiler and processed in the optimizer. 22 // See opt.h for bit definitions. 23 // 24 // Instructions not generated need not be listed. 25 // As an exception to that rule, we typically write down all the 26 // size variants of an operation even if we just use a subset. 27 // 28 // The table is formatted for 8-space tabs. 29 var progtable = [arm.ALAST]obj.ProgInfo{ 30 obj.ATYPE: {gc.Pseudo | gc.Skip, 0, 0, 0}, 31 obj.ATEXT: {gc.Pseudo, 0, 0, 0}, 32 obj.AFUNCDATA: {gc.Pseudo, 0, 0, 0}, 33 obj.APCDATA: {gc.Pseudo, 0, 0, 0}, 34 obj.AUNDEF: {gc.Break, 0, 0, 0}, 35 obj.AUSEFIELD: {gc.OK, 0, 0, 0}, 36 obj.ACHECKNIL: {gc.LeftRead, 0, 0, 0}, 37 obj.AVARDEF: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 38 obj.AVARKILL: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 39 40 // NOP is an internal no-op that also stands 41 // for USED and SET annotations, not the Intel opcode. 42 obj.ANOP: {gc.LeftRead | gc.RightWrite, 0, 0, 0}, 43 44 // Integer. 45 arm.AADC: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 46 arm.AADD: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 47 arm.AAND: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 48 arm.ABIC: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 49 arm.ACMN: {gc.SizeL | gc.LeftRead | gc.RightRead, 0, 0, 0}, 50 arm.ACMP: {gc.SizeL | gc.LeftRead | gc.RightRead, 0, 0, 0}, 51 arm.ADIVU: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 52 arm.ADIV: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 53 arm.AEOR: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 54 arm.AMODU: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 55 arm.AMOD: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 56 arm.AMULALU: {gc.SizeL | gc.LeftRead | gc.RegRead | RightRdwr, 0, 0, 0}, 57 arm.AMULAL: {gc.SizeL | gc.LeftRead | gc.RegRead | RightRdwr, 0, 0, 0}, 58 arm.AMULA: {gc.SizeL | gc.LeftRead | gc.RegRead | RightRdwr, 0, 0, 0}, 59 arm.AMULU: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 60 arm.AMUL: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 61 arm.AMULL: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 62 arm.AMULLU: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 63 arm.AMVN: {gc.SizeL | gc.LeftRead | gc.RightWrite, 0, 0, 0}, 64 arm.AORR: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 65 arm.ARSB: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 66 arm.ARSC: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 67 arm.ASBC: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 68 arm.ASLL: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 69 arm.ASRA: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 70 arm.ASRL: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 71 arm.ASUB: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 72 arm.ATEQ: {gc.SizeL | gc.LeftRead | gc.RightRead, 0, 0, 0}, 73 arm.ATST: {gc.SizeL | gc.LeftRead | gc.RightRead, 0, 0, 0}, 74 75 // Floating point. 76 arm.AADDD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 77 arm.AADDF: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 78 arm.ACMPD: {gc.SizeD | gc.LeftRead | gc.RightRead, 0, 0, 0}, 79 arm.ACMPF: {gc.SizeF | gc.LeftRead | gc.RightRead, 0, 0, 0}, 80 arm.ADIVD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 81 arm.ADIVF: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 82 arm.AMULD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 83 arm.AMULF: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 84 arm.ASUBD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 85 arm.ASUBF: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 86 arm.ASQRTD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 87 88 // Conversions. 89 arm.AMOVWD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 90 arm.AMOVWF: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 91 arm.AMOVDF: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 92 arm.AMOVDW: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 93 arm.AMOVFD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 94 arm.AMOVFW: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 95 96 // Moves. 97 arm.AMOVB: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 98 arm.AMOVD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 99 arm.AMOVF: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 100 arm.AMOVH: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 101 arm.AMOVW: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 102 103 // In addtion, duffzero reads R0,R1 and writes R1. This fact is 104 // encoded in peep.c 105 obj.ADUFFZERO: {gc.Call, 0, 0, 0}, 106 107 // In addtion, duffcopy reads R1,R2 and writes R0,R1,R2. This fact is 108 // encoded in peep.c 109 obj.ADUFFCOPY: {gc.Call, 0, 0, 0}, 110 111 // These should be split into the two different conversions instead 112 // of overloading the one. 113 arm.AMOVBS: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 114 arm.AMOVBU: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 115 arm.AMOVHS: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 116 arm.AMOVHU: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 117 118 // Jumps. 119 arm.AB: {gc.Jump | gc.Break, 0, 0, 0}, 120 arm.ABL: {gc.Call, 0, 0, 0}, 121 arm.ABEQ: {gc.Cjmp, 0, 0, 0}, 122 arm.ABNE: {gc.Cjmp, 0, 0, 0}, 123 arm.ABCS: {gc.Cjmp, 0, 0, 0}, 124 arm.ABHS: {gc.Cjmp, 0, 0, 0}, 125 arm.ABCC: {gc.Cjmp, 0, 0, 0}, 126 arm.ABLO: {gc.Cjmp, 0, 0, 0}, 127 arm.ABMI: {gc.Cjmp, 0, 0, 0}, 128 arm.ABPL: {gc.Cjmp, 0, 0, 0}, 129 arm.ABVS: {gc.Cjmp, 0, 0, 0}, 130 arm.ABVC: {gc.Cjmp, 0, 0, 0}, 131 arm.ABHI: {gc.Cjmp, 0, 0, 0}, 132 arm.ABLS: {gc.Cjmp, 0, 0, 0}, 133 arm.ABGE: {gc.Cjmp, 0, 0, 0}, 134 arm.ABLT: {gc.Cjmp, 0, 0, 0}, 135 arm.ABGT: {gc.Cjmp, 0, 0, 0}, 136 arm.ABLE: {gc.Cjmp, 0, 0, 0}, 137 obj.ARET: {gc.Break, 0, 0, 0}, 138 } 139 140 func proginfo(p *obj.Prog) { 141 info := &p.Info 142 *info = progtable[p.As] 143 if info.Flags == 0 { 144 gc.Fatal("unknown instruction %v", p) 145 } 146 147 if p.From.Type == obj.TYPE_ADDR && p.From.Sym != nil && (info.Flags&gc.LeftRead != 0) { 148 info.Flags &^= gc.LeftRead 149 info.Flags |= gc.LeftAddr 150 } 151 152 if (info.Flags&gc.RegRead != 0) && p.Reg == 0 { 153 info.Flags &^= gc.RegRead 154 info.Flags |= gc.CanRegRead | gc.RightRead 155 } 156 157 if (p.Scond&arm.C_SCOND != arm.C_SCOND_NONE) && (info.Flags&gc.RightWrite != 0) { 158 info.Flags |= gc.RightRead 159 } 160 161 switch p.As { 162 case arm.ADIV, 163 arm.ADIVU, 164 arm.AMOD, 165 arm.AMODU: 166 info.Regset |= RtoB(arm.REG_R12) 167 } 168 } 169
