1 /*- 2 * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $ 27 */ 28 29 /* 30 Rewritten for Android. 31 */ 32 33 /* MIPS FPU floating point control register bits. 34 * 35 * 31-25 -> floating point conditions code bits set by FP compare 36 * instructions 37 * 24 -> flush denormalized results to zero instead of 38 * causing unimplemented operation exception. 39 * 23 -> Condition bit 40 * 22 -> In conjunction with FS detects denormalized 41 * operands and replaces them internally with 0. 42 * 21 -> In conjunction with FS forces denormalized operands 43 * to the closest normalized value. 44 * 20-18 -> reserved (read as 0, write with 0) 45 * 17 -> cause bit for unimplemented operation 46 * 16 -> cause bit for invalid exception 47 * 15 -> cause bit for division by zero exception 48 * 14 -> cause bit for overflow exception 49 * 13 -> cause bit for underflow exception 50 * 12 -> cause bit for inexact exception 51 * 11 -> enable exception for invalid exception 52 * 10 -> enable exception for division by zero exception 53 * 9 -> enable exception for overflow exception 54 * 8 -> enable exception for underflow exception 55 * 7 -> enable exception for inexact exception 56 * 6 -> flag invalid exception 57 * 5 -> flag division by zero exception 58 * 4 -> flag overflow exception 59 * 3 -> flag underflow exception 60 * 2 -> flag inexact exception 61 * 1-0 -> rounding control 62 * 63 * 64 * Rounding Control: 65 * 00 - rounding to nearest (RN) 66 * 01 - rounding toward zero (RZ) 67 * 10 - rounding (up) toward plus infinity (RP) 68 * 11 - rounding (down)toward minus infinity (RM) 69 */ 70 71 #ifndef _MIPS_FENV_H_ 72 #define _MIPS_FENV_H_ 73 74 #include <sys/types.h> 75 76 __BEGIN_DECLS 77 78 typedef __uint32_t fenv_t; 79 typedef __uint32_t fexcept_t; 80 81 /* Exception flags */ 82 #define FE_INVALID 0x40 83 #define FE_DIVBYZERO 0x20 84 #define FE_OVERFLOW 0x10 85 #define FE_UNDERFLOW 0x08 86 #define FE_INEXACT 0x04 87 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ 88 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) 89 90 /* Rounding modes */ 91 #define FE_TONEAREST 0x0000 92 #define FE_TOWARDZERO 0x0001 93 #define FE_UPWARD 0x0002 94 #define FE_DOWNWARD 0x0003 95 96 __END_DECLS 97 98 #endif /* !_MIPS_FENV_H_ */ 99
