1 // arm.cc -- arm target support for gold. 2 3 // Copyright (C) 2009-2014 Free Software Foundation, Inc. 4 // Written by Doug Kwan <dougkwan (at) google.com> based on the i386 code 5 // by Ian Lance Taylor <iant (at) google.com>. 6 // This file also contains borrowed and adapted code from 7 // bfd/elf32-arm.c. 8 9 // This file is part of gold. 10 11 // This program is free software; you can redistribute it and/or modify 12 // it under the terms of the GNU General Public License as published by 13 // the Free Software Foundation; either version 3 of the License, or 14 // (at your option) any later version. 15 16 // This program is distributed in the hope that it will be useful, 17 // but WITHOUT ANY WARRANTY; without even the implied warranty of 18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 // GNU General Public License for more details. 20 21 // You should have received a copy of the GNU General Public License 22 // along with this program; if not, write to the Free Software 23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 24 // MA 02110-1301, USA. 25 26 #include "gold.h" 27 28 #include <cstring> 29 #include <limits> 30 #include <cstdio> 31 #include <string> 32 #include <algorithm> 33 #include <map> 34 #include <utility> 35 #include <set> 36 37 #include "elfcpp.h" 38 #include "parameters.h" 39 #include "reloc.h" 40 #include "arm.h" 41 #include "object.h" 42 #include "symtab.h" 43 #include "layout.h" 44 #include "output.h" 45 #include "copy-relocs.h" 46 #include "target.h" 47 #include "target-reloc.h" 48 #include "target-select.h" 49 #include "tls.h" 50 #include "defstd.h" 51 #include "gc.h" 52 #include "attributes.h" 53 #include "arm-reloc-property.h" 54 #include "nacl.h" 55 56 namespace 57 { 58 59 using namespace gold; 60 61 template<bool big_endian> 62 class Output_data_plt_arm; 63 64 template<bool big_endian> 65 class Output_data_plt_arm_standard; 66 67 template<bool big_endian> 68 class Stub_table; 69 70 template<bool big_endian> 71 class Arm_input_section; 72 73 class Arm_exidx_cantunwind; 74 75 class Arm_exidx_merged_section; 76 77 class Arm_exidx_fixup; 78 79 template<bool big_endian> 80 class Arm_output_section; 81 82 class Arm_exidx_input_section; 83 84 template<bool big_endian> 85 class Arm_relobj; 86 87 template<bool big_endian> 88 class Arm_relocate_functions; 89 90 template<bool big_endian> 91 class Arm_output_data_got; 92 93 template<bool big_endian> 94 class Target_arm; 95 96 // For convenience. 97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address; 98 99 // Maximum branch offsets for ARM, THUMB and THUMB2. 100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8); 101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8); 102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4); 103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4); 104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4); 105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4); 106 107 // Thread Control Block size. 108 const size_t ARM_TCB_SIZE = 8; 109 110 // The arm target class. 111 // 112 // This is a very simple port of gold for ARM-EABI. It is intended for 113 // supporting Android only for the time being. 114 // 115 // TODOs: 116 // - Implement all static relocation types documented in arm-reloc.def. 117 // - Make PLTs more flexible for different architecture features like 118 // Thumb-2 and BE8. 119 // There are probably a lot more. 120 121 // Ideally we would like to avoid using global variables but this is used 122 // very in many places and sometimes in loops. If we use a function 123 // returning a static instance of Arm_reloc_property_table, it will be very 124 // slow in an threaded environment since the static instance needs to be 125 // locked. The pointer is below initialized in the 126 // Target::do_select_as_default_target() hook so that we do not spend time 127 // building the table if we are not linking ARM objects. 128 // 129 // An alternative is to to process the information in arm-reloc.def in 130 // compilation time and generate a representation of it in PODs only. That 131 // way we can avoid initialization when the linker starts. 132 133 Arm_reloc_property_table* arm_reloc_property_table = NULL; 134 135 // Instruction template class. This class is similar to the insn_sequence 136 // struct in bfd/elf32-arm.c. 137 138 class Insn_template 139 { 140 public: 141 // Types of instruction templates. 142 enum Type 143 { 144 THUMB16_TYPE = 1, 145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction 146 // templates with class-specific semantics. Currently this is used 147 // only by the Cortex_a8_stub class for handling condition codes in 148 // conditional branches. 149 THUMB16_SPECIAL_TYPE, 150 THUMB32_TYPE, 151 ARM_TYPE, 152 DATA_TYPE 153 }; 154 155 // Factory methods to create instruction templates in different formats. 156 157 static const Insn_template 158 thumb16_insn(uint32_t data) 159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); } 160 161 // A Thumb conditional branch, in which the proper condition is inserted 162 // when we build the stub. 163 static const Insn_template 164 thumb16_bcond_insn(uint32_t data) 165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); } 166 167 static const Insn_template 168 thumb32_insn(uint32_t data) 169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); } 170 171 static const Insn_template 172 thumb32_b_insn(uint32_t data, int reloc_addend) 173 { 174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24, 175 reloc_addend); 176 } 177 178 static const Insn_template 179 arm_insn(uint32_t data) 180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); } 181 182 static const Insn_template 183 arm_rel_insn(unsigned data, int reloc_addend) 184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); } 185 186 static const Insn_template 187 data_word(unsigned data, unsigned int r_type, int reloc_addend) 188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); } 189 190 // Accessors. This class is used for read-only objects so no modifiers 191 // are provided. 192 193 uint32_t 194 data() const 195 { return this->data_; } 196 197 // Return the instruction sequence type of this. 198 Type 199 type() const 200 { return this->type_; } 201 202 // Return the ARM relocation type of this. 203 unsigned int 204 r_type() const 205 { return this->r_type_; } 206 207 int32_t 208 reloc_addend() const 209 { return this->reloc_addend_; } 210 211 // Return size of instruction template in bytes. 212 size_t 213 size() const; 214 215 // Return byte-alignment of instruction template. 216 unsigned 217 alignment() const; 218 219 private: 220 // We make the constructor private to ensure that only the factory 221 // methods are used. 222 inline 223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend) 224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend) 225 { } 226 227 // Instruction specific data. This is used to store information like 228 // some of the instruction bits. 229 uint32_t data_; 230 // Instruction template type. 231 Type type_; 232 // Relocation type if there is a relocation or R_ARM_NONE otherwise. 233 unsigned int r_type_; 234 // Relocation addend. 235 int32_t reloc_addend_; 236 }; 237 238 // Macro for generating code to stub types. One entry per long/short 239 // branch stub 240 241 #define DEF_STUBS \ 242 DEF_STUB(long_branch_any_any) \ 243 DEF_STUB(long_branch_v4t_arm_thumb) \ 244 DEF_STUB(long_branch_thumb_only) \ 245 DEF_STUB(long_branch_v4t_thumb_thumb) \ 246 DEF_STUB(long_branch_v4t_thumb_arm) \ 247 DEF_STUB(short_branch_v4t_thumb_arm) \ 248 DEF_STUB(long_branch_any_arm_pic) \ 249 DEF_STUB(long_branch_any_thumb_pic) \ 250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ 251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \ 252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \ 253 DEF_STUB(long_branch_thumb_only_pic) \ 254 DEF_STUB(a8_veneer_b_cond) \ 255 DEF_STUB(a8_veneer_b) \ 256 DEF_STUB(a8_veneer_bl) \ 257 DEF_STUB(a8_veneer_blx) \ 258 DEF_STUB(v4_veneer_bx) 259 260 // Stub types. 261 262 #define DEF_STUB(x) arm_stub_##x, 263 typedef enum 264 { 265 arm_stub_none, 266 DEF_STUBS 267 268 // First reloc stub type. 269 arm_stub_reloc_first = arm_stub_long_branch_any_any, 270 // Last reloc stub type. 271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic, 272 273 // First Cortex-A8 stub type. 274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond, 275 // Last Cortex-A8 stub type. 276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx, 277 278 // Last stub type. 279 arm_stub_type_last = arm_stub_v4_veneer_bx 280 } Stub_type; 281 #undef DEF_STUB 282 283 // Stub template class. Templates are meant to be read-only objects. 284 // A stub template for a stub type contains all read-only attributes 285 // common to all stubs of the same type. 286 287 class Stub_template 288 { 289 public: 290 Stub_template(Stub_type, const Insn_template*, size_t); 291 292 ~Stub_template() 293 { } 294 295 // Return stub type. 296 Stub_type 297 type() const 298 { return this->type_; } 299 300 // Return an array of instruction templates. 301 const Insn_template* 302 insns() const 303 { return this->insns_; } 304 305 // Return size of template in number of instructions. 306 size_t 307 insn_count() const 308 { return this->insn_count_; } 309 310 // Return size of template in bytes. 311 size_t 312 size() const 313 { return this->size_; } 314 315 // Return alignment of the stub template. 316 unsigned 317 alignment() const 318 { return this->alignment_; } 319 320 // Return whether entry point is in thumb mode. 321 bool 322 entry_in_thumb_mode() const 323 { return this->entry_in_thumb_mode_; } 324 325 // Return number of relocations in this template. 326 size_t 327 reloc_count() const 328 { return this->relocs_.size(); } 329 330 // Return index of the I-th instruction with relocation. 331 size_t 332 reloc_insn_index(size_t i) const 333 { 334 gold_assert(i < this->relocs_.size()); 335 return this->relocs_[i].first; 336 } 337 338 // Return the offset of the I-th instruction with relocation from the 339 // beginning of the stub. 340 section_size_type 341 reloc_offset(size_t i) const 342 { 343 gold_assert(i < this->relocs_.size()); 344 return this->relocs_[i].second; 345 } 346 347 private: 348 // This contains information about an instruction template with a relocation 349 // and its offset from start of stub. 350 typedef std::pair<size_t, section_size_type> Reloc; 351 352 // A Stub_template may not be copied. We want to share templates as much 353 // as possible. 354 Stub_template(const Stub_template&); 355 Stub_template& operator=(const Stub_template&); 356 357 // Stub type. 358 Stub_type type_; 359 // Points to an array of Insn_templates. 360 const Insn_template* insns_; 361 // Number of Insn_templates in insns_[]. 362 size_t insn_count_; 363 // Size of templated instructions in bytes. 364 size_t size_; 365 // Alignment of templated instructions. 366 unsigned alignment_; 367 // Flag to indicate if entry is in thumb mode. 368 bool entry_in_thumb_mode_; 369 // A table of reloc instruction indices and offsets. We can find these by 370 // looking at the instruction templates but we pre-compute and then stash 371 // them here for speed. 372 std::vector<Reloc> relocs_; 373 }; 374 375 // 376 // A class for code stubs. This is a base class for different type of 377 // stubs used in the ARM target. 378 // 379 380 class Stub 381 { 382 private: 383 static const section_offset_type invalid_offset = 384 static_cast<section_offset_type>(-1); 385 386 public: 387 Stub(const Stub_template* stub_template) 388 : stub_template_(stub_template), offset_(invalid_offset) 389 { } 390 391 virtual 392 ~Stub() 393 { } 394 395 // Return the stub template. 396 const Stub_template* 397 stub_template() const 398 { return this->stub_template_; } 399 400 // Return offset of code stub from beginning of its containing stub table. 401 section_offset_type 402 offset() const 403 { 404 gold_assert(this->offset_ != invalid_offset); 405 return this->offset_; 406 } 407 408 // Set offset of code stub from beginning of its containing stub table. 409 void 410 set_offset(section_offset_type offset) 411 { this->offset_ = offset; } 412 413 // Return the relocation target address of the i-th relocation in the 414 // stub. This must be defined in a child class. 415 Arm_address 416 reloc_target(size_t i) 417 { return this->do_reloc_target(i); } 418 419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written. 420 void 421 write(unsigned char* view, section_size_type view_size, bool big_endian) 422 { this->do_write(view, view_size, big_endian); } 423 424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template 425 // for the i-th instruction. 426 uint16_t 427 thumb16_special(size_t i) 428 { return this->do_thumb16_special(i); } 429 430 protected: 431 // This must be defined in the child class. 432 virtual Arm_address 433 do_reloc_target(size_t) = 0; 434 435 // This may be overridden in the child class. 436 virtual void 437 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 438 { 439 if (big_endian) 440 this->do_fixed_endian_write<true>(view, view_size); 441 else 442 this->do_fixed_endian_write<false>(view, view_size); 443 } 444 445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE 446 // instruction template. 447 virtual uint16_t 448 do_thumb16_special(size_t) 449 { gold_unreachable(); } 450 451 private: 452 // A template to implement do_write. 453 template<bool big_endian> 454 void inline 455 do_fixed_endian_write(unsigned char*, section_size_type); 456 457 // Its template. 458 const Stub_template* stub_template_; 459 // Offset within the section of containing this stub. 460 section_offset_type offset_; 461 }; 462 463 // Reloc stub class. These are stubs we use to fix up relocation because 464 // of limited branch ranges. 465 466 class Reloc_stub : public Stub 467 { 468 public: 469 static const unsigned int invalid_index = static_cast<unsigned int>(-1); 470 // We assume we never jump to this address. 471 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 472 473 // Return destination address. 474 Arm_address 475 destination_address() const 476 { 477 gold_assert(this->destination_address_ != this->invalid_address); 478 return this->destination_address_; 479 } 480 481 // Set destination address. 482 void 483 set_destination_address(Arm_address address) 484 { 485 gold_assert(address != this->invalid_address); 486 this->destination_address_ = address; 487 } 488 489 // Reset destination address. 490 void 491 reset_destination_address() 492 { this->destination_address_ = this->invalid_address; } 493 494 // Determine stub type for a branch of a relocation of R_TYPE going 495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set, 496 // the branch target is a thumb instruction. TARGET is used for look 497 // up ARM-specific linker settings. 498 static Stub_type 499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address, 500 Arm_address branch_target, bool target_is_thumb); 501 502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol 503 // and an addend. Since we treat global and local symbol differently, we 504 // use a Symbol object for a global symbol and a object-index pair for 505 // a local symbol. 506 class Key 507 { 508 public: 509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and 510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL 511 // and R_SYM must not be invalid_index. 512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj, 513 unsigned int r_sym, int32_t addend) 514 : stub_type_(stub_type), addend_(addend) 515 { 516 if (symbol != NULL) 517 { 518 this->r_sym_ = Reloc_stub::invalid_index; 519 this->u_.symbol = symbol; 520 } 521 else 522 { 523 gold_assert(relobj != NULL && r_sym != invalid_index); 524 this->r_sym_ = r_sym; 525 this->u_.relobj = relobj; 526 } 527 } 528 529 ~Key() 530 { } 531 532 // Accessors: Keys are meant to be read-only object so no modifiers are 533 // provided. 534 535 // Return stub type. 536 Stub_type 537 stub_type() const 538 { return this->stub_type_; } 539 540 // Return the local symbol index or invalid_index. 541 unsigned int 542 r_sym() const 543 { return this->r_sym_; } 544 545 // Return the symbol if there is one. 546 const Symbol* 547 symbol() const 548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; } 549 550 // Return the relobj if there is one. 551 const Relobj* 552 relobj() const 553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; } 554 555 // Whether this equals to another key k. 556 bool 557 eq(const Key& k) const 558 { 559 return ((this->stub_type_ == k.stub_type_) 560 && (this->r_sym_ == k.r_sym_) 561 && ((this->r_sym_ != Reloc_stub::invalid_index) 562 ? (this->u_.relobj == k.u_.relobj) 563 : (this->u_.symbol == k.u_.symbol)) 564 && (this->addend_ == k.addend_)); 565 } 566 567 // Return a hash value. 568 size_t 569 hash_value() const 570 { 571 return (this->stub_type_ 572 ^ this->r_sym_ 573 ^ gold::string_hash<char>( 574 (this->r_sym_ != Reloc_stub::invalid_index) 575 ? this->u_.relobj->name().c_str() 576 : this->u_.symbol->name()) 577 ^ this->addend_); 578 } 579 580 // Functors for STL associative containers. 581 struct hash 582 { 583 size_t 584 operator()(const Key& k) const 585 { return k.hash_value(); } 586 }; 587 588 struct equal_to 589 { 590 bool 591 operator()(const Key& k1, const Key& k2) const 592 { return k1.eq(k2); } 593 }; 594 595 // Name of key. This is mainly for debugging. 596 std::string 597 name() const; 598 599 private: 600 // Stub type. 601 Stub_type stub_type_; 602 // If this is a local symbol, this is the index in the defining object. 603 // Otherwise, it is invalid_index for a global symbol. 604 unsigned int r_sym_; 605 // If r_sym_ is an invalid index, this points to a global symbol. 606 // Otherwise, it points to a relobj. We used the unsized and target 607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and 608 // Arm_relobj, in order to avoid making the stub class a template 609 // as most of the stub machinery is endianness-neutral. However, it 610 // may require a bit of casting done by users of this class. 611 union 612 { 613 const Symbol* symbol; 614 const Relobj* relobj; 615 } u_; 616 // Addend associated with a reloc. 617 int32_t addend_; 618 }; 619 620 protected: 621 // Reloc_stubs are created via a stub factory. So these are protected. 622 Reloc_stub(const Stub_template* stub_template) 623 : Stub(stub_template), destination_address_(invalid_address) 624 { } 625 626 ~Reloc_stub() 627 { } 628 629 friend class Stub_factory; 630 631 // Return the relocation target address of the i-th relocation in the 632 // stub. 633 Arm_address 634 do_reloc_target(size_t i) 635 { 636 // All reloc stub have only one relocation. 637 gold_assert(i == 0); 638 return this->destination_address_; 639 } 640 641 private: 642 // Address of destination. 643 Arm_address destination_address_; 644 }; 645 646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit 647 // THUMB branch that meets the following conditions: 648 // 649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of 650 // branch address is 0xffe. 651 // 2. The branch target address is in the same page as the first word of the 652 // branch. 653 // 3. The branch follows a 32-bit instruction which is not a branch. 654 // 655 // To do the fix up, we need to store the address of the branch instruction 656 // and its target at least. We also need to store the original branch 657 // instruction bits for the condition code in a conditional branch. The 658 // condition code is used in a special instruction template. We also want 659 // to identify input sections needing Cortex-A8 workaround quickly. We store 660 // extra information about object and section index of the code section 661 // containing a branch being fixed up. The information is used to mark 662 // the code section when we finalize the Cortex-A8 stubs. 663 // 664 665 class Cortex_a8_stub : public Stub 666 { 667 public: 668 ~Cortex_a8_stub() 669 { } 670 671 // Return the object of the code section containing the branch being fixed 672 // up. 673 Relobj* 674 relobj() const 675 { return this->relobj_; } 676 677 // Return the section index of the code section containing the branch being 678 // fixed up. 679 unsigned int 680 shndx() const 681 { return this->shndx_; } 682 683 // Return the source address of stub. This is the address of the original 684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB 685 // instruction. 686 Arm_address 687 source_address() const 688 { return this->source_address_; } 689 690 // Return the destination address of the stub. This is the branch taken 691 // address of the original branch instruction. LSB is 1 if it is a THUMB 692 // instruction address. 693 Arm_address 694 destination_address() const 695 { return this->destination_address_; } 696 697 // Return the instruction being fixed up. 698 uint32_t 699 original_insn() const 700 { return this->original_insn_; } 701 702 protected: 703 // Cortex_a8_stubs are created via a stub factory. So these are protected. 704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj, 705 unsigned int shndx, Arm_address source_address, 706 Arm_address destination_address, uint32_t original_insn) 707 : Stub(stub_template), relobj_(relobj), shndx_(shndx), 708 source_address_(source_address | 1U), 709 destination_address_(destination_address), 710 original_insn_(original_insn) 711 { } 712 713 friend class Stub_factory; 714 715 // Return the relocation target address of the i-th relocation in the 716 // stub. 717 Arm_address 718 do_reloc_target(size_t i) 719 { 720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond) 721 { 722 // The conditional branch veneer has two relocations. 723 gold_assert(i < 2); 724 return i == 0 ? this->source_address_ + 4 : this->destination_address_; 725 } 726 else 727 { 728 // All other Cortex-A8 stubs have only one relocation. 729 gold_assert(i == 0); 730 return this->destination_address_; 731 } 732 } 733 734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template. 735 uint16_t 736 do_thumb16_special(size_t); 737 738 private: 739 // Object of the code section containing the branch being fixed up. 740 Relobj* relobj_; 741 // Section index of the code section containing the branch begin fixed up. 742 unsigned int shndx_; 743 // Source address of original branch. 744 Arm_address source_address_; 745 // Destination address of the original branch. 746 Arm_address destination_address_; 747 // Original branch instruction. This is needed for copying the condition 748 // code from a condition branch to its stub. 749 uint32_t original_insn_; 750 }; 751 752 // ARMv4 BX Rx branch relocation stub class. 753 class Arm_v4bx_stub : public Stub 754 { 755 public: 756 ~Arm_v4bx_stub() 757 { } 758 759 // Return the associated register. 760 uint32_t 761 reg() const 762 { return this->reg_; } 763 764 protected: 765 // Arm V4BX stubs are created via a stub factory. So these are protected. 766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg) 767 : Stub(stub_template), reg_(reg) 768 { } 769 770 friend class Stub_factory; 771 772 // Return the relocation target address of the i-th relocation in the 773 // stub. 774 Arm_address 775 do_reloc_target(size_t) 776 { gold_unreachable(); } 777 778 // This may be overridden in the child class. 779 virtual void 780 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 781 { 782 if (big_endian) 783 this->do_fixed_endian_v4bx_write<true>(view, view_size); 784 else 785 this->do_fixed_endian_v4bx_write<false>(view, view_size); 786 } 787 788 private: 789 // A template to implement do_write. 790 template<bool big_endian> 791 void inline 792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type) 793 { 794 const Insn_template* insns = this->stub_template()->insns(); 795 elfcpp::Swap<32, big_endian>::writeval(view, 796 (insns[0].data() 797 + (this->reg_ << 16))); 798 view += insns[0].size(); 799 elfcpp::Swap<32, big_endian>::writeval(view, 800 (insns[1].data() + this->reg_)); 801 view += insns[1].size(); 802 elfcpp::Swap<32, big_endian>::writeval(view, 803 (insns[2].data() + this->reg_)); 804 } 805 806 // A register index (r0-r14), which is associated with the stub. 807 uint32_t reg_; 808 }; 809 810 // Stub factory class. 811 812 class Stub_factory 813 { 814 public: 815 // Return the unique instance of this class. 816 static const Stub_factory& 817 get_instance() 818 { 819 static Stub_factory singleton; 820 return singleton; 821 } 822 823 // Make a relocation stub. 824 Reloc_stub* 825 make_reloc_stub(Stub_type stub_type) const 826 { 827 gold_assert(stub_type >= arm_stub_reloc_first 828 && stub_type <= arm_stub_reloc_last); 829 return new Reloc_stub(this->stub_templates_[stub_type]); 830 } 831 832 // Make a Cortex-A8 stub. 833 Cortex_a8_stub* 834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx, 835 Arm_address source, Arm_address destination, 836 uint32_t original_insn) const 837 { 838 gold_assert(stub_type >= arm_stub_cortex_a8_first 839 && stub_type <= arm_stub_cortex_a8_last); 840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx, 841 source, destination, original_insn); 842 } 843 844 // Make an ARM V4BX relocation stub. 845 // This method creates a stub from the arm_stub_v4_veneer_bx template only. 846 Arm_v4bx_stub* 847 make_arm_v4bx_stub(uint32_t reg) const 848 { 849 gold_assert(reg < 0xf); 850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx], 851 reg); 852 } 853 854 private: 855 // Constructor and destructor are protected since we only return a single 856 // instance created in Stub_factory::get_instance(). 857 858 Stub_factory(); 859 860 // A Stub_factory may not be copied since it is a singleton. 861 Stub_factory(const Stub_factory&); 862 Stub_factory& operator=(Stub_factory&); 863 864 // Stub templates. These are initialized in the constructor. 865 const Stub_template* stub_templates_[arm_stub_type_last+1]; 866 }; 867 868 // A class to hold stubs for the ARM target. 869 870 template<bool big_endian> 871 class Stub_table : public Output_data 872 { 873 public: 874 Stub_table(Arm_input_section<big_endian>* owner) 875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0), 876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf), 877 prev_data_size_(0), prev_addralign_(1), padding_(0) 878 { } 879 880 ~Stub_table() 881 { } 882 883 // Owner of this stub table. 884 Arm_input_section<big_endian>* 885 owner() const 886 { return this->owner_; } 887 888 // Whether this stub table is empty. 889 bool 890 empty() const 891 { 892 return (this->reloc_stubs_.empty() 893 && this->cortex_a8_stubs_.empty() 894 && this->arm_v4bx_stubs_.empty()); 895 } 896 897 // Return the current data size. 898 off_t 899 current_data_size() const 900 { return this->current_data_size_for_child(); } 901 902 // Add a STUB using KEY. The caller is responsible for avoiding addition 903 // if a STUB with the same key has already been added. 904 void 905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key) 906 { 907 const Stub_template* stub_template = stub->stub_template(); 908 gold_assert(stub_template->type() == key.stub_type()); 909 this->reloc_stubs_[key] = stub; 910 911 // Assign stub offset early. We can do this because we never remove 912 // reloc stubs and they are in the beginning of the stub table. 913 uint64_t align = stub_template->alignment(); 914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align); 915 stub->set_offset(this->reloc_stubs_size_); 916 this->reloc_stubs_size_ += stub_template->size(); 917 this->reloc_stubs_addralign_ = 918 std::max(this->reloc_stubs_addralign_, align); 919 } 920 921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS. 922 // The caller is responsible for avoiding addition if a STUB with the same 923 // address has already been added. 924 void 925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub) 926 { 927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub); 928 this->cortex_a8_stubs_.insert(value); 929 } 930 931 // Add an ARM V4BX relocation stub. A register index will be retrieved 932 // from the stub. 933 void 934 add_arm_v4bx_stub(Arm_v4bx_stub* stub) 935 { 936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL); 937 this->arm_v4bx_stubs_[stub->reg()] = stub; 938 } 939 940 // Remove all Cortex-A8 stubs. 941 void 942 remove_all_cortex_a8_stubs(); 943 944 // Look up a relocation stub using KEY. Return NULL if there is none. 945 Reloc_stub* 946 find_reloc_stub(const Reloc_stub::Key& key) const 947 { 948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key); 949 return (p != this->reloc_stubs_.end()) ? p->second : NULL; 950 } 951 952 // Look up an arm v4bx relocation stub using the register index. 953 // Return NULL if there is none. 954 Arm_v4bx_stub* 955 find_arm_v4bx_stub(const uint32_t reg) const 956 { 957 gold_assert(reg < 0xf); 958 return this->arm_v4bx_stubs_[reg]; 959 } 960 961 // Relocate stubs in this stub table. 962 void 963 relocate_stubs(const Relocate_info<32, big_endian>*, 964 Target_arm<big_endian>*, Output_section*, 965 unsigned char*, Arm_address, section_size_type); 966 967 // Update data size and alignment at the end of a relaxation pass. Return 968 // true if either data size or alignment is different from that of the 969 // previous relaxation pass. 970 bool 971 update_data_size_and_addralign(); 972 973 // Finalize stubs. Set the offsets of all stubs and mark input sections 974 // needing the Cortex-A8 workaround. 975 void 976 finalize_stubs(); 977 978 // Apply Cortex-A8 workaround to an address range. 979 void 980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*, 981 unsigned char*, Arm_address, 982 section_size_type); 983 984 protected: 985 // Write out section contents. 986 void 987 do_write(Output_file*); 988 989 // Return the required alignment. 990 uint64_t 991 do_addralign() const 992 { return this->prev_addralign_; } 993 994 // Reset address and file offset. 995 void 996 do_reset_address_and_file_offset() 997 { 998 this->set_current_data_size_for_child( 999 this->prev_data_size_ + this->padding_); 1000 } 1001 1002 // Set final data size. 1003 void 1004 set_final_data_size() 1005 { this->set_data_size(this->current_data_size()); } 1006 1007 // Relocate one stub. 1008 void 1009 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 1010 Target_arm<big_endian>*, Output_section*, 1011 unsigned char*, Arm_address, section_size_type); 1012 1013 // Unordered map of relocation stubs. 1014 typedef 1015 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash, 1016 Reloc_stub::Key::equal_to> 1017 Reloc_stub_map; 1018 1019 // List of Cortex-A8 stubs ordered by addresses of branches being 1020 // fixed up in output. 1021 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list; 1022 // List of Arm V4BX relocation stubs ordered by associated registers. 1023 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list; 1024 1025 // Owner of this stub table. 1026 Arm_input_section<big_endian>* owner_; 1027 // The relocation stubs. 1028 Reloc_stub_map reloc_stubs_; 1029 // Size of reloc stubs. 1030 off_t reloc_stubs_size_; 1031 // Maximum address alignment of reloc stubs. 1032 uint64_t reloc_stubs_addralign_; 1033 // The cortex_a8_stubs. 1034 Cortex_a8_stub_list cortex_a8_stubs_; 1035 // The Arm V4BX relocation stubs. 1036 Arm_v4bx_stub_list arm_v4bx_stubs_; 1037 // data size of this in the previous pass. 1038 off_t prev_data_size_; 1039 // address alignment of this in the previous pass. 1040 uint64_t prev_addralign_; 1041 off_t padding_; 1042 }; 1043 1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry 1045 // we add to the end of an EXIDX input section that goes into the output. 1046 1047 class Arm_exidx_cantunwind : public Output_section_data 1048 { 1049 public: 1050 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx) 1051 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx) 1052 { } 1053 1054 // Return the object containing the section pointed by this. 1055 Relobj* 1056 relobj() const 1057 { return this->relobj_; } 1058 1059 // Return the section index of the section pointed by this. 1060 unsigned int 1061 shndx() const 1062 { return this->shndx_; } 1063 1064 protected: 1065 void 1066 do_write(Output_file* of) 1067 { 1068 if (parameters->target().is_big_endian()) 1069 this->do_fixed_endian_write<true>(of); 1070 else 1071 this->do_fixed_endian_write<false>(of); 1072 } 1073 1074 // Write to a map file. 1075 void 1076 do_print_to_mapfile(Mapfile* mapfile) const 1077 { mapfile->print_output_data(this, _("** ARM cantunwind")); } 1078 1079 private: 1080 // Implement do_write for a given endianness. 1081 template<bool big_endian> 1082 void inline 1083 do_fixed_endian_write(Output_file*); 1084 1085 // The object containing the section pointed by this. 1086 Relobj* relobj_; 1087 // The section index of the section pointed by this. 1088 unsigned int shndx_; 1089 }; 1090 1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The 1092 // Offset map is used to map input section offset within the EXIDX section 1093 // to the output offset from the start of this EXIDX section. 1094 1095 typedef std::map<section_offset_type, section_offset_type> 1096 Arm_exidx_section_offset_map; 1097 1098 // Arm_exidx_merged_section class. This represents an EXIDX input section 1099 // with some of its entries merged. 1100 1101 class Arm_exidx_merged_section : public Output_relaxed_input_section 1102 { 1103 public: 1104 // Constructor for Arm_exidx_merged_section. 1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 1106 // SECTION_OFFSET_MAP points to a section offset map describing how 1107 // parts of the input section are mapped to output. DELETED_BYTES is 1108 // the number of bytes deleted from the EXIDX input section. 1109 Arm_exidx_merged_section( 1110 const Arm_exidx_input_section& exidx_input_section, 1111 const Arm_exidx_section_offset_map& section_offset_map, 1112 uint32_t deleted_bytes); 1113 1114 // Build output contents. 1115 void 1116 build_contents(const unsigned char*, section_size_type); 1117 1118 // Return the original EXIDX input section. 1119 const Arm_exidx_input_section& 1120 exidx_input_section() const 1121 { return this->exidx_input_section_; } 1122 1123 // Return the section offset map. 1124 const Arm_exidx_section_offset_map& 1125 section_offset_map() const 1126 { return this->section_offset_map_; } 1127 1128 protected: 1129 // Write merged section into file OF. 1130 void 1131 do_write(Output_file* of); 1132 1133 bool 1134 do_output_offset(const Relobj*, unsigned int, section_offset_type, 1135 section_offset_type*) const; 1136 1137 private: 1138 // Original EXIDX input section. 1139 const Arm_exidx_input_section& exidx_input_section_; 1140 // Section offset map. 1141 const Arm_exidx_section_offset_map& section_offset_map_; 1142 // Merged section contents. We need to keep build the merged section 1143 // and save it here to avoid accessing the original EXIDX section when 1144 // we cannot lock the sections' object. 1145 unsigned char* section_contents_; 1146 }; 1147 1148 // A class to wrap an ordinary input section containing executable code. 1149 1150 template<bool big_endian> 1151 class Arm_input_section : public Output_relaxed_input_section 1152 { 1153 public: 1154 Arm_input_section(Relobj* relobj, unsigned int shndx) 1155 : Output_relaxed_input_section(relobj, shndx, 1), 1156 original_addralign_(1), original_size_(0), stub_table_(NULL), 1157 original_contents_(NULL) 1158 { } 1159 1160 ~Arm_input_section() 1161 { delete[] this->original_contents_; } 1162 1163 // Initialize. 1164 void 1165 init(); 1166 1167 // Whether this is a stub table owner. 1168 bool 1169 is_stub_table_owner() const 1170 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; } 1171 1172 // Return the stub table. 1173 Stub_table<big_endian>* 1174 stub_table() const 1175 { return this->stub_table_; } 1176 1177 // Set the stub_table. 1178 void 1179 set_stub_table(Stub_table<big_endian>* stub_table) 1180 { this->stub_table_ = stub_table; } 1181 1182 // Downcast a base pointer to an Arm_input_section pointer. This is 1183 // not type-safe but we only use Arm_input_section not the base class. 1184 static Arm_input_section<big_endian>* 1185 as_arm_input_section(Output_relaxed_input_section* poris) 1186 { return static_cast<Arm_input_section<big_endian>*>(poris); } 1187 1188 // Return the original size of the section. 1189 uint32_t 1190 original_size() const 1191 { return this->original_size_; } 1192 1193 protected: 1194 // Write data to output file. 1195 void 1196 do_write(Output_file*); 1197 1198 // Return required alignment of this. 1199 uint64_t 1200 do_addralign() const 1201 { 1202 if (this->is_stub_table_owner()) 1203 return std::max(this->stub_table_->addralign(), 1204 static_cast<uint64_t>(this->original_addralign_)); 1205 else 1206 return this->original_addralign_; 1207 } 1208 1209 // Finalize data size. 1210 void 1211 set_final_data_size(); 1212 1213 // Reset address and file offset. 1214 void 1215 do_reset_address_and_file_offset(); 1216 1217 // Output offset. 1218 bool 1219 do_output_offset(const Relobj* object, unsigned int shndx, 1220 section_offset_type offset, 1221 section_offset_type* poutput) const 1222 { 1223 if ((object == this->relobj()) 1224 && (shndx == this->shndx()) 1225 && (offset >= 0) 1226 && (offset <= 1227 convert_types<section_offset_type, uint32_t>(this->original_size_))) 1228 { 1229 *poutput = offset; 1230 return true; 1231 } 1232 else 1233 return false; 1234 } 1235 1236 private: 1237 // Copying is not allowed. 1238 Arm_input_section(const Arm_input_section&); 1239 Arm_input_section& operator=(const Arm_input_section&); 1240 1241 // Address alignment of the original input section. 1242 uint32_t original_addralign_; 1243 // Section size of the original input section. 1244 uint32_t original_size_; 1245 // Stub table. 1246 Stub_table<big_endian>* stub_table_; 1247 // Original section contents. We have to make a copy here since the file 1248 // containing the original section may not be locked when we need to access 1249 // the contents. 1250 unsigned char* original_contents_; 1251 }; 1252 1253 // Arm_exidx_fixup class. This is used to define a number of methods 1254 // and keep states for fixing up EXIDX coverage. 1255 1256 class Arm_exidx_fixup 1257 { 1258 public: 1259 Arm_exidx_fixup(Output_section* exidx_output_section, 1260 bool merge_exidx_entries = true) 1261 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE), 1262 last_inlined_entry_(0), last_input_section_(NULL), 1263 section_offset_map_(NULL), first_output_text_section_(NULL), 1264 merge_exidx_entries_(merge_exidx_entries) 1265 { } 1266 1267 ~Arm_exidx_fixup() 1268 { delete this->section_offset_map_; } 1269 1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points 1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return 1272 // number of bytes to be deleted in output. If parts of the input EXIDX 1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store 1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is 1275 // responsible for releasing it. 1276 template<bool big_endian> 1277 uint32_t 1278 process_exidx_section(const Arm_exidx_input_section* exidx_input_section, 1279 const unsigned char* section_contents, 1280 section_size_type section_size, 1281 Arm_exidx_section_offset_map** psection_offset_map); 1282 1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last 1284 // input section, if there is not one already. 1285 void 1286 add_exidx_cantunwind_as_needed(); 1287 1288 // Return the output section for the text section which is linked to the 1289 // first exidx input in output. 1290 Output_section* 1291 first_output_text_section() const 1292 { return this->first_output_text_section_; } 1293 1294 private: 1295 // Copying is not allowed. 1296 Arm_exidx_fixup(const Arm_exidx_fixup&); 1297 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&); 1298 1299 // Type of EXIDX unwind entry. 1300 enum Unwind_type 1301 { 1302 // No type. 1303 UT_NONE, 1304 // EXIDX_CANTUNWIND. 1305 UT_EXIDX_CANTUNWIND, 1306 // Inlined entry. 1307 UT_INLINED_ENTRY, 1308 // Normal entry. 1309 UT_NORMAL_ENTRY, 1310 }; 1311 1312 // Process an EXIDX entry. We only care about the second word of the 1313 // entry. Return true if the entry can be deleted. 1314 bool 1315 process_exidx_entry(uint32_t second_word); 1316 1317 // Update the current section offset map during EXIDX section fix-up. 1318 // If there is no map, create one. INPUT_OFFSET is the offset of a 1319 // reference point, DELETED_BYTES is the number of deleted by in the 1320 // section so far. If DELETE_ENTRY is true, the reference point and 1321 // all offsets after the previous reference point are discarded. 1322 void 1323 update_offset_map(section_offset_type input_offset, 1324 section_size_type deleted_bytes, bool delete_entry); 1325 1326 // EXIDX output section. 1327 Output_section* exidx_output_section_; 1328 // Unwind type of the last EXIDX entry processed. 1329 Unwind_type last_unwind_type_; 1330 // Last seen inlined EXIDX entry. 1331 uint32_t last_inlined_entry_; 1332 // Last processed EXIDX input section. 1333 const Arm_exidx_input_section* last_input_section_; 1334 // Section offset map created in process_exidx_section. 1335 Arm_exidx_section_offset_map* section_offset_map_; 1336 // Output section for the text section which is linked to the first exidx 1337 // input in output. 1338 Output_section* first_output_text_section_; 1339 1340 bool merge_exidx_entries_; 1341 }; 1342 1343 // Arm output section class. This is defined mainly to add a number of 1344 // stub generation methods. 1345 1346 template<bool big_endian> 1347 class Arm_output_section : public Output_section 1348 { 1349 public: 1350 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list; 1351 1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section. 1353 Arm_output_section(const char* name, elfcpp::Elf_Word type, 1354 elfcpp::Elf_Xword flags) 1355 : Output_section(name, type, 1356 (type == elfcpp::SHT_ARM_EXIDX 1357 ? flags | elfcpp::SHF_LINK_ORDER 1358 : flags)) 1359 { 1360 if (type == elfcpp::SHT_ARM_EXIDX) 1361 this->set_always_keeps_input_sections(); 1362 } 1363 1364 ~Arm_output_section() 1365 { } 1366 1367 // Group input sections for stub generation. 1368 void 1369 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*); 1370 1371 // Downcast a base pointer to an Arm_output_section pointer. This is 1372 // not type-safe but we only use Arm_output_section not the base class. 1373 static Arm_output_section<big_endian>* 1374 as_arm_output_section(Output_section* os) 1375 { return static_cast<Arm_output_section<big_endian>*>(os); } 1376 1377 // Append all input text sections in this into LIST. 1378 void 1379 append_text_sections_to_list(Text_section_list* list); 1380 1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION 1382 // is a list of text input sections sorted in ascending order of their 1383 // output addresses. 1384 void 1385 fix_exidx_coverage(Layout* layout, 1386 const Text_section_list& sorted_text_section, 1387 Symbol_table* symtab, 1388 bool merge_exidx_entries, 1389 const Task* task); 1390 1391 // Link an EXIDX section into its corresponding text section. 1392 void 1393 set_exidx_section_link(); 1394 1395 private: 1396 // For convenience. 1397 typedef Output_section::Input_section Input_section; 1398 typedef Output_section::Input_section_list Input_section_list; 1399 1400 // Create a stub group. 1401 void create_stub_group(Input_section_list::const_iterator, 1402 Input_section_list::const_iterator, 1403 Input_section_list::const_iterator, 1404 Target_arm<big_endian>*, 1405 std::vector<Output_relaxed_input_section*>*, 1406 const Task* task); 1407 }; 1408 1409 // Arm_exidx_input_section class. This represents an EXIDX input section. 1410 1411 class Arm_exidx_input_section 1412 { 1413 public: 1414 static const section_offset_type invalid_offset = 1415 static_cast<section_offset_type>(-1); 1416 1417 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx, 1418 unsigned int link, uint32_t size, 1419 uint32_t addralign, uint32_t text_size) 1420 : relobj_(relobj), shndx_(shndx), link_(link), size_(size), 1421 addralign_(addralign), text_size_(text_size), has_errors_(false) 1422 { } 1423 1424 ~Arm_exidx_input_section() 1425 { } 1426 1427 // Accessors: This is a read-only class. 1428 1429 // Return the object containing this EXIDX input section. 1430 Relobj* 1431 relobj() const 1432 { return this->relobj_; } 1433 1434 // Return the section index of this EXIDX input section. 1435 unsigned int 1436 shndx() const 1437 { return this->shndx_; } 1438 1439 // Return the section index of linked text section in the same object. 1440 unsigned int 1441 link() const 1442 { return this->link_; } 1443 1444 // Return size of the EXIDX input section. 1445 uint32_t 1446 size() const 1447 { return this->size_; } 1448 1449 // Return address alignment of EXIDX input section. 1450 uint32_t 1451 addralign() const 1452 { return this->addralign_; } 1453 1454 // Return size of the associated text input section. 1455 uint32_t 1456 text_size() const 1457 { return this->text_size_; } 1458 1459 // Whether there are any errors in the EXIDX input section. 1460 bool 1461 has_errors() const 1462 { return this->has_errors_; } 1463 1464 // Set has-errors flag. 1465 void 1466 set_has_errors() 1467 { this->has_errors_ = true; } 1468 1469 private: 1470 // Object containing this. 1471 Relobj* relobj_; 1472 // Section index of this. 1473 unsigned int shndx_; 1474 // text section linked to this in the same object. 1475 unsigned int link_; 1476 // Size of this. For ARM 32-bit is sufficient. 1477 uint32_t size_; 1478 // Address alignment of this. For ARM 32-bit is sufficient. 1479 uint32_t addralign_; 1480 // Size of associated text section. 1481 uint32_t text_size_; 1482 // Whether this has any errors. 1483 bool has_errors_; 1484 }; 1485 1486 // Arm_relobj class. 1487 1488 template<bool big_endian> 1489 class Arm_relobj : public Sized_relobj_file<32, big_endian> 1490 { 1491 public: 1492 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 1493 1494 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, 1495 const typename elfcpp::Ehdr<32, big_endian>& ehdr) 1496 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr), 1497 stub_tables_(), local_symbol_is_thumb_function_(), 1498 attributes_section_data_(NULL), mapping_symbols_info_(), 1499 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), 1500 output_local_symbol_count_needs_update_(false), 1501 merge_flags_and_attributes_(true) 1502 { } 1503 1504 ~Arm_relobj() 1505 { delete this->attributes_section_data_; } 1506 1507 // Return the stub table of the SHNDX-th section if there is one. 1508 Stub_table<big_endian>* 1509 stub_table(unsigned int shndx) const 1510 { 1511 gold_assert(shndx < this->stub_tables_.size()); 1512 return this->stub_tables_[shndx]; 1513 } 1514 1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section. 1516 void 1517 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table) 1518 { 1519 gold_assert(shndx < this->stub_tables_.size()); 1520 this->stub_tables_[shndx] = stub_table; 1521 } 1522 1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table 1524 // index. This is only valid after do_count_local_symbol is called. 1525 bool 1526 local_symbol_is_thumb_function(unsigned int r_sym) const 1527 { 1528 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size()); 1529 return this->local_symbol_is_thumb_function_[r_sym]; 1530 } 1531 1532 // Scan all relocation sections for stub generation. 1533 void 1534 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*, 1535 const Layout*); 1536 1537 // Convert regular input section with index SHNDX to a relaxed section. 1538 void 1539 convert_input_section_to_relaxed_section(unsigned shndx) 1540 { 1541 // The stubs have relocations and we need to process them after writing 1542 // out the stubs. So relocation now must follow section write. 1543 this->set_section_offset(shndx, -1ULL); 1544 this->set_relocs_must_follow_section_writes(); 1545 } 1546 1547 // Downcast a base pointer to an Arm_relobj pointer. This is 1548 // not type-safe but we only use Arm_relobj not the base class. 1549 static Arm_relobj<big_endian>* 1550 as_arm_relobj(Relobj* relobj) 1551 { return static_cast<Arm_relobj<big_endian>*>(relobj); } 1552 1553 // Processor-specific flags in ELF file header. This is valid only after 1554 // reading symbols. 1555 elfcpp::Elf_Word 1556 processor_specific_flags() const 1557 { return this->processor_specific_flags_; } 1558 1559 // Attribute section data This is the contents of the .ARM.attribute section 1560 // if there is one. 1561 const Attributes_section_data* 1562 attributes_section_data() const 1563 { return this->attributes_section_data_; } 1564 1565 // Mapping symbol location. 1566 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position; 1567 1568 // Functor for STL container. 1569 struct Mapping_symbol_position_less 1570 { 1571 bool 1572 operator()(const Mapping_symbol_position& p1, 1573 const Mapping_symbol_position& p2) const 1574 { 1575 return (p1.first < p2.first 1576 || (p1.first == p2.first && p1.second < p2.second)); 1577 } 1578 }; 1579 1580 // We only care about the first character of a mapping symbol, so 1581 // we only store that instead of the whole symbol name. 1582 typedef std::map<Mapping_symbol_position, char, 1583 Mapping_symbol_position_less> Mapping_symbols_info; 1584 1585 // Whether a section contains any Cortex-A8 workaround. 1586 bool 1587 section_has_cortex_a8_workaround(unsigned int shndx) const 1588 { 1589 return (this->section_has_cortex_a8_workaround_ != NULL 1590 && (*this->section_has_cortex_a8_workaround_)[shndx]); 1591 } 1592 1593 // Mark a section that has Cortex-A8 workaround. 1594 void 1595 mark_section_for_cortex_a8_workaround(unsigned int shndx) 1596 { 1597 if (this->section_has_cortex_a8_workaround_ == NULL) 1598 this->section_has_cortex_a8_workaround_ = 1599 new std::vector<bool>(this->shnum(), false); 1600 (*this->section_has_cortex_a8_workaround_)[shndx] = true; 1601 } 1602 1603 // Return the EXIDX section of an text section with index SHNDX or NULL 1604 // if the text section has no associated EXIDX section. 1605 const Arm_exidx_input_section* 1606 exidx_input_section_by_link(unsigned int shndx) const 1607 { 1608 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1609 return ((p != this->exidx_section_map_.end() 1610 && p->second->link() == shndx) 1611 ? p->second 1612 : NULL); 1613 } 1614 1615 // Return the EXIDX section with index SHNDX or NULL if there is none. 1616 const Arm_exidx_input_section* 1617 exidx_input_section_by_shndx(unsigned shndx) const 1618 { 1619 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1620 return ((p != this->exidx_section_map_.end() 1621 && p->second->shndx() == shndx) 1622 ? p->second 1623 : NULL); 1624 } 1625 1626 // Whether output local symbol count needs updating. 1627 bool 1628 output_local_symbol_count_needs_update() const 1629 { return this->output_local_symbol_count_needs_update_; } 1630 1631 // Set output_local_symbol_count_needs_update flag to be true. 1632 void 1633 set_output_local_symbol_count_needs_update() 1634 { this->output_local_symbol_count_needs_update_ = true; } 1635 1636 // Update output local symbol count at the end of relaxation. 1637 void 1638 update_output_local_symbol_count(); 1639 1640 // Whether we want to merge processor-specific flags and attributes. 1641 bool 1642 merge_flags_and_attributes() const 1643 { return this->merge_flags_and_attributes_; } 1644 1645 // Export list of EXIDX section indices. 1646 void 1647 get_exidx_shndx_list(std::vector<unsigned int>* list) const 1648 { 1649 list->clear(); 1650 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin(); 1651 p != this->exidx_section_map_.end(); 1652 ++p) 1653 { 1654 if (p->second->shndx() == p->first) 1655 list->push_back(p->first); 1656 } 1657 // Sort list to make result independent of implementation of map. 1658 std::sort(list->begin(), list->end()); 1659 } 1660 1661 protected: 1662 // Post constructor setup. 1663 void 1664 do_setup() 1665 { 1666 // Call parent's setup method. 1667 Sized_relobj_file<32, big_endian>::do_setup(); 1668 1669 // Initialize look-up tables. 1670 Stub_table_list empty_stub_table_list(this->shnum(), NULL); 1671 this->stub_tables_.swap(empty_stub_table_list); 1672 } 1673 1674 // Count the local symbols. 1675 void 1676 do_count_local_symbols(Stringpool_template<char>*, 1677 Stringpool_template<char>*); 1678 1679 void 1680 do_relocate_sections( 1681 const Symbol_table* symtab, const Layout* layout, 1682 const unsigned char* pshdrs, Output_file* of, 1683 typename Sized_relobj_file<32, big_endian>::Views* pivews); 1684 1685 // Read the symbol information. 1686 void 1687 do_read_symbols(Read_symbols_data* sd); 1688 1689 // Process relocs for garbage collection. 1690 void 1691 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*); 1692 1693 private: 1694 1695 // Whether a section needs to be scanned for relocation stubs. 1696 bool 1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1698 const Relobj::Output_sections&, 1699 const Symbol_table*, const unsigned char*); 1700 1701 // Whether a section is a scannable text section. 1702 bool 1703 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int, 1704 const Output_section*, const Symbol_table*); 1705 1706 // Whether a section needs to be scanned for the Cortex-A8 erratum. 1707 bool 1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1709 unsigned int, Output_section*, 1710 const Symbol_table*); 1711 1712 // Scan a section for the Cortex-A8 erratum. 1713 void 1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&, 1715 unsigned int, Output_section*, 1716 Target_arm<big_endian>*); 1717 1718 // Find the linked text section of an EXIDX section by looking at the 1719 // first relocation of the EXIDX section. PSHDR points to the section 1720 // headers of a relocation section and PSYMS points to the local symbols. 1721 // PSHNDX points to a location storing the text section index if found. 1722 // Return whether we can find the linked section. 1723 bool 1724 find_linked_text_section(const unsigned char* pshdr, 1725 const unsigned char* psyms, unsigned int* pshndx); 1726 1727 // 1728 // Make a new Arm_exidx_input_section object for EXIDX section with 1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section 1730 // index of the linked text section. 1731 void 1732 make_exidx_input_section(unsigned int shndx, 1733 const elfcpp::Shdr<32, big_endian>& shdr, 1734 unsigned int text_shndx, 1735 const elfcpp::Shdr<32, big_endian>& text_shdr); 1736 1737 // Return the output address of either a plain input section or a 1738 // relaxed input section. SHNDX is the section index. 1739 Arm_address 1740 simple_input_section_output_address(unsigned int, Output_section*); 1741 1742 typedef std::vector<Stub_table<big_endian>*> Stub_table_list; 1743 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*> 1744 Exidx_section_map; 1745 1746 // List of stub tables. 1747 Stub_table_list stub_tables_; 1748 // Bit vector to tell if a local symbol is a thumb function or not. 1749 // This is only valid after do_count_local_symbol is called. 1750 std::vector<bool> local_symbol_is_thumb_function_; 1751 // processor-specific flags in ELF file header. 1752 elfcpp::Elf_Word processor_specific_flags_; 1753 // Object attributes if there is an .ARM.attributes section or NULL. 1754 Attributes_section_data* attributes_section_data_; 1755 // Mapping symbols information. 1756 Mapping_symbols_info mapping_symbols_info_; 1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL. 1758 std::vector<bool>* section_has_cortex_a8_workaround_; 1759 // Map a text section to its associated .ARM.exidx section, if there is one. 1760 Exidx_section_map exidx_section_map_; 1761 // Whether output local symbol count needs updating. 1762 bool output_local_symbol_count_needs_update_; 1763 // Whether we merge processor flags and attributes of this object to 1764 // output. 1765 bool merge_flags_and_attributes_; 1766 }; 1767 1768 // Arm_dynobj class. 1769 1770 template<bool big_endian> 1771 class Arm_dynobj : public Sized_dynobj<32, big_endian> 1772 { 1773 public: 1774 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset, 1775 const elfcpp::Ehdr<32, big_endian>& ehdr) 1776 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr), 1777 processor_specific_flags_(0), attributes_section_data_(NULL) 1778 { } 1779 1780 ~Arm_dynobj() 1781 { delete this->attributes_section_data_; } 1782 1783 // Downcast a base pointer to an Arm_relobj pointer. This is 1784 // not type-safe but we only use Arm_relobj not the base class. 1785 static Arm_dynobj<big_endian>* 1786 as_arm_dynobj(Dynobj* dynobj) 1787 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); } 1788 1789 // Processor-specific flags in ELF file header. This is valid only after 1790 // reading symbols. 1791 elfcpp::Elf_Word 1792 processor_specific_flags() const 1793 { return this->processor_specific_flags_; } 1794 1795 // Attributes section data. 1796 const Attributes_section_data* 1797 attributes_section_data() const 1798 { return this->attributes_section_data_; } 1799 1800 protected: 1801 // Read the symbol information. 1802 void 1803 do_read_symbols(Read_symbols_data* sd); 1804 1805 private: 1806 // processor-specific flags in ELF file header. 1807 elfcpp::Elf_Word processor_specific_flags_; 1808 // Object attributes if there is an .ARM.attributes section or NULL. 1809 Attributes_section_data* attributes_section_data_; 1810 }; 1811 1812 // Functor to read reloc addends during stub generation. 1813 1814 template<int sh_type, bool big_endian> 1815 struct Stub_addend_reader 1816 { 1817 // Return the addend for a relocation of a particular type. Depending 1818 // on whether this is a REL or RELA relocation, read the addend from a 1819 // view or from a Reloc object. 1820 elfcpp::Elf_types<32>::Elf_Swxword 1821 operator()( 1822 unsigned int /* r_type */, 1823 const unsigned char* /* view */, 1824 const typename Reloc_types<sh_type, 1825 32, big_endian>::Reloc& /* reloc */) const; 1826 }; 1827 1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections. 1829 1830 template<bool big_endian> 1831 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian> 1832 { 1833 elfcpp::Elf_types<32>::Elf_Swxword 1834 operator()( 1835 unsigned int, 1836 const unsigned char*, 1837 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const; 1838 }; 1839 1840 // Specialized Stub_addend_reader for RELA type relocation sections. 1841 // We currently do not handle RELA type relocation sections but it is trivial 1842 // to implement the addend reader. This is provided for completeness and to 1843 // make it easier to add support for RELA relocation sections in the future. 1844 1845 template<bool big_endian> 1846 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian> 1847 { 1848 elfcpp::Elf_types<32>::Elf_Swxword 1849 operator()( 1850 unsigned int, 1851 const unsigned char*, 1852 const typename Reloc_types<elfcpp::SHT_RELA, 32, 1853 big_endian>::Reloc& reloc) const 1854 { return reloc.get_r_addend(); } 1855 }; 1856 1857 // Cortex_a8_reloc class. We keep record of relocation that may need 1858 // the Cortex-A8 erratum workaround. 1859 1860 class Cortex_a8_reloc 1861 { 1862 public: 1863 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type, 1864 Arm_address destination) 1865 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination) 1866 { } 1867 1868 ~Cortex_a8_reloc() 1869 { } 1870 1871 // Accessors: This is a read-only class. 1872 1873 // Return the relocation stub associated with this relocation if there is 1874 // one. 1875 const Reloc_stub* 1876 reloc_stub() const 1877 { return this->reloc_stub_; } 1878 1879 // Return the relocation type. 1880 unsigned int 1881 r_type() const 1882 { return this->r_type_; } 1883 1884 // Return the destination address of the relocation. LSB stores the THUMB 1885 // bit. 1886 Arm_address 1887 destination() const 1888 { return this->destination_; } 1889 1890 private: 1891 // Associated relocation stub if there is one, or NULL. 1892 const Reloc_stub* reloc_stub_; 1893 // Relocation type. 1894 unsigned int r_type_; 1895 // Destination address of this relocation. LSB is used to distinguish 1896 // ARM/THUMB mode. 1897 Arm_address destination_; 1898 }; 1899 1900 // Arm_output_data_got class. We derive this from Output_data_got to add 1901 // extra methods to handle TLS relocations in a static link. 1902 1903 template<bool big_endian> 1904 class Arm_output_data_got : public Output_data_got<32, big_endian> 1905 { 1906 public: 1907 Arm_output_data_got(Symbol_table* symtab, Layout* layout) 1908 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout) 1909 { } 1910 1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global 1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be 1913 // applied in a static link. 1914 void 1915 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1916 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); } 1917 1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object 1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic 1920 // relocation that needs to be applied in a static link. 1921 void 1922 add_static_reloc(unsigned int got_offset, unsigned int r_type, 1923 Sized_relobj_file<32, big_endian>* relobj, 1924 unsigned int index) 1925 { 1926 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj, 1927 index)); 1928 } 1929 1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 1931 // The first one is initialized to be 1, which is the module index for 1932 // the main executable and the second one 0. A reloc of the type 1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 1934 // be applied by gold. GSYM is a global symbol. 1935 void 1936 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym); 1937 1938 // Same as the above but for a local symbol in OBJECT with INDEX. 1939 void 1940 add_tls_gd32_with_static_reloc(unsigned int got_type, 1941 Sized_relobj_file<32, big_endian>* object, 1942 unsigned int index); 1943 1944 protected: 1945 // Write out the GOT table. 1946 void 1947 do_write(Output_file*); 1948 1949 private: 1950 // This class represent dynamic relocations that need to be applied by 1951 // gold because we are using TLS relocations in a static link. 1952 class Static_reloc 1953 { 1954 public: 1955 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1956 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true) 1957 { this->u_.global.symbol = gsym; } 1958 1959 Static_reloc(unsigned int got_offset, unsigned int r_type, 1960 Sized_relobj_file<32, big_endian>* relobj, unsigned int index) 1961 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false) 1962 { 1963 this->u_.local.relobj = relobj; 1964 this->u_.local.index = index; 1965 } 1966 1967 // Return the GOT offset. 1968 unsigned int 1969 got_offset() const 1970 { return this->got_offset_; } 1971 1972 // Relocation type. 1973 unsigned int 1974 r_type() const 1975 { return this->r_type_; } 1976 1977 // Whether the symbol is global or not. 1978 bool 1979 symbol_is_global() const 1980 { return this->symbol_is_global_; } 1981 1982 // For a relocation against a global symbol, the global symbol. 1983 Symbol* 1984 symbol() const 1985 { 1986 gold_assert(this->symbol_is_global_); 1987 return this->u_.global.symbol; 1988 } 1989 1990 // For a relocation against a local symbol, the defining object. 1991 Sized_relobj_file<32, big_endian>* 1992 relobj() const 1993 { 1994 gold_assert(!this->symbol_is_global_); 1995 return this->u_.local.relobj; 1996 } 1997 1998 // For a relocation against a local symbol, the local symbol index. 1999 unsigned int 2000 index() const 2001 { 2002 gold_assert(!this->symbol_is_global_); 2003 return this->u_.local.index; 2004 } 2005 2006 private: 2007 // GOT offset of the entry to which this relocation is applied. 2008 unsigned int got_offset_; 2009 // Type of relocation. 2010 unsigned int r_type_; 2011 // Whether this relocation is against a global symbol. 2012 bool symbol_is_global_; 2013 // A global or local symbol. 2014 union 2015 { 2016 struct 2017 { 2018 // For a global symbol, the symbol itself. 2019 Symbol* symbol; 2020 } global; 2021 struct 2022 { 2023 // For a local symbol, the object defining object. 2024 Sized_relobj_file<32, big_endian>* relobj; 2025 // For a local symbol, the symbol index. 2026 unsigned int index; 2027 } local; 2028 } u_; 2029 }; 2030 2031 // Symbol table of the output object. 2032 Symbol_table* symbol_table_; 2033 // Layout of the output object. 2034 Layout* layout_; 2035 // Static relocs to be applied to the GOT. 2036 std::vector<Static_reloc> static_relocs_; 2037 }; 2038 2039 // The ARM target has many relocation types with odd-sizes or noncontiguous 2040 // bits. The default handling of relocatable relocation cannot process these 2041 // relocations. So we have to extend the default code. 2042 2043 template<bool big_endian, int sh_type, typename Classify_reloc> 2044 class Arm_scan_relocatable_relocs : 2045 public Default_scan_relocatable_relocs<sh_type, Classify_reloc> 2046 { 2047 public: 2048 // Return the strategy to use for a local symbol which is a section 2049 // symbol, given the relocation type. 2050 inline Relocatable_relocs::Reloc_strategy 2051 local_section_strategy(unsigned int r_type, Relobj*) 2052 { 2053 if (sh_type == elfcpp::SHT_RELA) 2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA; 2055 else 2056 { 2057 if (r_type == elfcpp::R_ARM_TARGET1 2058 || r_type == elfcpp::R_ARM_TARGET2) 2059 { 2060 const Target_arm<big_endian>* arm_target = 2061 Target_arm<big_endian>::default_target(); 2062 r_type = arm_target->get_real_reloc_type(r_type); 2063 } 2064 2065 switch(r_type) 2066 { 2067 // Relocations that write nothing. These exclude R_ARM_TARGET1 2068 // and R_ARM_TARGET2. 2069 case elfcpp::R_ARM_NONE: 2070 case elfcpp::R_ARM_V4BX: 2071 case elfcpp::R_ARM_TLS_GOTDESC: 2072 case elfcpp::R_ARM_TLS_CALL: 2073 case elfcpp::R_ARM_TLS_DESCSEQ: 2074 case elfcpp::R_ARM_THM_TLS_CALL: 2075 case elfcpp::R_ARM_GOTRELAX: 2076 case elfcpp::R_ARM_GNU_VTENTRY: 2077 case elfcpp::R_ARM_GNU_VTINHERIT: 2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16: 2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32: 2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0; 2081 // These should have been converted to something else above. 2082 case elfcpp::R_ARM_TARGET1: 2083 case elfcpp::R_ARM_TARGET2: 2084 gold_unreachable(); 2085 // Relocations that write full 32 bits and 2086 // have alignment of 1. 2087 case elfcpp::R_ARM_ABS32: 2088 case elfcpp::R_ARM_REL32: 2089 case elfcpp::R_ARM_SBREL32: 2090 case elfcpp::R_ARM_GOTOFF32: 2091 case elfcpp::R_ARM_BASE_PREL: 2092 case elfcpp::R_ARM_GOT_BREL: 2093 case elfcpp::R_ARM_BASE_ABS: 2094 case elfcpp::R_ARM_ABS32_NOI: 2095 case elfcpp::R_ARM_REL32_NOI: 2096 case elfcpp::R_ARM_PLT32_ABS: 2097 case elfcpp::R_ARM_GOT_ABS: 2098 case elfcpp::R_ARM_GOT_PREL: 2099 case elfcpp::R_ARM_TLS_GD32: 2100 case elfcpp::R_ARM_TLS_LDM32: 2101 case elfcpp::R_ARM_TLS_LDO32: 2102 case elfcpp::R_ARM_TLS_IE32: 2103 case elfcpp::R_ARM_TLS_LE32: 2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED; 2105 default: 2106 // For all other static relocations, return RELOC_SPECIAL. 2107 return Relocatable_relocs::RELOC_SPECIAL; 2108 } 2109 } 2110 } 2111 }; 2112 2113 template<bool big_endian> 2114 class Target_arm : public Sized_target<32, big_endian> 2115 { 2116 public: 2117 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 2118 Reloc_section; 2119 2120 // When were are relocating a stub, we pass this as the relocation number. 2121 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1); 2122 2123 Target_arm(const Target::Target_info* info = &arm_info) 2124 : Sized_target<32, big_endian>(info), 2125 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), 2126 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY), 2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false), 2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()), 2129 should_force_pic_veneer_(false), 2130 arm_input_section_map_(), attributes_section_data_(NULL), 2131 fix_cortex_a8_(false), cortex_a8_relocs_info_() 2132 { } 2133 2134 // Whether we force PCI branch veneers. 2135 bool 2136 should_force_pic_veneer() const 2137 { return this->should_force_pic_veneer_; } 2138 2139 // Set PIC veneer flag. 2140 void 2141 set_should_force_pic_veneer(bool value) 2142 { this->should_force_pic_veneer_ = value; } 2143 2144 // Whether we use THUMB-2 instructions. 2145 bool 2146 using_thumb2() const 2147 { 2148 Object_attribute* attr = 2149 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2150 int arch = attr->int_value(); 2151 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7; 2152 } 2153 2154 // Whether we use THUMB/THUMB-2 instructions only. 2155 bool 2156 using_thumb_only() const 2157 { 2158 Object_attribute* attr = 2159 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2160 2161 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M 2162 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M) 2163 return true; 2164 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7 2165 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M) 2166 return false; 2167 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 2168 return attr->int_value() == 'M'; 2169 } 2170 2171 // Whether we have an NOP instruction. If not, use mov r0, r0 instead. 2172 bool 2173 may_use_arm_nop() const 2174 { 2175 Object_attribute* attr = 2176 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2177 int arch = attr->int_value(); 2178 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2179 || arch == elfcpp::TAG_CPU_ARCH_V6K 2180 || arch == elfcpp::TAG_CPU_ARCH_V7 2181 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2182 } 2183 2184 // Whether we have THUMB-2 NOP.W instruction. 2185 bool 2186 may_use_thumb2_nop() const 2187 { 2188 Object_attribute* attr = 2189 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2190 int arch = attr->int_value(); 2191 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2192 || arch == elfcpp::TAG_CPU_ARCH_V7 2193 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2194 } 2195 2196 // Whether we have v4T interworking instructions available. 2197 bool 2198 may_use_v4t_interworking() const 2199 { 2200 Object_attribute* attr = 2201 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2202 int arch = attr->int_value(); 2203 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2204 && arch != elfcpp::TAG_CPU_ARCH_V4); 2205 } 2206 2207 // Whether we have v5T interworking instructions available. 2208 bool 2209 may_use_v5t_interworking() const 2210 { 2211 Object_attribute* attr = 2212 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2213 int arch = attr->int_value(); 2214 if (parameters->options().fix_arm1176()) 2215 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2216 || arch == elfcpp::TAG_CPU_ARCH_V7 2217 || arch == elfcpp::TAG_CPU_ARCH_V6_M 2218 || arch == elfcpp::TAG_CPU_ARCH_V6S_M 2219 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2220 else 2221 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2222 && arch != elfcpp::TAG_CPU_ARCH_V4 2223 && arch != elfcpp::TAG_CPU_ARCH_V4T); 2224 } 2225 2226 // Process the relocations to determine unreferenced sections for 2227 // garbage collection. 2228 void 2229 gc_process_relocs(Symbol_table* symtab, 2230 Layout* layout, 2231 Sized_relobj_file<32, big_endian>* object, 2232 unsigned int data_shndx, 2233 unsigned int sh_type, 2234 const unsigned char* prelocs, 2235 size_t reloc_count, 2236 Output_section* output_section, 2237 bool needs_special_offset_handling, 2238 size_t local_symbol_count, 2239 const unsigned char* plocal_symbols); 2240 2241 // Scan the relocations to look for symbol adjustments. 2242 void 2243 scan_relocs(Symbol_table* symtab, 2244 Layout* layout, 2245 Sized_relobj_file<32, big_endian>* object, 2246 unsigned int data_shndx, 2247 unsigned int sh_type, 2248 const unsigned char* prelocs, 2249 size_t reloc_count, 2250 Output_section* output_section, 2251 bool needs_special_offset_handling, 2252 size_t local_symbol_count, 2253 const unsigned char* plocal_symbols); 2254 2255 // Finalize the sections. 2256 void 2257 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); 2258 2259 // Return the value to use for a dynamic symbol which requires special 2260 // treatment. 2261 uint64_t 2262 do_dynsym_value(const Symbol*) const; 2263 2264 // Return the plt address for globals. Since we have irelative plt entries, 2265 // address calculation is not as straightforward as plt_address + plt_offset. 2266 uint64_t 2267 do_plt_address_for_global(const Symbol* gsym) const 2268 { return this->plt_section()->address_for_global(gsym); } 2269 2270 // Return the plt address for locals. Since we have irelative plt entries, 2271 // address calculation is not as straightforward as plt_address + plt_offset. 2272 uint64_t 2273 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const 2274 { return this->plt_section()->address_for_local(relobj, symndx); } 2275 2276 // Relocate a section. 2277 void 2278 relocate_section(const Relocate_info<32, big_endian>*, 2279 unsigned int sh_type, 2280 const unsigned char* prelocs, 2281 size_t reloc_count, 2282 Output_section* output_section, 2283 bool needs_special_offset_handling, 2284 unsigned char* view, 2285 Arm_address view_address, 2286 section_size_type view_size, 2287 const Reloc_symbol_changes*); 2288 2289 // Scan the relocs during a relocatable link. 2290 void 2291 scan_relocatable_relocs(Symbol_table* symtab, 2292 Layout* layout, 2293 Sized_relobj_file<32, big_endian>* object, 2294 unsigned int data_shndx, 2295 unsigned int sh_type, 2296 const unsigned char* prelocs, 2297 size_t reloc_count, 2298 Output_section* output_section, 2299 bool needs_special_offset_handling, 2300 size_t local_symbol_count, 2301 const unsigned char* plocal_symbols, 2302 Relocatable_relocs*); 2303 2304 // Emit relocations for a section. 2305 void 2306 relocate_relocs(const Relocate_info<32, big_endian>*, 2307 unsigned int sh_type, 2308 const unsigned char* prelocs, 2309 size_t reloc_count, 2310 Output_section* output_section, 2311 typename elfcpp::Elf_types<32>::Elf_Off 2312 offset_in_output_section, 2313 const Relocatable_relocs*, 2314 unsigned char* view, 2315 Arm_address view_address, 2316 section_size_type view_size, 2317 unsigned char* reloc_view, 2318 section_size_type reloc_view_size); 2319 2320 // Perform target-specific processing in a relocatable link. This is 2321 // only used if we use the relocation strategy RELOC_SPECIAL. 2322 void 2323 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo, 2324 unsigned int sh_type, 2325 const unsigned char* preloc_in, 2326 size_t relnum, 2327 Output_section* output_section, 2328 typename elfcpp::Elf_types<32>::Elf_Off 2329 offset_in_output_section, 2330 unsigned char* view, 2331 typename elfcpp::Elf_types<32>::Elf_Addr 2332 view_address, 2333 section_size_type view_size, 2334 unsigned char* preloc_out); 2335 2336 // Return whether SYM is defined by the ABI. 2337 bool 2338 do_is_defined_by_abi(const Symbol* sym) const 2339 { return strcmp(sym->name(), "__tls_get_addr") == 0; } 2340 2341 // Return whether there is a GOT section. 2342 bool 2343 has_got_section() const 2344 { return this->got_ != NULL; } 2345 2346 // Return the size of the GOT section. 2347 section_size_type 2348 got_size() const 2349 { 2350 gold_assert(this->got_ != NULL); 2351 return this->got_->data_size(); 2352 } 2353 2354 // Return the number of entries in the GOT. 2355 unsigned int 2356 got_entry_count() const 2357 { 2358 if (!this->has_got_section()) 2359 return 0; 2360 return this->got_size() / 4; 2361 } 2362 2363 // Return the number of entries in the PLT. 2364 unsigned int 2365 plt_entry_count() const; 2366 2367 // Return the offset of the first non-reserved PLT entry. 2368 unsigned int 2369 first_plt_entry_offset() const; 2370 2371 // Return the size of each PLT entry. 2372 unsigned int 2373 plt_entry_size() const; 2374 2375 // Get the section to use for IRELATIVE relocations, create it if necessary. 2376 Reloc_section* 2377 rel_irelative_section(Layout*); 2378 2379 // Map platform-specific reloc types 2380 static unsigned int 2381 get_real_reloc_type(unsigned int r_type); 2382 2383 // 2384 // Methods to support stub-generations. 2385 // 2386 2387 // Return the stub factory 2388 const Stub_factory& 2389 stub_factory() const 2390 { return this->stub_factory_; } 2391 2392 // Make a new Arm_input_section object. 2393 Arm_input_section<big_endian>* 2394 new_arm_input_section(Relobj*, unsigned int); 2395 2396 // Find the Arm_input_section object corresponding to the SHNDX-th input 2397 // section of RELOBJ. 2398 Arm_input_section<big_endian>* 2399 find_arm_input_section(Relobj* relobj, unsigned int shndx) const; 2400 2401 // Make a new Stub_table 2402 Stub_table<big_endian>* 2403 new_stub_table(Arm_input_section<big_endian>*); 2404 2405 // Scan a section for stub generation. 2406 void 2407 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int, 2408 const unsigned char*, size_t, Output_section*, 2409 bool, const unsigned char*, Arm_address, 2410 section_size_type); 2411 2412 // Relocate a stub. 2413 void 2414 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 2415 Output_section*, unsigned char*, Arm_address, 2416 section_size_type); 2417 2418 // Get the default ARM target. 2419 static Target_arm<big_endian>* 2420 default_target() 2421 { 2422 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM 2423 && parameters->target().is_big_endian() == big_endian); 2424 return static_cast<Target_arm<big_endian>*>( 2425 parameters->sized_target<32, big_endian>()); 2426 } 2427 2428 // Whether NAME belongs to a mapping symbol. 2429 static bool 2430 is_mapping_symbol_name(const char* name) 2431 { 2432 return (name 2433 && name[0] == '$' 2434 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd') 2435 && (name[2] == '\0' || name[2] == '.')); 2436 } 2437 2438 // Whether we work around the Cortex-A8 erratum. 2439 bool 2440 fix_cortex_a8() const 2441 { return this->fix_cortex_a8_; } 2442 2443 // Whether we merge exidx entries in debuginfo. 2444 bool 2445 merge_exidx_entries() const 2446 { return parameters->options().merge_exidx_entries(); } 2447 2448 // Whether we fix R_ARM_V4BX relocation. 2449 // 0 - do not fix 2450 // 1 - replace with MOV instruction (armv4 target) 2451 // 2 - make interworking veneer (>= armv4t targets only) 2452 General_options::Fix_v4bx 2453 fix_v4bx() const 2454 { return parameters->options().fix_v4bx(); } 2455 2456 // Scan a span of THUMB code section for Cortex-A8 erratum. 2457 void 2458 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int, 2459 section_size_type, section_size_type, 2460 const unsigned char*, Arm_address); 2461 2462 // Apply Cortex-A8 workaround to a branch. 2463 void 2464 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address, 2465 unsigned char*, Arm_address); 2466 2467 protected: 2468 // Make the PLT-generator object. 2469 Output_data_plt_arm<big_endian>* 2470 make_data_plt(Layout* layout, 2471 Arm_output_data_got<big_endian>* got, 2472 Output_data_space* got_plt, 2473 Output_data_space* got_irelative) 2474 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); } 2475 2476 // Make an ELF object. 2477 Object* 2478 do_make_elf_object(const std::string&, Input_file*, off_t, 2479 const elfcpp::Ehdr<32, big_endian>& ehdr); 2480 2481 Object* 2482 do_make_elf_object(const std::string&, Input_file*, off_t, 2483 const elfcpp::Ehdr<32, !big_endian>&) 2484 { gold_unreachable(); } 2485 2486 Object* 2487 do_make_elf_object(const std::string&, Input_file*, off_t, 2488 const elfcpp::Ehdr<64, false>&) 2489 { gold_unreachable(); } 2490 2491 Object* 2492 do_make_elf_object(const std::string&, Input_file*, off_t, 2493 const elfcpp::Ehdr<64, true>&) 2494 { gold_unreachable(); } 2495 2496 // Make an output section. 2497 Output_section* 2498 do_make_output_section(const char* name, elfcpp::Elf_Word type, 2499 elfcpp::Elf_Xword flags) 2500 { return new Arm_output_section<big_endian>(name, type, flags); } 2501 2502 void 2503 do_adjust_elf_header(unsigned char* view, int len); 2504 2505 // We only need to generate stubs, and hence perform relaxation if we are 2506 // not doing relocatable linking. 2507 bool 2508 do_may_relax() const 2509 { return !parameters->options().relocatable(); } 2510 2511 bool 2512 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*); 2513 2514 // Determine whether an object attribute tag takes an integer, a 2515 // string or both. 2516 int 2517 do_attribute_arg_type(int tag) const; 2518 2519 // Reorder tags during output. 2520 int 2521 do_attributes_order(int num) const; 2522 2523 // This is called when the target is selected as the default. 2524 void 2525 do_select_as_default_target() 2526 { 2527 // No locking is required since there should only be one default target. 2528 // We cannot have both the big-endian and little-endian ARM targets 2529 // as the default. 2530 gold_assert(arm_reloc_property_table == NULL); 2531 arm_reloc_property_table = new Arm_reloc_property_table(); 2532 } 2533 2534 // Virtual function which is set to return true by a target if 2535 // it can use relocation types to determine if a function's 2536 // pointer is taken. 2537 virtual bool 2538 do_can_check_for_function_pointers() const 2539 { return true; } 2540 2541 // Whether a section called SECTION_NAME may have function pointers to 2542 // sections not eligible for safe ICF folding. 2543 virtual bool 2544 do_section_may_have_icf_unsafe_pointers(const char* section_name) const 2545 { 2546 return (!is_prefix_of(".ARM.exidx", section_name) 2547 && !is_prefix_of(".ARM.extab", section_name) 2548 && Target::do_section_may_have_icf_unsafe_pointers(section_name)); 2549 } 2550 2551 virtual void 2552 do_define_standard_symbols(Symbol_table*, Layout*); 2553 2554 virtual Output_data_plt_arm<big_endian>* 2555 do_make_data_plt(Layout* layout, 2556 Arm_output_data_got<big_endian>* got, 2557 Output_data_space* got_plt, 2558 Output_data_space* got_irelative) 2559 { 2560 gold_assert(got_plt != NULL && got_irelative != NULL); 2561 return new Output_data_plt_arm_standard<big_endian>( 2562 layout, got, got_plt, got_irelative); 2563 } 2564 2565 private: 2566 // The class which scans relocations. 2567 class Scan 2568 { 2569 public: 2570 Scan() 2571 : issued_non_pic_error_(false) 2572 { } 2573 2574 static inline int 2575 get_reference_flags(unsigned int r_type); 2576 2577 inline void 2578 local(Symbol_table* symtab, Layout* layout, Target_arm* target, 2579 Sized_relobj_file<32, big_endian>* object, 2580 unsigned int data_shndx, 2581 Output_section* output_section, 2582 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2583 const elfcpp::Sym<32, big_endian>& lsym, 2584 bool is_discarded); 2585 2586 inline void 2587 global(Symbol_table* symtab, Layout* layout, Target_arm* target, 2588 Sized_relobj_file<32, big_endian>* object, 2589 unsigned int data_shndx, 2590 Output_section* output_section, 2591 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2592 Symbol* gsym); 2593 2594 inline bool 2595 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2596 Sized_relobj_file<32, big_endian>* , 2597 unsigned int , 2598 Output_section* , 2599 const elfcpp::Rel<32, big_endian>& , 2600 unsigned int , 2601 const elfcpp::Sym<32, big_endian>&); 2602 2603 inline bool 2604 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2605 Sized_relobj_file<32, big_endian>* , 2606 unsigned int , 2607 Output_section* , 2608 const elfcpp::Rel<32, big_endian>& , 2609 unsigned int , Symbol*); 2610 2611 private: 2612 static void 2613 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*, 2614 unsigned int r_type); 2615 2616 static void 2617 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*, 2618 unsigned int r_type, Symbol*); 2619 2620 void 2621 check_non_pic(Relobj*, unsigned int r_type); 2622 2623 // Almost identical to Symbol::needs_plt_entry except that it also 2624 // handles STT_ARM_TFUNC. 2625 static bool 2626 symbol_needs_plt_entry(const Symbol* sym) 2627 { 2628 // An undefined symbol from an executable does not need a PLT entry. 2629 if (sym->is_undefined() && !parameters->options().shared()) 2630 return false; 2631 2632 if (sym->type() == elfcpp::STT_GNU_IFUNC) 2633 return true; 2634 2635 return (!parameters->doing_static_link() 2636 && (sym->type() == elfcpp::STT_FUNC 2637 || sym->type() == elfcpp::STT_ARM_TFUNC) 2638 && (sym->is_from_dynobj() 2639 || sym->is_undefined() 2640 || sym->is_preemptible())); 2641 } 2642 2643 inline bool 2644 possible_function_pointer_reloc(unsigned int r_type); 2645 2646 // Whether a plt entry is needed for ifunc. 2647 bool 2648 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*, 2649 unsigned int r_type); 2650 2651 // Whether we have issued an error about a non-PIC compilation. 2652 bool issued_non_pic_error_; 2653 }; 2654 2655 // The class which implements relocation. 2656 class Relocate 2657 { 2658 public: 2659 Relocate() 2660 { } 2661 2662 ~Relocate() 2663 { } 2664 2665 // Return whether the static relocation needs to be applied. 2666 inline bool 2667 should_apply_static_reloc(const Sized_symbol<32>* gsym, 2668 unsigned int r_type, 2669 bool is_32bit, 2670 Output_section* output_section); 2671 2672 // Do a relocation. Return false if the caller should not issue 2673 // any warnings about this relocation. 2674 inline bool 2675 relocate(const Relocate_info<32, big_endian>*, Target_arm*, 2676 Output_section*, size_t relnum, 2677 const elfcpp::Rel<32, big_endian>&, 2678 unsigned int r_type, const Sized_symbol<32>*, 2679 const Symbol_value<32>*, 2680 unsigned char*, Arm_address, 2681 section_size_type); 2682 2683 // Return whether we want to pass flag NON_PIC_REF for this 2684 // reloc. This means the relocation type accesses a symbol not via 2685 // GOT or PLT. 2686 static inline bool 2687 reloc_is_non_pic(unsigned int r_type) 2688 { 2689 switch (r_type) 2690 { 2691 // These relocation types reference GOT or PLT entries explicitly. 2692 case elfcpp::R_ARM_GOT_BREL: 2693 case elfcpp::R_ARM_GOT_ABS: 2694 case elfcpp::R_ARM_GOT_PREL: 2695 case elfcpp::R_ARM_GOT_BREL12: 2696 case elfcpp::R_ARM_PLT32_ABS: 2697 case elfcpp::R_ARM_TLS_GD32: 2698 case elfcpp::R_ARM_TLS_LDM32: 2699 case elfcpp::R_ARM_TLS_IE32: 2700 case elfcpp::R_ARM_TLS_IE12GP: 2701 2702 // These relocate types may use PLT entries. 2703 case elfcpp::R_ARM_CALL: 2704 case elfcpp::R_ARM_THM_CALL: 2705 case elfcpp::R_ARM_JUMP24: 2706 case elfcpp::R_ARM_THM_JUMP24: 2707 case elfcpp::R_ARM_THM_JUMP19: 2708 case elfcpp::R_ARM_PLT32: 2709 case elfcpp::R_ARM_THM_XPC22: 2710 case elfcpp::R_ARM_PREL31: 2711 case elfcpp::R_ARM_SBREL31: 2712 return false; 2713 2714 default: 2715 return true; 2716 } 2717 } 2718 2719 private: 2720 // Do a TLS relocation. 2721 inline typename Arm_relocate_functions<big_endian>::Status 2722 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*, 2723 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int, 2724 const Sized_symbol<32>*, const Symbol_value<32>*, 2725 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr, 2726 section_size_type); 2727 2728 }; 2729 2730 // A class which returns the size required for a relocation type, 2731 // used while scanning relocs during a relocatable link. 2732 class Relocatable_size_for_reloc 2733 { 2734 public: 2735 unsigned int 2736 get_size_for_reloc(unsigned int, Relobj*); 2737 }; 2738 2739 // Adjust TLS relocation type based on the options and whether this 2740 // is a local symbol. 2741 static tls::Tls_optimization 2742 optimize_tls_reloc(bool is_final, int r_type); 2743 2744 // Get the GOT section, creating it if necessary. 2745 Arm_output_data_got<big_endian>* 2746 got_section(Symbol_table*, Layout*); 2747 2748 // Get the GOT PLT section. 2749 Output_data_space* 2750 got_plt_section() const 2751 { 2752 gold_assert(this->got_plt_ != NULL); 2753 return this->got_plt_; 2754 } 2755 2756 // Create the PLT section. 2757 void 2758 make_plt_section(Symbol_table* symtab, Layout* layout); 2759 2760 // Create a PLT entry for a global symbol. 2761 void 2762 make_plt_entry(Symbol_table*, Layout*, Symbol*); 2763 2764 // Create a PLT entry for a local STT_GNU_IFUNC symbol. 2765 void 2766 make_local_ifunc_plt_entry(Symbol_table*, Layout*, 2767 Sized_relobj_file<32, big_endian>* relobj, 2768 unsigned int local_sym_index); 2769 2770 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 2771 void 2772 define_tls_base_symbol(Symbol_table*, Layout*); 2773 2774 // Create a GOT entry for the TLS module index. 2775 unsigned int 2776 got_mod_index_entry(Symbol_table* symtab, Layout* layout, 2777 Sized_relobj_file<32, big_endian>* object); 2778 2779 // Get the PLT section. 2780 const Output_data_plt_arm<big_endian>* 2781 plt_section() const 2782 { 2783 gold_assert(this->plt_ != NULL); 2784 return this->plt_; 2785 } 2786 2787 // Get the dynamic reloc section, creating it if necessary. 2788 Reloc_section* 2789 rel_dyn_section(Layout*); 2790 2791 // Get the section to use for TLS_DESC relocations. 2792 Reloc_section* 2793 rel_tls_desc_section(Layout*) const; 2794 2795 // Return true if the symbol may need a COPY relocation. 2796 // References from an executable object to non-function symbols 2797 // defined in a dynamic object may need a COPY relocation. 2798 bool 2799 may_need_copy_reloc(Symbol* gsym) 2800 { 2801 return (gsym->type() != elfcpp::STT_ARM_TFUNC 2802 && gsym->may_need_copy_reloc()); 2803 } 2804 2805 // Add a potential copy relocation. 2806 void 2807 copy_reloc(Symbol_table* symtab, Layout* layout, 2808 Sized_relobj_file<32, big_endian>* object, 2809 unsigned int shndx, Output_section* output_section, 2810 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) 2811 { 2812 this->copy_relocs_.copy_reloc(symtab, layout, 2813 symtab->get_sized_symbol<32>(sym), 2814 object, shndx, output_section, reloc, 2815 this->rel_dyn_section(layout)); 2816 } 2817 2818 // Whether two EABI versions are compatible. 2819 static bool 2820 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2); 2821 2822 // Merge processor-specific flags from input object and those in the ELF 2823 // header of the output. 2824 void 2825 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word); 2826 2827 // Get the secondary compatible architecture. 2828 static int 2829 get_secondary_compatible_arch(const Attributes_section_data*); 2830 2831 // Set the secondary compatible architecture. 2832 static void 2833 set_secondary_compatible_arch(Attributes_section_data*, int); 2834 2835 static int 2836 tag_cpu_arch_combine(const char*, int, int*, int, int); 2837 2838 // Helper to print AEABI enum tag value. 2839 static std::string 2840 aeabi_enum_name(unsigned int); 2841 2842 // Return string value for TAG_CPU_name. 2843 static std::string 2844 tag_cpu_name_value(unsigned int); 2845 2846 // Query attributes object to see if integer divide instructions may be 2847 // present in an object. 2848 static bool 2849 attributes_accept_div(int arch, int profile, 2850 const Object_attribute* div_attr); 2851 2852 // Query attributes object to see if integer divide instructions are 2853 // forbidden to be in the object. This is not the inverse of 2854 // attributes_accept_div. 2855 static bool 2856 attributes_forbid_div(const Object_attribute* div_attr); 2857 2858 // Merge object attributes from input object and those in the output. 2859 void 2860 merge_object_attributes(const char*, const Attributes_section_data*); 2861 2862 // Helper to get an AEABI object attribute 2863 Object_attribute* 2864 get_aeabi_object_attribute(int tag) const 2865 { 2866 Attributes_section_data* pasd = this->attributes_section_data_; 2867 gold_assert(pasd != NULL); 2868 Object_attribute* attr = 2869 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag); 2870 gold_assert(attr != NULL); 2871 return attr; 2872 } 2873 2874 // 2875 // Methods to support stub-generations. 2876 // 2877 2878 // Group input sections for stub generation. 2879 void 2880 group_sections(Layout*, section_size_type, bool, const Task*); 2881 2882 // Scan a relocation for stub generation. 2883 void 2884 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int, 2885 const Sized_symbol<32>*, unsigned int, 2886 const Symbol_value<32>*, 2887 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address); 2888 2889 // Scan a relocation section for stub. 2890 template<int sh_type> 2891 void 2892 scan_reloc_section_for_stubs( 2893 const Relocate_info<32, big_endian>* relinfo, 2894 const unsigned char* prelocs, 2895 size_t reloc_count, 2896 Output_section* output_section, 2897 bool needs_special_offset_handling, 2898 const unsigned char* view, 2899 elfcpp::Elf_types<32>::Elf_Addr view_address, 2900 section_size_type); 2901 2902 // Fix .ARM.exidx section coverage. 2903 void 2904 fix_exidx_coverage(Layout*, const Input_objects*, 2905 Arm_output_section<big_endian>*, Symbol_table*, 2906 const Task*); 2907 2908 // Functors for STL set. 2909 struct output_section_address_less_than 2910 { 2911 bool 2912 operator()(const Output_section* s1, const Output_section* s2) const 2913 { return s1->address() < s2->address(); } 2914 }; 2915 2916 // Information about this specific target which we pass to the 2917 // general Target structure. 2918 static const Target::Target_info arm_info; 2919 2920 // The types of GOT entries needed for this platform. 2921 // These values are exposed to the ABI in an incremental link. 2922 // Do not renumber existing values without changing the version 2923 // number of the .gnu_incremental_inputs section. 2924 enum Got_type 2925 { 2926 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol 2927 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset 2928 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset 2929 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair 2930 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair 2931 }; 2932 2933 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list; 2934 2935 // Map input section to Arm_input_section. 2936 typedef Unordered_map<Section_id, 2937 Arm_input_section<big_endian>*, 2938 Section_id_hash> 2939 Arm_input_section_map; 2940 2941 // Map output addresses to relocs for Cortex-A8 erratum. 2942 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*> 2943 Cortex_a8_relocs_info; 2944 2945 // The GOT section. 2946 Arm_output_data_got<big_endian>* got_; 2947 // The PLT section. 2948 Output_data_plt_arm<big_endian>* plt_; 2949 // The GOT PLT section. 2950 Output_data_space* got_plt_; 2951 // The GOT section for IRELATIVE relocations. 2952 Output_data_space* got_irelative_; 2953 // The dynamic reloc section. 2954 Reloc_section* rel_dyn_; 2955 // The section to use for IRELATIVE relocs. 2956 Reloc_section* rel_irelative_; 2957 // Relocs saved to avoid a COPY reloc. 2958 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_; 2959 // Offset of the GOT entry for the TLS module index. 2960 unsigned int got_mod_index_offset_; 2961 // True if the _TLS_MODULE_BASE_ symbol has been defined. 2962 bool tls_base_symbol_defined_; 2963 // Vector of Stub_tables created. 2964 Stub_table_list stub_tables_; 2965 // Stub factory. 2966 const Stub_factory &stub_factory_; 2967 // Whether we force PIC branch veneers. 2968 bool should_force_pic_veneer_; 2969 // Map for locating Arm_input_sections. 2970 Arm_input_section_map arm_input_section_map_; 2971 // Attributes section data in output. 2972 Attributes_section_data* attributes_section_data_; 2973 // Whether we want to fix code for Cortex-A8 erratum. 2974 bool fix_cortex_a8_; 2975 // Map addresses to relocs for Cortex-A8 erratum. 2976 Cortex_a8_relocs_info cortex_a8_relocs_info_; 2977 }; 2978 2979 template<bool big_endian> 2980 const Target::Target_info Target_arm<big_endian>::arm_info = 2981 { 2982 32, // size 2983 big_endian, // is_big_endian 2984 elfcpp::EM_ARM, // machine_code 2985 false, // has_make_symbol 2986 false, // has_resolve 2987 false, // has_code_fill 2988 true, // is_default_stack_executable 2989 false, // can_icf_inline_merge_sections 2990 '\0', // wrap_char 2991 "/usr/lib/libc.so.1", // dynamic_linker 2992 0x8000, // default_text_segment_address 2993 0x1000, // abi_pagesize (overridable by -z max-page-size) 2994 0x1000, // common_pagesize (overridable by -z common-page-size) 2995 false, // isolate_execinstr 2996 0, // rosegment_gap 2997 elfcpp::SHN_UNDEF, // small_common_shndx 2998 elfcpp::SHN_UNDEF, // large_common_shndx 2999 0, // small_common_section_flags 3000 0, // large_common_section_flags 3001 ".ARM.attributes", // attributes_section 3002 "aeabi", // attributes_vendor 3003 "_start" // entry_symbol_name 3004 }; 3005 3006 // Arm relocate functions class 3007 // 3008 3009 template<bool big_endian> 3010 class Arm_relocate_functions : public Relocate_functions<32, big_endian> 3011 { 3012 public: 3013 typedef enum 3014 { 3015 STATUS_OKAY, // No error during relocation. 3016 STATUS_OVERFLOW, // Relocation overflow. 3017 STATUS_BAD_RELOC // Relocation cannot be applied. 3018 } Status; 3019 3020 private: 3021 typedef Relocate_functions<32, big_endian> Base; 3022 typedef Arm_relocate_functions<big_endian> This; 3023 3024 // Encoding of imm16 argument for movt and movw ARM instructions 3025 // from ARM ARM: 3026 // 3027 // imm16 := imm4 | imm12 3028 // 3029 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3030 // +-------+---------------+-------+-------+-----------------------+ 3031 // | | |imm4 | |imm12 | 3032 // +-------+---------------+-------+-------+-----------------------+ 3033 3034 // Extract the relocation addend from VAL based on the ARM 3035 // instruction encoding described above. 3036 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3037 extract_arm_movw_movt_addend( 3038 typename elfcpp::Swap<32, big_endian>::Valtype val) 3039 { 3040 // According to the Elf ABI for ARM Architecture the immediate 3041 // field is sign-extended to form the addend. 3042 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff)); 3043 } 3044 3045 // Insert X into VAL based on the ARM instruction encoding described 3046 // above. 3047 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3048 insert_val_arm_movw_movt( 3049 typename elfcpp::Swap<32, big_endian>::Valtype val, 3050 typename elfcpp::Swap<32, big_endian>::Valtype x) 3051 { 3052 val &= 0xfff0f000; 3053 val |= x & 0x0fff; 3054 val |= (x & 0xf000) << 4; 3055 return val; 3056 } 3057 3058 // Encoding of imm16 argument for movt and movw Thumb2 instructions 3059 // from ARM ARM: 3060 // 3061 // imm16 := imm4 | i | imm3 | imm8 3062 // 3063 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3064 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3065 // | |i| |imm4 || |imm3 | |imm8 | 3066 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3067 3068 // Extract the relocation addend from VAL based on the Thumb2 3069 // instruction encoding described above. 3070 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3071 extract_thumb_movw_movt_addend( 3072 typename elfcpp::Swap<32, big_endian>::Valtype val) 3073 { 3074 // According to the Elf ABI for ARM Architecture the immediate 3075 // field is sign-extended to form the addend. 3076 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) 3077 | ((val >> 15) & 0x0800) 3078 | ((val >> 4) & 0x0700) 3079 | (val & 0x00ff)); 3080 } 3081 3082 // Insert X into VAL based on the Thumb2 instruction encoding 3083 // described above. 3084 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3085 insert_val_thumb_movw_movt( 3086 typename elfcpp::Swap<32, big_endian>::Valtype val, 3087 typename elfcpp::Swap<32, big_endian>::Valtype x) 3088 { 3089 val &= 0xfbf08f00; 3090 val |= (x & 0xf000) << 4; 3091 val |= (x & 0x0800) << 15; 3092 val |= (x & 0x0700) << 4; 3093 val |= (x & 0x00ff); 3094 return val; 3095 } 3096 3097 // Calculate the smallest constant Kn for the specified residual. 3098 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3099 static uint32_t 3100 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual) 3101 { 3102 int32_t msb; 3103 3104 if (residual == 0) 3105 return 0; 3106 // Determine the most significant bit in the residual and 3107 // align the resulting value to a 2-bit boundary. 3108 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2) 3109 ; 3110 // The desired shift is now (msb - 6), or zero, whichever 3111 // is the greater. 3112 return (((msb - 6) < 0) ? 0 : (msb - 6)); 3113 } 3114 3115 // Calculate the final residual for the specified group index. 3116 // If the passed group index is less than zero, the method will return 3117 // the value of the specified residual without any change. 3118 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3119 static typename elfcpp::Swap<32, big_endian>::Valtype 3120 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3121 const int group) 3122 { 3123 for (int n = 0; n <= group; n++) 3124 { 3125 // Calculate which part of the value to mask. 3126 uint32_t shift = calc_grp_kn(residual); 3127 // Calculate the residual for the next time around. 3128 residual &= ~(residual & (0xff << shift)); 3129 } 3130 3131 return residual; 3132 } 3133 3134 // Calculate the value of Gn for the specified group index. 3135 // We return it in the form of an encoded constant-and-rotation. 3136 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3137 static typename elfcpp::Swap<32, big_endian>::Valtype 3138 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3139 const int group) 3140 { 3141 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0; 3142 uint32_t shift = 0; 3143 3144 for (int n = 0; n <= group; n++) 3145 { 3146 // Calculate which part of the value to mask. 3147 shift = calc_grp_kn(residual); 3148 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form. 3149 gn = residual & (0xff << shift); 3150 // Calculate the residual for the next time around. 3151 residual &= ~gn; 3152 } 3153 // Return Gn in the form of an encoded constant-and-rotation. 3154 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8)); 3155 } 3156 3157 public: 3158 // Handle ARM long branches. 3159 static typename This::Status 3160 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3161 unsigned char*, const Sized_symbol<32>*, 3162 const Arm_relobj<big_endian>*, unsigned int, 3163 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3164 3165 // Handle THUMB long branches. 3166 static typename This::Status 3167 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3168 unsigned char*, const Sized_symbol<32>*, 3169 const Arm_relobj<big_endian>*, unsigned int, 3170 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3171 3172 3173 // Return the branch offset of a 32-bit THUMB branch. 3174 static inline int32_t 3175 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3176 { 3177 // We use the Thumb-2 encoding (backwards compatible with Thumb-1) 3178 // involving the J1 and J2 bits. 3179 uint32_t s = (upper_insn & (1U << 10)) >> 10; 3180 uint32_t upper = upper_insn & 0x3ffU; 3181 uint32_t lower = lower_insn & 0x7ffU; 3182 uint32_t j1 = (lower_insn & (1U << 13)) >> 13; 3183 uint32_t j2 = (lower_insn & (1U << 11)) >> 11; 3184 uint32_t i1 = j1 ^ s ? 0 : 1; 3185 uint32_t i2 = j2 ^ s ? 0 : 1; 3186 3187 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22) 3188 | (upper << 12) | (lower << 1)); 3189 } 3190 3191 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction. 3192 // UPPER_INSN is the original upper instruction of the branch. Caller is 3193 // responsible for overflow checking and BLX offset adjustment. 3194 static inline uint16_t 3195 thumb32_branch_upper(uint16_t upper_insn, int32_t offset) 3196 { 3197 uint32_t s = offset < 0 ? 1 : 0; 3198 uint32_t bits = static_cast<uint32_t>(offset); 3199 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10); 3200 } 3201 3202 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction. 3203 // LOWER_INSN is the original lower instruction of the branch. Caller is 3204 // responsible for overflow checking and BLX offset adjustment. 3205 static inline uint16_t 3206 thumb32_branch_lower(uint16_t lower_insn, int32_t offset) 3207 { 3208 uint32_t s = offset < 0 ? 1 : 0; 3209 uint32_t bits = static_cast<uint32_t>(offset); 3210 return ((lower_insn & ~0x2fffU) 3211 | ((((bits >> 23) & 1) ^ !s) << 13) 3212 | ((((bits >> 22) & 1) ^ !s) << 11) 3213 | ((bits >> 1) & 0x7ffU)); 3214 } 3215 3216 // Return the branch offset of a 32-bit THUMB conditional branch. 3217 static inline int32_t 3218 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3219 { 3220 uint32_t s = (upper_insn & 0x0400U) >> 10; 3221 uint32_t j1 = (lower_insn & 0x2000U) >> 13; 3222 uint32_t j2 = (lower_insn & 0x0800U) >> 11; 3223 uint32_t lower = (lower_insn & 0x07ffU); 3224 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU); 3225 3226 return Bits<21>::sign_extend32((upper << 12) | (lower << 1)); 3227 } 3228 3229 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper 3230 // instruction. UPPER_INSN is the original upper instruction of the branch. 3231 // Caller is responsible for overflow checking. 3232 static inline uint16_t 3233 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset) 3234 { 3235 uint32_t s = offset < 0 ? 1 : 0; 3236 uint32_t bits = static_cast<uint32_t>(offset); 3237 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12); 3238 } 3239 3240 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower 3241 // instruction. LOWER_INSN is the original lower instruction of the branch. 3242 // The caller is responsible for overflow checking. 3243 static inline uint16_t 3244 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset) 3245 { 3246 uint32_t bits = static_cast<uint32_t>(offset); 3247 uint32_t j2 = (bits & 0x00080000U) >> 19; 3248 uint32_t j1 = (bits & 0x00040000U) >> 18; 3249 uint32_t lo = (bits & 0x00000ffeU) >> 1; 3250 3251 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo; 3252 } 3253 3254 // R_ARM_ABS8: S + A 3255 static inline typename This::Status 3256 abs8(unsigned char* view, 3257 const Sized_relobj_file<32, big_endian>* object, 3258 const Symbol_value<32>* psymval) 3259 { 3260 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; 3261 Valtype* wv = reinterpret_cast<Valtype*>(view); 3262 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); 3263 int32_t addend = Bits<8>::sign_extend32(val); 3264 Arm_address x = psymval->value(object, addend); 3265 val = Bits<32>::bit_select32(val, x, 0xffU); 3266 elfcpp::Swap<8, big_endian>::writeval(wv, val); 3267 3268 // R_ARM_ABS8 permits signed or unsigned results. 3269 return (Bits<8>::has_signed_unsigned_overflow32(x) 3270 ? This::STATUS_OVERFLOW 3271 : This::STATUS_OKAY); 3272 } 3273 3274 // R_ARM_THM_ABS5: S + A 3275 static inline typename This::Status 3276 thm_abs5(unsigned char* view, 3277 const Sized_relobj_file<32, big_endian>* object, 3278 const Symbol_value<32>* psymval) 3279 { 3280 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3281 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3282 Valtype* wv = reinterpret_cast<Valtype*>(view); 3283 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3284 Reltype addend = (val & 0x7e0U) >> 6; 3285 Reltype x = psymval->value(object, addend); 3286 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U); 3287 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3288 return (Bits<5>::has_overflow32(x) 3289 ? This::STATUS_OVERFLOW 3290 : This::STATUS_OKAY); 3291 } 3292 3293 // R_ARM_ABS12: S + A 3294 static inline typename This::Status 3295 abs12(unsigned char* view, 3296 const Sized_relobj_file<32, big_endian>* object, 3297 const Symbol_value<32>* psymval) 3298 { 3299 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3300 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3301 Valtype* wv = reinterpret_cast<Valtype*>(view); 3302 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3303 Reltype addend = val & 0x0fffU; 3304 Reltype x = psymval->value(object, addend); 3305 val = Bits<32>::bit_select32(val, x, 0x0fffU); 3306 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3307 return (Bits<12>::has_overflow32(x) 3308 ? This::STATUS_OVERFLOW 3309 : This::STATUS_OKAY); 3310 } 3311 3312 // R_ARM_ABS16: S + A 3313 static inline typename This::Status 3314 abs16(unsigned char* view, 3315 const Sized_relobj_file<32, big_endian>* object, 3316 const Symbol_value<32>* psymval) 3317 { 3318 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype; 3319 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view); 3320 int32_t addend = Bits<16>::sign_extend32(val); 3321 Arm_address x = psymval->value(object, addend); 3322 val = Bits<32>::bit_select32(val, x, 0xffffU); 3323 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val); 3324 3325 // R_ARM_ABS16 permits signed or unsigned results. 3326 return (Bits<16>::has_signed_unsigned_overflow32(x) 3327 ? This::STATUS_OVERFLOW 3328 : This::STATUS_OKAY); 3329 } 3330 3331 // R_ARM_ABS32: (S + A) | T 3332 static inline typename This::Status 3333 abs32(unsigned char* view, 3334 const Sized_relobj_file<32, big_endian>* object, 3335 const Symbol_value<32>* psymval, 3336 Arm_address thumb_bit) 3337 { 3338 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3339 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3340 Valtype x = psymval->value(object, addend) | thumb_bit; 3341 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3342 return This::STATUS_OKAY; 3343 } 3344 3345 // R_ARM_REL32: (S + A) | T - P 3346 static inline typename This::Status 3347 rel32(unsigned char* view, 3348 const Sized_relobj_file<32, big_endian>* object, 3349 const Symbol_value<32>* psymval, 3350 Arm_address address, 3351 Arm_address thumb_bit) 3352 { 3353 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3354 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3355 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3356 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3357 return This::STATUS_OKAY; 3358 } 3359 3360 // R_ARM_THM_JUMP24: (S + A) | T - P 3361 static typename This::Status 3362 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object, 3363 const Symbol_value<32>* psymval, Arm_address address, 3364 Arm_address thumb_bit); 3365 3366 // R_ARM_THM_JUMP6: S + A P 3367 static inline typename This::Status 3368 thm_jump6(unsigned char* view, 3369 const Sized_relobj_file<32, big_endian>* object, 3370 const Symbol_value<32>* psymval, 3371 Arm_address address) 3372 { 3373 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3374 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3375 Valtype* wv = reinterpret_cast<Valtype*>(view); 3376 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3377 // bit[9]:bit[7:3]:0 (mask: 0x02f8) 3378 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2)); 3379 Reltype x = (psymval->value(object, addend) - address); 3380 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2); 3381 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3382 // CZB does only forward jumps. 3383 return ((x > 0x007e) 3384 ? This::STATUS_OVERFLOW 3385 : This::STATUS_OKAY); 3386 } 3387 3388 // R_ARM_THM_JUMP8: S + A P 3389 static inline typename This::Status 3390 thm_jump8(unsigned char* view, 3391 const Sized_relobj_file<32, big_endian>* object, 3392 const Symbol_value<32>* psymval, 3393 Arm_address address) 3394 { 3395 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3396 Valtype* wv = reinterpret_cast<Valtype*>(view); 3397 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3398 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1); 3399 int32_t x = (psymval->value(object, addend) - address); 3400 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00) 3401 | ((x & 0x01fe) >> 1))); 3402 // We do a 9-bit overflow check because x is right-shifted by 1 bit. 3403 return (Bits<9>::has_overflow32(x) 3404 ? This::STATUS_OVERFLOW 3405 : This::STATUS_OKAY); 3406 } 3407 3408 // R_ARM_THM_JUMP11: S + A P 3409 static inline typename This::Status 3410 thm_jump11(unsigned char* view, 3411 const Sized_relobj_file<32, big_endian>* object, 3412 const Symbol_value<32>* psymval, 3413 Arm_address address) 3414 { 3415 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3416 Valtype* wv = reinterpret_cast<Valtype*>(view); 3417 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3418 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1); 3419 int32_t x = (psymval->value(object, addend) - address); 3420 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800) 3421 | ((x & 0x0ffe) >> 1))); 3422 // We do a 12-bit overflow check because x is right-shifted by 1 bit. 3423 return (Bits<12>::has_overflow32(x) 3424 ? This::STATUS_OVERFLOW 3425 : This::STATUS_OKAY); 3426 } 3427 3428 // R_ARM_BASE_PREL: B(S) + A - P 3429 static inline typename This::Status 3430 base_prel(unsigned char* view, 3431 Arm_address origin, 3432 Arm_address address) 3433 { 3434 Base::rel32(view, origin - address); 3435 return STATUS_OKAY; 3436 } 3437 3438 // R_ARM_BASE_ABS: B(S) + A 3439 static inline typename This::Status 3440 base_abs(unsigned char* view, 3441 Arm_address origin) 3442 { 3443 Base::rel32(view, origin); 3444 return STATUS_OKAY; 3445 } 3446 3447 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG 3448 static inline typename This::Status 3449 got_brel(unsigned char* view, 3450 typename elfcpp::Swap<32, big_endian>::Valtype got_offset) 3451 { 3452 Base::rel32(view, got_offset); 3453 return This::STATUS_OKAY; 3454 } 3455 3456 // R_ARM_GOT_PREL: GOT(S) + A - P 3457 static inline typename This::Status 3458 got_prel(unsigned char* view, 3459 Arm_address got_entry, 3460 Arm_address address) 3461 { 3462 Base::rel32(view, got_entry - address); 3463 return This::STATUS_OKAY; 3464 } 3465 3466 // R_ARM_PREL: (S + A) | T - P 3467 static inline typename This::Status 3468 prel31(unsigned char* view, 3469 const Sized_relobj_file<32, big_endian>* object, 3470 const Symbol_value<32>* psymval, 3471 Arm_address address, 3472 Arm_address thumb_bit) 3473 { 3474 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3475 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3476 Valtype addend = Bits<31>::sign_extend32(val); 3477 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3478 val = Bits<32>::bit_select32(val, x, 0x7fffffffU); 3479 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val); 3480 return (Bits<31>::has_overflow32(x) 3481 ? This::STATUS_OVERFLOW 3482 : This::STATUS_OKAY); 3483 } 3484 3485 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is ) 3486 // R_ARM_MOVW_PREL_NC: (S + A) | T - P 3487 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3488 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S) 3489 static inline typename This::Status 3490 movw(unsigned char* view, 3491 const Sized_relobj_file<32, big_endian>* object, 3492 const Symbol_value<32>* psymval, 3493 Arm_address relative_address_base, 3494 Arm_address thumb_bit, 3495 bool check_overflow) 3496 { 3497 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3498 Valtype* wv = reinterpret_cast<Valtype*>(view); 3499 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3500 Valtype addend = This::extract_arm_movw_movt_addend(val); 3501 Valtype x = ((psymval->value(object, addend) | thumb_bit) 3502 - relative_address_base); 3503 val = This::insert_val_arm_movw_movt(val, x); 3504 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3505 return ((check_overflow && Bits<16>::has_overflow32(x)) 3506 ? This::STATUS_OVERFLOW 3507 : This::STATUS_OKAY); 3508 } 3509 3510 // R_ARM_MOVT_ABS: S + A (relative address base is 0) 3511 // R_ARM_MOVT_PREL: S + A - P 3512 // R_ARM_MOVT_BREL: S + A - B(S) 3513 static inline typename This::Status 3514 movt(unsigned char* view, 3515 const Sized_relobj_file<32, big_endian>* object, 3516 const Symbol_value<32>* psymval, 3517 Arm_address relative_address_base) 3518 { 3519 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3520 Valtype* wv = reinterpret_cast<Valtype*>(view); 3521 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3522 Valtype addend = This::extract_arm_movw_movt_addend(val); 3523 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3524 val = This::insert_val_arm_movw_movt(val, x); 3525 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3526 // FIXME: IHI0044D says that we should check for overflow. 3527 return This::STATUS_OKAY; 3528 } 3529 3530 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0) 3531 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P 3532 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3533 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S) 3534 static inline typename This::Status 3535 thm_movw(unsigned char* view, 3536 const Sized_relobj_file<32, big_endian>* object, 3537 const Symbol_value<32>* psymval, 3538 Arm_address relative_address_base, 3539 Arm_address thumb_bit, 3540 bool check_overflow) 3541 { 3542 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3543 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3544 Valtype* wv = reinterpret_cast<Valtype*>(view); 3545 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3546 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3547 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3548 Reltype x = 3549 (psymval->value(object, addend) | thumb_bit) - relative_address_base; 3550 val = This::insert_val_thumb_movw_movt(val, x); 3551 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3552 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3553 return ((check_overflow && Bits<16>::has_overflow32(x)) 3554 ? This::STATUS_OVERFLOW 3555 : This::STATUS_OKAY); 3556 } 3557 3558 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0) 3559 // R_ARM_THM_MOVT_PREL: S + A - P 3560 // R_ARM_THM_MOVT_BREL: S + A - B(S) 3561 static inline typename This::Status 3562 thm_movt(unsigned char* view, 3563 const Sized_relobj_file<32, big_endian>* object, 3564 const Symbol_value<32>* psymval, 3565 Arm_address relative_address_base) 3566 { 3567 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3568 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3569 Valtype* wv = reinterpret_cast<Valtype*>(view); 3570 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3571 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3572 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3573 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3574 val = This::insert_val_thumb_movw_movt(val, x); 3575 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3576 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3577 return This::STATUS_OKAY; 3578 } 3579 3580 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32) 3581 static inline typename This::Status 3582 thm_alu11(unsigned char* view, 3583 const Sized_relobj_file<32, big_endian>* object, 3584 const Symbol_value<32>* psymval, 3585 Arm_address address, 3586 Arm_address thumb_bit) 3587 { 3588 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3589 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3590 Valtype* wv = reinterpret_cast<Valtype*>(view); 3591 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3592 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3593 3594 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0 3595 // ----------------------------------------------------------------------- 3596 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8 3597 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8 3598 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8 3599 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8 3600 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8 3601 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8 3602 3603 // Determine a sign for the addend. 3604 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000 3605 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1; 3606 // Thumb2 addend encoding: 3607 // imm12 := i | imm3 | imm8 3608 int32_t addend = (insn & 0xff) 3609 | ((insn & 0x00007000) >> 4) 3610 | ((insn & 0x04000000) >> 15); 3611 // Apply a sign to the added. 3612 addend *= sign; 3613 3614 int32_t x = (psymval->value(object, addend) | thumb_bit) 3615 - (address & 0xfffffffc); 3616 Reltype val = abs(x); 3617 // Mask out the value and a distinct part of the ADD/SUB opcode 3618 // (bits 7:5 of opword). 3619 insn = (insn & 0xfb0f8f00) 3620 | (val & 0xff) 3621 | ((val & 0x700) << 4) 3622 | ((val & 0x800) << 15); 3623 // Set the opcode according to whether the value to go in the 3624 // place is negative. 3625 if (x < 0) 3626 insn |= 0x00a00000; 3627 3628 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3629 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3630 return ((val > 0xfff) ? 3631 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3632 } 3633 3634 // R_ARM_THM_PC8: S + A - Pa (Thumb) 3635 static inline typename This::Status 3636 thm_pc8(unsigned char* view, 3637 const Sized_relobj_file<32, big_endian>* object, 3638 const Symbol_value<32>* psymval, 3639 Arm_address address) 3640 { 3641 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3642 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3643 Valtype* wv = reinterpret_cast<Valtype*>(view); 3644 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv); 3645 Reltype addend = ((insn & 0x00ff) << 2); 3646 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3647 Reltype val = abs(x); 3648 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2); 3649 3650 elfcpp::Swap<16, big_endian>::writeval(wv, insn); 3651 return ((val > 0x03fc) 3652 ? This::STATUS_OVERFLOW 3653 : This::STATUS_OKAY); 3654 } 3655 3656 // R_ARM_THM_PC12: S + A - Pa (Thumb32) 3657 static inline typename This::Status 3658 thm_pc12(unsigned char* view, 3659 const Sized_relobj_file<32, big_endian>* object, 3660 const Symbol_value<32>* psymval, 3661 Arm_address address) 3662 { 3663 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3664 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3665 Valtype* wv = reinterpret_cast<Valtype*>(view); 3666 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3667 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3668 // Determine a sign for the addend (positive if the U bit is 1). 3669 const int sign = (insn & 0x00800000) ? 1 : -1; 3670 int32_t addend = (insn & 0xfff); 3671 // Apply a sign to the added. 3672 addend *= sign; 3673 3674 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3675 Reltype val = abs(x); 3676 // Mask out and apply the value and the U bit. 3677 insn = (insn & 0xff7ff000) | (val & 0xfff); 3678 // Set the U bit according to whether the value to go in the 3679 // place is positive. 3680 if (x >= 0) 3681 insn |= 0x00800000; 3682 3683 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3684 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3685 return ((val > 0xfff) ? 3686 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3687 } 3688 3689 // R_ARM_V4BX 3690 static inline typename This::Status 3691 v4bx(const Relocate_info<32, big_endian>* relinfo, 3692 unsigned char* view, 3693 const Arm_relobj<big_endian>* object, 3694 const Arm_address address, 3695 const bool is_interworking) 3696 { 3697 3698 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3699 Valtype* wv = reinterpret_cast<Valtype*>(view); 3700 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3701 3702 // Ensure that we have a BX instruction. 3703 gold_assert((val & 0x0ffffff0) == 0x012fff10); 3704 const uint32_t reg = (val & 0xf); 3705 if (is_interworking && reg != 0xf) 3706 { 3707 Stub_table<big_endian>* stub_table = 3708 object->stub_table(relinfo->data_shndx); 3709 gold_assert(stub_table != NULL); 3710 3711 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg); 3712 gold_assert(stub != NULL); 3713 3714 int32_t veneer_address = 3715 stub_table->address() + stub->offset() - 8 - address; 3716 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET) 3717 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET)); 3718 // Replace with a branch to veneer (B <addr>) 3719 val = (val & 0xf0000000) | 0x0a000000 3720 | ((veneer_address >> 2) & 0x00ffffff); 3721 } 3722 else 3723 { 3724 // Preserve Rm (lowest four bits) and the condition code 3725 // (highest four bits). Other bits encode MOV PC,Rm. 3726 val = (val & 0xf000000f) | 0x01a0f000; 3727 } 3728 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3729 return This::STATUS_OKAY; 3730 } 3731 3732 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P 3733 // R_ARM_ALU_PC_G0: ((S + A) | T) - P 3734 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P 3735 // R_ARM_ALU_PC_G1: ((S + A) | T) - P 3736 // R_ARM_ALU_PC_G2: ((S + A) | T) - P 3737 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S) 3738 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S) 3739 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S) 3740 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S) 3741 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) 3742 static inline typename This::Status 3743 arm_grp_alu(unsigned char* view, 3744 const Sized_relobj_file<32, big_endian>* object, 3745 const Symbol_value<32>* psymval, 3746 const int group, 3747 Arm_address address, 3748 Arm_address thumb_bit, 3749 bool check_overflow) 3750 { 3751 gold_assert(group >= 0 && group < 3); 3752 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3753 Valtype* wv = reinterpret_cast<Valtype*>(view); 3754 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3755 3756 // ALU group relocations are allowed only for the ADD/SUB instructions. 3757 // (0x00800000 - ADD, 0x00400000 - SUB) 3758 const Valtype opcode = insn & 0x01e00000; 3759 if (opcode != 0x00800000 && opcode != 0x00400000) 3760 return This::STATUS_BAD_RELOC; 3761 3762 // Determine a sign for the addend. 3763 const int sign = (opcode == 0x00800000) ? 1 : -1; 3764 // shifter = rotate_imm * 2 3765 const uint32_t shifter = (insn & 0xf00) >> 7; 3766 // Initial addend value. 3767 int32_t addend = insn & 0xff; 3768 // Rotate addend right by shifter. 3769 addend = (addend >> shifter) | (addend << (32 - shifter)); 3770 // Apply a sign to the added. 3771 addend *= sign; 3772 3773 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address); 3774 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group); 3775 // Check for overflow if required 3776 if (check_overflow 3777 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0)) 3778 return This::STATUS_OVERFLOW; 3779 3780 // Mask out the value and the ADD/SUB part of the opcode; take care 3781 // not to destroy the S bit. 3782 insn &= 0xff1ff000; 3783 // Set the opcode according to whether the value to go in the 3784 // place is negative. 3785 insn |= ((x < 0) ? 0x00400000 : 0x00800000); 3786 // Encode the offset (encoded Gn). 3787 insn |= gn; 3788 3789 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3790 return This::STATUS_OKAY; 3791 } 3792 3793 // R_ARM_LDR_PC_G0: S + A - P 3794 // R_ARM_LDR_PC_G1: S + A - P 3795 // R_ARM_LDR_PC_G2: S + A - P 3796 // R_ARM_LDR_SB_G0: S + A - B(S) 3797 // R_ARM_LDR_SB_G1: S + A - B(S) 3798 // R_ARM_LDR_SB_G2: S + A - B(S) 3799 static inline typename This::Status 3800 arm_grp_ldr(unsigned char* view, 3801 const Sized_relobj_file<32, big_endian>* object, 3802 const Symbol_value<32>* psymval, 3803 const int group, 3804 Arm_address address) 3805 { 3806 gold_assert(group >= 0 && group < 3); 3807 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3808 Valtype* wv = reinterpret_cast<Valtype*>(view); 3809 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3810 3811 const int sign = (insn & 0x00800000) ? 1 : -1; 3812 int32_t addend = (insn & 0xfff) * sign; 3813 int32_t x = (psymval->value(object, addend) - address); 3814 // Calculate the relevant G(n-1) value to obtain this stage residual. 3815 Valtype residual = 3816 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3817 if (residual >= 0x1000) 3818 return This::STATUS_OVERFLOW; 3819 3820 // Mask out the value and U bit. 3821 insn &= 0xff7ff000; 3822 // Set the U bit for non-negative values. 3823 if (x >= 0) 3824 insn |= 0x00800000; 3825 insn |= residual; 3826 3827 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3828 return This::STATUS_OKAY; 3829 } 3830 3831 // R_ARM_LDRS_PC_G0: S + A - P 3832 // R_ARM_LDRS_PC_G1: S + A - P 3833 // R_ARM_LDRS_PC_G2: S + A - P 3834 // R_ARM_LDRS_SB_G0: S + A - B(S) 3835 // R_ARM_LDRS_SB_G1: S + A - B(S) 3836 // R_ARM_LDRS_SB_G2: S + A - B(S) 3837 static inline typename This::Status 3838 arm_grp_ldrs(unsigned char* view, 3839 const Sized_relobj_file<32, big_endian>* object, 3840 const Symbol_value<32>* psymval, 3841 const int group, 3842 Arm_address address) 3843 { 3844 gold_assert(group >= 0 && group < 3); 3845 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3846 Valtype* wv = reinterpret_cast<Valtype*>(view); 3847 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3848 3849 const int sign = (insn & 0x00800000) ? 1 : -1; 3850 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign; 3851 int32_t x = (psymval->value(object, addend) - address); 3852 // Calculate the relevant G(n-1) value to obtain this stage residual. 3853 Valtype residual = 3854 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3855 if (residual >= 0x100) 3856 return This::STATUS_OVERFLOW; 3857 3858 // Mask out the value and U bit. 3859 insn &= 0xff7ff0f0; 3860 // Set the U bit for non-negative values. 3861 if (x >= 0) 3862 insn |= 0x00800000; 3863 insn |= ((residual & 0xf0) << 4) | (residual & 0xf); 3864 3865 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3866 return This::STATUS_OKAY; 3867 } 3868 3869 // R_ARM_LDC_PC_G0: S + A - P 3870 // R_ARM_LDC_PC_G1: S + A - P 3871 // R_ARM_LDC_PC_G2: S + A - P 3872 // R_ARM_LDC_SB_G0: S + A - B(S) 3873 // R_ARM_LDC_SB_G1: S + A - B(S) 3874 // R_ARM_LDC_SB_G2: S + A - B(S) 3875 static inline typename This::Status 3876 arm_grp_ldc(unsigned char* view, 3877 const Sized_relobj_file<32, big_endian>* object, 3878 const Symbol_value<32>* psymval, 3879 const int group, 3880 Arm_address address) 3881 { 3882 gold_assert(group >= 0 && group < 3); 3883 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3884 Valtype* wv = reinterpret_cast<Valtype*>(view); 3885 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3886 3887 const int sign = (insn & 0x00800000) ? 1 : -1; 3888 int32_t addend = ((insn & 0xff) << 2) * sign; 3889 int32_t x = (psymval->value(object, addend) - address); 3890 // Calculate the relevant G(n-1) value to obtain this stage residual. 3891 Valtype residual = 3892 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3893 if ((residual & 0x3) != 0 || residual >= 0x400) 3894 return This::STATUS_OVERFLOW; 3895 3896 // Mask out the value and U bit. 3897 insn &= 0xff7fff00; 3898 // Set the U bit for non-negative values. 3899 if (x >= 0) 3900 insn |= 0x00800000; 3901 insn |= (residual >> 2); 3902 3903 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3904 return This::STATUS_OKAY; 3905 } 3906 }; 3907 3908 // Relocate ARM long branches. This handles relocation types 3909 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25. 3910 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 3911 // undefined and we do not use PLT in this relocation. In such a case, 3912 // the branch is converted into an NOP. 3913 3914 template<bool big_endian> 3915 typename Arm_relocate_functions<big_endian>::Status 3916 Arm_relocate_functions<big_endian>::arm_branch_common( 3917 unsigned int r_type, 3918 const Relocate_info<32, big_endian>* relinfo, 3919 unsigned char* view, 3920 const Sized_symbol<32>* gsym, 3921 const Arm_relobj<big_endian>* object, 3922 unsigned int r_sym, 3923 const Symbol_value<32>* psymval, 3924 Arm_address address, 3925 Arm_address thumb_bit, 3926 bool is_weakly_undefined_without_plt) 3927 { 3928 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3929 Valtype* wv = reinterpret_cast<Valtype*>(view); 3930 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3931 3932 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe) 3933 && ((val & 0x0f000000UL) == 0x0a000000UL); 3934 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL; 3935 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe) 3936 && ((val & 0x0f000000UL) == 0x0b000000UL); 3937 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL; 3938 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL; 3939 3940 // Check that the instruction is valid. 3941 if (r_type == elfcpp::R_ARM_CALL) 3942 { 3943 if (!insn_is_uncond_bl && !insn_is_blx) 3944 return This::STATUS_BAD_RELOC; 3945 } 3946 else if (r_type == elfcpp::R_ARM_JUMP24) 3947 { 3948 if (!insn_is_b && !insn_is_cond_bl) 3949 return This::STATUS_BAD_RELOC; 3950 } 3951 else if (r_type == elfcpp::R_ARM_PLT32) 3952 { 3953 if (!insn_is_any_branch) 3954 return This::STATUS_BAD_RELOC; 3955 } 3956 else if (r_type == elfcpp::R_ARM_XPC25) 3957 { 3958 // FIXME: AAELF document IH0044C does not say much about it other 3959 // than it being obsolete. 3960 if (!insn_is_any_branch) 3961 return This::STATUS_BAD_RELOC; 3962 } 3963 else 3964 gold_unreachable(); 3965 3966 // A branch to an undefined weak symbol is turned into a jump to 3967 // the next instruction unless a PLT entry will be created. 3968 // Do the same for local undefined symbols. 3969 // The jump to the next instruction is optimized as a NOP depending 3970 // on the architecture. 3971 const Target_arm<big_endian>* arm_target = 3972 Target_arm<big_endian>::default_target(); 3973 if (is_weakly_undefined_without_plt) 3974 { 3975 gold_assert(!parameters->options().relocatable()); 3976 Valtype cond = val & 0xf0000000U; 3977 if (arm_target->may_use_arm_nop()) 3978 val = cond | 0x0320f000; 3979 else 3980 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0. 3981 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3982 return This::STATUS_OKAY; 3983 } 3984 3985 Valtype addend = Bits<26>::sign_extend32(val << 2); 3986 Valtype branch_target = psymval->value(object, addend); 3987 int32_t branch_offset = branch_target - address; 3988 3989 // We need a stub if the branch offset is too large or if we need 3990 // to switch mode. 3991 bool may_use_blx = arm_target->may_use_v5t_interworking(); 3992 Reloc_stub* stub = NULL; 3993 3994 if (!parameters->options().relocatable() 3995 && (Bits<26>::has_overflow32(branch_offset) 3996 || ((thumb_bit != 0) 3997 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))) 3998 { 3999 Valtype unadjusted_branch_target = psymval->value(object, 0); 4000 4001 Stub_type stub_type = 4002 Reloc_stub::stub_type_for_reloc(r_type, address, 4003 unadjusted_branch_target, 4004 (thumb_bit != 0)); 4005 if (stub_type != arm_stub_none) 4006 { 4007 Stub_table<big_endian>* stub_table = 4008 object->stub_table(relinfo->data_shndx); 4009 gold_assert(stub_table != NULL); 4010 4011 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4012 stub = stub_table->find_reloc_stub(stub_key); 4013 gold_assert(stub != NULL); 4014 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4015 branch_target = stub_table->address() + stub->offset() + addend; 4016 branch_offset = branch_target - address; 4017 gold_assert(!Bits<26>::has_overflow32(branch_offset)); 4018 } 4019 } 4020 4021 // At this point, if we still need to switch mode, the instruction 4022 // must either be a BLX or a BL that can be converted to a BLX. 4023 if (thumb_bit != 0) 4024 { 4025 // Turn BL to BLX. 4026 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL); 4027 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23); 4028 } 4029 4030 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL); 4031 elfcpp::Swap<32, big_endian>::writeval(wv, val); 4032 return (Bits<26>::has_overflow32(branch_offset) 4033 ? This::STATUS_OVERFLOW 4034 : This::STATUS_OKAY); 4035 } 4036 4037 // Relocate THUMB long branches. This handles relocation types 4038 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22. 4039 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4040 // undefined and we do not use PLT in this relocation. In such a case, 4041 // the branch is converted into an NOP. 4042 4043 template<bool big_endian> 4044 typename Arm_relocate_functions<big_endian>::Status 4045 Arm_relocate_functions<big_endian>::thumb_branch_common( 4046 unsigned int r_type, 4047 const Relocate_info<32, big_endian>* relinfo, 4048 unsigned char* view, 4049 const Sized_symbol<32>* gsym, 4050 const Arm_relobj<big_endian>* object, 4051 unsigned int r_sym, 4052 const Symbol_value<32>* psymval, 4053 Arm_address address, 4054 Arm_address thumb_bit, 4055 bool is_weakly_undefined_without_plt) 4056 { 4057 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4058 Valtype* wv = reinterpret_cast<Valtype*>(view); 4059 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4060 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4061 4062 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference 4063 // into account. 4064 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U; 4065 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U; 4066 4067 // Check that the instruction is valid. 4068 if (r_type == elfcpp::R_ARM_THM_CALL) 4069 { 4070 if (!is_bl_insn && !is_blx_insn) 4071 return This::STATUS_BAD_RELOC; 4072 } 4073 else if (r_type == elfcpp::R_ARM_THM_JUMP24) 4074 { 4075 // This cannot be a BLX. 4076 if (!is_bl_insn) 4077 return This::STATUS_BAD_RELOC; 4078 } 4079 else if (r_type == elfcpp::R_ARM_THM_XPC22) 4080 { 4081 // Check for Thumb to Thumb call. 4082 if (!is_blx_insn) 4083 return This::STATUS_BAD_RELOC; 4084 if (thumb_bit != 0) 4085 { 4086 gold_warning(_("%s: Thumb BLX instruction targets " 4087 "thumb function '%s'."), 4088 object->name().c_str(), 4089 (gsym ? gsym->name() : "(local)")); 4090 // Convert BLX to BL. 4091 lower_insn |= 0x1000U; 4092 } 4093 } 4094 else 4095 gold_unreachable(); 4096 4097 // A branch to an undefined weak symbol is turned into a jump to 4098 // the next instruction unless a PLT entry will be created. 4099 // The jump to the next instruction is optimized as a NOP.W for 4100 // Thumb-2 enabled architectures. 4101 const Target_arm<big_endian>* arm_target = 4102 Target_arm<big_endian>::default_target(); 4103 if (is_weakly_undefined_without_plt) 4104 { 4105 gold_assert(!parameters->options().relocatable()); 4106 if (arm_target->may_use_thumb2_nop()) 4107 { 4108 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af); 4109 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000); 4110 } 4111 else 4112 { 4113 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000); 4114 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00); 4115 } 4116 return This::STATUS_OKAY; 4117 } 4118 4119 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn); 4120 Arm_address branch_target = psymval->value(object, addend); 4121 4122 // For BLX, bit 1 of target address comes from bit 1 of base address. 4123 bool may_use_blx = arm_target->may_use_v5t_interworking(); 4124 if (thumb_bit == 0 && may_use_blx) 4125 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4126 4127 int32_t branch_offset = branch_target - address; 4128 4129 // We need a stub if the branch offset is too large or if we need 4130 // to switch mode. 4131 bool thumb2 = arm_target->using_thumb2(); 4132 if (!parameters->options().relocatable() 4133 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset)) 4134 || (thumb2 && Bits<25>::has_overflow32(branch_offset)) 4135 || ((thumb_bit == 0) 4136 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4137 || r_type == elfcpp::R_ARM_THM_JUMP24)))) 4138 { 4139 Arm_address unadjusted_branch_target = psymval->value(object, 0); 4140 4141 Stub_type stub_type = 4142 Reloc_stub::stub_type_for_reloc(r_type, address, 4143 unadjusted_branch_target, 4144 (thumb_bit != 0)); 4145 4146 if (stub_type != arm_stub_none) 4147 { 4148 Stub_table<big_endian>* stub_table = 4149 object->stub_table(relinfo->data_shndx); 4150 gold_assert(stub_table != NULL); 4151 4152 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4153 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key); 4154 gold_assert(stub != NULL); 4155 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4156 branch_target = stub_table->address() + stub->offset() + addend; 4157 if (thumb_bit == 0 && may_use_blx) 4158 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4159 branch_offset = branch_target - address; 4160 } 4161 } 4162 4163 // At this point, if we still need to switch mode, the instruction 4164 // must either be a BLX or a BL that can be converted to a BLX. 4165 if (thumb_bit == 0) 4166 { 4167 gold_assert(may_use_blx 4168 && (r_type == elfcpp::R_ARM_THM_CALL 4169 || r_type == elfcpp::R_ARM_THM_XPC22)); 4170 // Make sure this is a BLX. 4171 lower_insn &= ~0x1000U; 4172 } 4173 else 4174 { 4175 // Make sure this is a BL. 4176 lower_insn |= 0x1000U; 4177 } 4178 4179 // For a BLX instruction, make sure that the relocation is rounded up 4180 // to a word boundary. This follows the semantics of the instruction 4181 // which specifies that bit 1 of the target address will come from bit 4182 // 1 of the base address. 4183 if ((lower_insn & 0x5000U) == 0x4000U) 4184 gold_assert((branch_offset & 3) == 0); 4185 4186 // Put BRANCH_OFFSET back into the insn. Assumes two's complement. 4187 // We use the Thumb-2 encoding, which is safe even if dealing with 4188 // a Thumb-1 instruction by virtue of our overflow check above. */ 4189 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset); 4190 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset); 4191 4192 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4193 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4194 4195 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 4196 4197 return ((thumb2 4198 ? Bits<25>::has_overflow32(branch_offset) 4199 : Bits<23>::has_overflow32(branch_offset)) 4200 ? This::STATUS_OVERFLOW 4201 : This::STATUS_OKAY); 4202 } 4203 4204 // Relocate THUMB-2 long conditional branches. 4205 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4206 // undefined and we do not use PLT in this relocation. In such a case, 4207 // the branch is converted into an NOP. 4208 4209 template<bool big_endian> 4210 typename Arm_relocate_functions<big_endian>::Status 4211 Arm_relocate_functions<big_endian>::thm_jump19( 4212 unsigned char* view, 4213 const Arm_relobj<big_endian>* object, 4214 const Symbol_value<32>* psymval, 4215 Arm_address address, 4216 Arm_address thumb_bit) 4217 { 4218 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4219 Valtype* wv = reinterpret_cast<Valtype*>(view); 4220 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4221 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4222 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn); 4223 4224 Arm_address branch_target = psymval->value(object, addend); 4225 int32_t branch_offset = branch_target - address; 4226 4227 // ??? Should handle interworking? GCC might someday try to 4228 // use this for tail calls. 4229 // FIXME: We do support thumb entry to PLT yet. 4230 if (thumb_bit == 0) 4231 { 4232 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet.")); 4233 return This::STATUS_BAD_RELOC; 4234 } 4235 4236 // Put RELOCATION back into the insn. 4237 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset); 4238 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset); 4239 4240 // Put the relocated value back in the object file: 4241 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4242 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4243 4244 return (Bits<21>::has_overflow32(branch_offset) 4245 ? This::STATUS_OVERFLOW 4246 : This::STATUS_OKAY); 4247 } 4248 4249 // Get the GOT section, creating it if necessary. 4250 4251 template<bool big_endian> 4252 Arm_output_data_got<big_endian>* 4253 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout) 4254 { 4255 if (this->got_ == NULL) 4256 { 4257 gold_assert(symtab != NULL && layout != NULL); 4258 4259 // When using -z now, we can treat .got as a relro section. 4260 // Without -z now, it is modified after program startup by lazy 4261 // PLT relocations. 4262 bool is_got_relro = parameters->options().now(); 4263 Output_section_order got_order = (is_got_relro 4264 ? ORDER_RELRO_LAST 4265 : ORDER_DATA); 4266 4267 // Unlike some targets (.e.g x86), ARM does not use separate .got and 4268 // .got.plt sections in output. The output .got section contains both 4269 // PLT and non-PLT GOT entries. 4270 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout); 4271 4272 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4273 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4274 this->got_, got_order, is_got_relro); 4275 4276 // The old GNU linker creates a .got.plt section. We just 4277 // create another set of data in the .got section. Note that we 4278 // always create a PLT if we create a GOT, although the PLT 4279 // might be empty. 4280 this->got_plt_ = new Output_data_space(4, "** GOT PLT"); 4281 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4282 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4283 this->got_plt_, got_order, is_got_relro); 4284 4285 // The first three entries are reserved. 4286 this->got_plt_->set_current_data_size(3 * 4); 4287 4288 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. 4289 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, 4290 Symbol_table::PREDEFINED, 4291 this->got_plt_, 4292 0, 0, elfcpp::STT_OBJECT, 4293 elfcpp::STB_LOCAL, 4294 elfcpp::STV_HIDDEN, 0, 4295 false, false); 4296 4297 // If there are any IRELATIVE relocations, they get GOT entries 4298 // in .got.plt after the jump slot entries. 4299 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT"); 4300 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4301 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4302 this->got_irelative_, 4303 got_order, is_got_relro); 4304 4305 } 4306 return this->got_; 4307 } 4308 4309 // Get the dynamic reloc section, creating it if necessary. 4310 4311 template<bool big_endian> 4312 typename Target_arm<big_endian>::Reloc_section* 4313 Target_arm<big_endian>::rel_dyn_section(Layout* layout) 4314 { 4315 if (this->rel_dyn_ == NULL) 4316 { 4317 gold_assert(layout != NULL); 4318 // Create both relocation sections in the same place, so as to ensure 4319 // their relative order in the output section. 4320 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc()); 4321 this->rel_irelative_ = new Reloc_section(false); 4322 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4323 elfcpp::SHF_ALLOC, this->rel_dyn_, 4324 ORDER_DYNAMIC_RELOCS, false); 4325 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4326 elfcpp::SHF_ALLOC, this->rel_irelative_, 4327 ORDER_DYNAMIC_RELOCS, false); 4328 } 4329 return this->rel_dyn_; 4330 } 4331 4332 4333 // Get the section to use for IRELATIVE relocs, creating it if necessary. These 4334 // go in .rela.dyn, but only after all other dynamic relocations. They need to 4335 // follow the other dynamic relocations so that they can refer to global 4336 // variables initialized by those relocs. 4337 4338 template<bool big_endian> 4339 typename Target_arm<big_endian>::Reloc_section* 4340 Target_arm<big_endian>::rel_irelative_section(Layout* layout) 4341 { 4342 if (this->rel_irelative_ == NULL) 4343 { 4344 // Delegate the creation to rel_dyn_section so as to ensure their order in 4345 // the output section. 4346 this->rel_dyn_section(layout); 4347 gold_assert(this->rel_irelative_ != NULL 4348 && (this->rel_dyn_->output_section() 4349 == this->rel_irelative_->output_section())); 4350 } 4351 return this->rel_irelative_; 4352 } 4353 4354 4355 // Insn_template methods. 4356 4357 // Return byte size of an instruction template. 4358 4359 size_t 4360 Insn_template::size() const 4361 { 4362 switch (this->type()) 4363 { 4364 case THUMB16_TYPE: 4365 case THUMB16_SPECIAL_TYPE: 4366 return 2; 4367 case ARM_TYPE: 4368 case THUMB32_TYPE: 4369 case DATA_TYPE: 4370 return 4; 4371 default: 4372 gold_unreachable(); 4373 } 4374 } 4375 4376 // Return alignment of an instruction template. 4377 4378 unsigned 4379 Insn_template::alignment() const 4380 { 4381 switch (this->type()) 4382 { 4383 case THUMB16_TYPE: 4384 case THUMB16_SPECIAL_TYPE: 4385 case THUMB32_TYPE: 4386 return 2; 4387 case ARM_TYPE: 4388 case DATA_TYPE: 4389 return 4; 4390 default: 4391 gold_unreachable(); 4392 } 4393 } 4394 4395 // Stub_template methods. 4396 4397 Stub_template::Stub_template( 4398 Stub_type type, const Insn_template* insns, 4399 size_t insn_count) 4400 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1), 4401 entry_in_thumb_mode_(false), relocs_() 4402 { 4403 off_t offset = 0; 4404 4405 // Compute byte size and alignment of stub template. 4406 for (size_t i = 0; i < insn_count; i++) 4407 { 4408 unsigned insn_alignment = insns[i].alignment(); 4409 size_t insn_size = insns[i].size(); 4410 gold_assert((offset & (insn_alignment - 1)) == 0); 4411 this->alignment_ = std::max(this->alignment_, insn_alignment); 4412 switch (insns[i].type()) 4413 { 4414 case Insn_template::THUMB16_TYPE: 4415 case Insn_template::THUMB16_SPECIAL_TYPE: 4416 if (i == 0) 4417 this->entry_in_thumb_mode_ = true; 4418 break; 4419 4420 case Insn_template::THUMB32_TYPE: 4421 if (insns[i].r_type() != elfcpp::R_ARM_NONE) 4422 this->relocs_.push_back(Reloc(i, offset)); 4423 if (i == 0) 4424 this->entry_in_thumb_mode_ = true; 4425 break; 4426 4427 case Insn_template::ARM_TYPE: 4428 // Handle cases where the target is encoded within the 4429 // instruction. 4430 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24) 4431 this->relocs_.push_back(Reloc(i, offset)); 4432 break; 4433 4434 case Insn_template::DATA_TYPE: 4435 // Entry point cannot be data. 4436 gold_assert(i != 0); 4437 this->relocs_.push_back(Reloc(i, offset)); 4438 break; 4439 4440 default: 4441 gold_unreachable(); 4442 } 4443 offset += insn_size; 4444 } 4445 this->size_ = offset; 4446 } 4447 4448 // Stub methods. 4449 4450 // Template to implement do_write for a specific target endianness. 4451 4452 template<bool big_endian> 4453 void inline 4454 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size) 4455 { 4456 const Stub_template* stub_template = this->stub_template(); 4457 const Insn_template* insns = stub_template->insns(); 4458 4459 // FIXME: We do not handle BE8 encoding yet. 4460 unsigned char* pov = view; 4461 for (size_t i = 0; i < stub_template->insn_count(); i++) 4462 { 4463 switch (insns[i].type()) 4464 { 4465 case Insn_template::THUMB16_TYPE: 4466 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff); 4467 break; 4468 case Insn_template::THUMB16_SPECIAL_TYPE: 4469 elfcpp::Swap<16, big_endian>::writeval( 4470 pov, 4471 this->thumb16_special(i)); 4472 break; 4473 case Insn_template::THUMB32_TYPE: 4474 { 4475 uint32_t hi = (insns[i].data() >> 16) & 0xffff; 4476 uint32_t lo = insns[i].data() & 0xffff; 4477 elfcpp::Swap<16, big_endian>::writeval(pov, hi); 4478 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo); 4479 } 4480 break; 4481 case Insn_template::ARM_TYPE: 4482 case Insn_template::DATA_TYPE: 4483 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data()); 4484 break; 4485 default: 4486 gold_unreachable(); 4487 } 4488 pov += insns[i].size(); 4489 } 4490 gold_assert(static_cast<section_size_type>(pov - view) == view_size); 4491 } 4492 4493 // Reloc_stub::Key methods. 4494 4495 // Dump a Key as a string for debugging. 4496 4497 std::string 4498 Reloc_stub::Key::name() const 4499 { 4500 if (this->r_sym_ == invalid_index) 4501 { 4502 // Global symbol key name 4503 // <stub-type>:<symbol name>:<addend>. 4504 const std::string sym_name = this->u_.symbol->name(); 4505 // We need to print two hex number and two colons. So just add 100 bytes 4506 // to the symbol name size. 4507 size_t len = sym_name.size() + 100; 4508 char* buffer = new char[len]; 4509 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_, 4510 sym_name.c_str(), this->addend_); 4511 gold_assert(c > 0 && c < static_cast<int>(len)); 4512 delete[] buffer; 4513 return std::string(buffer); 4514 } 4515 else 4516 { 4517 // local symbol key name 4518 // <stub-type>:<object>:<r_sym>:<addend>. 4519 const size_t len = 200; 4520 char buffer[len]; 4521 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_, 4522 this->u_.relobj, this->r_sym_, this->addend_); 4523 gold_assert(c > 0 && c < static_cast<int>(len)); 4524 return std::string(buffer); 4525 } 4526 } 4527 4528 // Reloc_stub methods. 4529 4530 // Determine the type of stub needed, if any, for a relocation of R_TYPE at 4531 // LOCATION to DESTINATION. 4532 // This code is based on the arm_type_of_stub function in 4533 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub 4534 // class simple. 4535 4536 Stub_type 4537 Reloc_stub::stub_type_for_reloc( 4538 unsigned int r_type, 4539 Arm_address location, 4540 Arm_address destination, 4541 bool target_is_thumb) 4542 { 4543 Stub_type stub_type = arm_stub_none; 4544 4545 // This is a bit ugly but we want to avoid using a templated class for 4546 // big and little endianities. 4547 bool may_use_blx; 4548 bool should_force_pic_veneer = parameters->options().pic_veneer(); 4549 bool thumb2; 4550 bool thumb_only; 4551 if (parameters->target().is_big_endian()) 4552 { 4553 const Target_arm<true>* big_endian_target = 4554 Target_arm<true>::default_target(); 4555 may_use_blx = big_endian_target->may_use_v5t_interworking(); 4556 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer(); 4557 thumb2 = big_endian_target->using_thumb2(); 4558 thumb_only = big_endian_target->using_thumb_only(); 4559 } 4560 else 4561 { 4562 const Target_arm<false>* little_endian_target = 4563 Target_arm<false>::default_target(); 4564 may_use_blx = little_endian_target->may_use_v5t_interworking(); 4565 should_force_pic_veneer |= 4566 little_endian_target->should_force_pic_veneer(); 4567 thumb2 = little_endian_target->using_thumb2(); 4568 thumb_only = little_endian_target->using_thumb_only(); 4569 } 4570 4571 int64_t branch_offset; 4572 bool output_is_position_independent = 4573 parameters->options().output_is_position_independent(); 4574 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24) 4575 { 4576 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the 4577 // base address (instruction address + 4). 4578 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb) 4579 destination = Bits<32>::bit_select32(destination, location, 0x2); 4580 branch_offset = static_cast<int64_t>(destination) - location; 4581 4582 // Handle cases where: 4583 // - this call goes too far (different Thumb/Thumb2 max 4584 // distance) 4585 // - it's a Thumb->Arm call and blx is not available, or it's a 4586 // Thumb->Arm branch (not bl). A stub is needed in this case. 4587 if ((!thumb2 4588 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET 4589 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) 4590 || (thumb2 4591 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET 4592 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) 4593 || ((!target_is_thumb) 4594 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4595 || (r_type == elfcpp::R_ARM_THM_JUMP24)))) 4596 { 4597 if (target_is_thumb) 4598 { 4599 // Thumb to thumb. 4600 if (!thumb_only) 4601 { 4602 stub_type = (output_is_position_independent 4603 || should_force_pic_veneer) 4604 // PIC stubs. 4605 ? ((may_use_blx 4606 && (r_type == elfcpp::R_ARM_THM_CALL)) 4607 // V5T and above. Stub starts with ARM code, so 4608 // we must be able to switch mode before 4609 // reaching it, which is only possible for 'bl' 4610 // (ie R_ARM_THM_CALL relocation). 4611 ? arm_stub_long_branch_any_thumb_pic 4612 // On V4T, use Thumb code only. 4613 : arm_stub_long_branch_v4t_thumb_thumb_pic) 4614 4615 // non-PIC stubs. 4616 : ((may_use_blx 4617 && (r_type == elfcpp::R_ARM_THM_CALL)) 4618 ? arm_stub_long_branch_any_any // V5T and above. 4619 : arm_stub_long_branch_v4t_thumb_thumb); // V4T. 4620 } 4621 else 4622 { 4623 stub_type = (output_is_position_independent 4624 || should_force_pic_veneer) 4625 ? arm_stub_long_branch_thumb_only_pic // PIC stub. 4626 : arm_stub_long_branch_thumb_only; // non-PIC stub. 4627 } 4628 } 4629 else 4630 { 4631 // Thumb to arm. 4632 4633 // FIXME: We should check that the input section is from an 4634 // object that has interwork enabled. 4635 4636 stub_type = (output_is_position_independent 4637 || should_force_pic_veneer) 4638 // PIC stubs. 4639 ? ((may_use_blx 4640 && (r_type == elfcpp::R_ARM_THM_CALL)) 4641 ? arm_stub_long_branch_any_arm_pic // V5T and above. 4642 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T. 4643 4644 // non-PIC stubs. 4645 : ((may_use_blx 4646 && (r_type == elfcpp::R_ARM_THM_CALL)) 4647 ? arm_stub_long_branch_any_any // V5T and above. 4648 : arm_stub_long_branch_v4t_thumb_arm); // V4T. 4649 4650 // Handle v4t short branches. 4651 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) 4652 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) 4653 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) 4654 stub_type = arm_stub_short_branch_v4t_thumb_arm; 4655 } 4656 } 4657 } 4658 else if (r_type == elfcpp::R_ARM_CALL 4659 || r_type == elfcpp::R_ARM_JUMP24 4660 || r_type == elfcpp::R_ARM_PLT32) 4661 { 4662 branch_offset = static_cast<int64_t>(destination) - location; 4663 if (target_is_thumb) 4664 { 4665 // Arm to thumb. 4666 4667 // FIXME: We should check that the input section is from an 4668 // object that has interwork enabled. 4669 4670 // We have an extra 2-bytes reach because of 4671 // the mode change (bit 24 (H) of BLX encoding). 4672 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) 4673 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) 4674 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx) 4675 || (r_type == elfcpp::R_ARM_JUMP24) 4676 || (r_type == elfcpp::R_ARM_PLT32)) 4677 { 4678 stub_type = (output_is_position_independent 4679 || should_force_pic_veneer) 4680 // PIC stubs. 4681 ? (may_use_blx 4682 ? arm_stub_long_branch_any_thumb_pic// V5T and above. 4683 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub. 4684 4685 // non-PIC stubs. 4686 : (may_use_blx 4687 ? arm_stub_long_branch_any_any // V5T and above. 4688 : arm_stub_long_branch_v4t_arm_thumb); // V4T. 4689 } 4690 } 4691 else 4692 { 4693 // Arm to arm. 4694 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET 4695 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) 4696 { 4697 stub_type = (output_is_position_independent 4698 || should_force_pic_veneer) 4699 ? arm_stub_long_branch_any_arm_pic // PIC stubs. 4700 : arm_stub_long_branch_any_any; /// non-PIC. 4701 } 4702 } 4703 } 4704 4705 return stub_type; 4706 } 4707 4708 // Cortex_a8_stub methods. 4709 4710 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template. 4711 // I is the position of the instruction template in the stub template. 4712 4713 uint16_t 4714 Cortex_a8_stub::do_thumb16_special(size_t i) 4715 { 4716 // The only use of this is to copy condition code from a conditional 4717 // branch being worked around to the corresponding conditional branch in 4718 // to the stub. 4719 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond 4720 && i == 0); 4721 uint16_t data = this->stub_template()->insns()[i].data(); 4722 gold_assert((data & 0xff00U) == 0xd000U); 4723 data |= ((this->original_insn_ >> 22) & 0xf) << 8; 4724 return data; 4725 } 4726 4727 // Stub_factory methods. 4728 4729 Stub_factory::Stub_factory() 4730 { 4731 // The instruction template sequences are declared as static 4732 // objects and initialized first time the constructor runs. 4733 4734 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx 4735 // to reach the stub if necessary. 4736 static const Insn_template elf32_arm_stub_long_branch_any_any[] = 4737 { 4738 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4739 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4740 // dcd R_ARM_ABS32(X) 4741 }; 4742 4743 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not 4744 // available. 4745 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] = 4746 { 4747 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4748 Insn_template::arm_insn(0xe12fff1c), // bx ip 4749 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4750 // dcd R_ARM_ABS32(X) 4751 }; 4752 4753 // Thumb -> Thumb long branch stub. Used on M-profile architectures. 4754 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] = 4755 { 4756 Insn_template::thumb16_insn(0xb401), // push {r0} 4757 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4758 Insn_template::thumb16_insn(0x4684), // mov ip, r0 4759 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4760 Insn_template::thumb16_insn(0x4760), // bx ip 4761 Insn_template::thumb16_insn(0xbf00), // nop 4762 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4763 // dcd R_ARM_ABS32(X) 4764 }; 4765 4766 // V4T Thumb -> Thumb long branch stub. Using the stack is not 4767 // allowed. 4768 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] = 4769 { 4770 Insn_template::thumb16_insn(0x4778), // bx pc 4771 Insn_template::thumb16_insn(0x46c0), // nop 4772 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4773 Insn_template::arm_insn(0xe12fff1c), // bx ip 4774 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4775 // dcd R_ARM_ABS32(X) 4776 }; 4777 4778 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not 4779 // available. 4780 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] = 4781 { 4782 Insn_template::thumb16_insn(0x4778), // bx pc 4783 Insn_template::thumb16_insn(0x46c0), // nop 4784 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4785 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4786 // dcd R_ARM_ABS32(X) 4787 }; 4788 4789 // V4T Thumb -> ARM short branch stub. Shorter variant of the above 4790 // one, when the destination is close enough. 4791 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] = 4792 { 4793 Insn_template::thumb16_insn(0x4778), // bx pc 4794 Insn_template::thumb16_insn(0x46c0), // nop 4795 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8) 4796 }; 4797 4798 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use 4799 // blx to reach the stub if necessary. 4800 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] = 4801 { 4802 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc] 4803 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip 4804 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4805 // dcd R_ARM_REL32(X-4) 4806 }; 4807 4808 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use 4809 // blx to reach the stub if necessary. We can not add into pc; 4810 // it is not guaranteed to mode switch (different in ARMv6 and 4811 // ARMv7). 4812 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] = 4813 { 4814 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4] 4815 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4816 Insn_template::arm_insn(0xe12fff1c), // bx ip 4817 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4818 // dcd R_ARM_REL32(X) 4819 }; 4820 4821 // V4T ARM -> ARM long branch stub, PIC. 4822 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = 4823 { 4824 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4825 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4826 Insn_template::arm_insn(0xe12fff1c), // bx ip 4827 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4828 // dcd R_ARM_REL32(X) 4829 }; 4830 4831 // V4T Thumb -> ARM long branch stub, PIC. 4832 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = 4833 { 4834 Insn_template::thumb16_insn(0x4778), // bx pc 4835 Insn_template::thumb16_insn(0x46c0), // nop 4836 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4837 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc 4838 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4839 // dcd R_ARM_REL32(X) 4840 }; 4841 4842 // Thumb -> Thumb long branch stub, PIC. Used on M-profile 4843 // architectures. 4844 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] = 4845 { 4846 Insn_template::thumb16_insn(0xb401), // push {r0} 4847 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4848 Insn_template::thumb16_insn(0x46fc), // mov ip, pc 4849 Insn_template::thumb16_insn(0x4484), // add ip, r0 4850 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4851 Insn_template::thumb16_insn(0x4760), // bx ip 4852 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4), 4853 // dcd R_ARM_REL32(X) 4854 }; 4855 4856 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not 4857 // allowed. 4858 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = 4859 { 4860 Insn_template::thumb16_insn(0x4778), // bx pc 4861 Insn_template::thumb16_insn(0x46c0), // nop 4862 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4863 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4864 Insn_template::arm_insn(0xe12fff1c), // bx ip 4865 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4866 // dcd R_ARM_REL32(X) 4867 }; 4868 4869 // Cortex-A8 erratum-workaround stubs. 4870 4871 // Stub used for conditional branches (which may be beyond +/-1MB away, 4872 // so we can't use a conditional branch to reach this stub). 4873 4874 // original code: 4875 // 4876 // b<cond> X 4877 // after: 4878 // 4879 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] = 4880 { 4881 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true 4882 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after 4883 Insn_template::thumb32_b_insn(0xf000b800, -4) // true: 4884 // b.w X 4885 }; 4886 4887 // Stub used for b.w and bl.w instructions. 4888 4889 static const Insn_template elf32_arm_stub_a8_veneer_b[] = 4890 { 4891 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4892 }; 4893 4894 static const Insn_template elf32_arm_stub_a8_veneer_bl[] = 4895 { 4896 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4897 }; 4898 4899 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w 4900 // instruction (which switches to ARM mode) to point to this stub. Jump to 4901 // the real destination using an ARM-mode branch. 4902 static const Insn_template elf32_arm_stub_a8_veneer_blx[] = 4903 { 4904 Insn_template::arm_rel_insn(0xea000000, -8) // b dest 4905 }; 4906 4907 // Stub used to provide an interworking for R_ARM_V4BX relocation 4908 // (bx r[n] instruction). 4909 static const Insn_template elf32_arm_stub_v4_veneer_bx[] = 4910 { 4911 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1 4912 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n> 4913 Insn_template::arm_insn(0xe12fff10) // bx r<n> 4914 }; 4915 4916 // Fill in the stub template look-up table. Stub templates are constructed 4917 // per instance of Stub_factory for fast look-up without locking 4918 // in a thread-enabled environment. 4919 4920 this->stub_templates_[arm_stub_none] = 4921 new Stub_template(arm_stub_none, NULL, 0); 4922 4923 #define DEF_STUB(x) \ 4924 do \ 4925 { \ 4926 size_t array_size \ 4927 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \ 4928 Stub_type type = arm_stub_##x; \ 4929 this->stub_templates_[type] = \ 4930 new Stub_template(type, elf32_arm_stub_##x, array_size); \ 4931 } \ 4932 while (0); 4933 4934 DEF_STUBS 4935 #undef DEF_STUB 4936 } 4937 4938 // Stub_table methods. 4939 4940 // Remove all Cortex-A8 stub. 4941 4942 template<bool big_endian> 4943 void 4944 Stub_table<big_endian>::remove_all_cortex_a8_stubs() 4945 { 4946 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 4947 p != this->cortex_a8_stubs_.end(); 4948 ++p) 4949 delete p->second; 4950 this->cortex_a8_stubs_.clear(); 4951 } 4952 4953 // Relocate one stub. This is a helper for Stub_table::relocate_stubs(). 4954 4955 template<bool big_endian> 4956 void 4957 Stub_table<big_endian>::relocate_stub( 4958 Stub* stub, 4959 const Relocate_info<32, big_endian>* relinfo, 4960 Target_arm<big_endian>* arm_target, 4961 Output_section* output_section, 4962 unsigned char* view, 4963 Arm_address address, 4964 section_size_type view_size) 4965 { 4966 const Stub_template* stub_template = stub->stub_template(); 4967 if (stub_template->reloc_count() != 0) 4968 { 4969 // Adjust view to cover the stub only. 4970 section_size_type offset = stub->offset(); 4971 section_size_type stub_size = stub_template->size(); 4972 gold_assert(offset + stub_size <= view_size); 4973 4974 arm_target->relocate_stub(stub, relinfo, output_section, view + offset, 4975 address + offset, stub_size); 4976 } 4977 } 4978 4979 // Relocate all stubs in this stub table. 4980 4981 template<bool big_endian> 4982 void 4983 Stub_table<big_endian>::relocate_stubs( 4984 const Relocate_info<32, big_endian>* relinfo, 4985 Target_arm<big_endian>* arm_target, 4986 Output_section* output_section, 4987 unsigned char* view, 4988 Arm_address address, 4989 section_size_type view_size) 4990 { 4991 // If we are passed a view bigger than the stub table's. we need to 4992 // adjust the view. 4993 gold_assert(address == this->address() 4994 && (view_size 4995 == static_cast<section_size_type>(this->data_size()))); 4996 4997 // Relocate all relocation stubs. 4998 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 4999 p != this->reloc_stubs_.end(); 5000 ++p) 5001 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5002 address, view_size); 5003 5004 // Relocate all Cortex-A8 stubs. 5005 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 5006 p != this->cortex_a8_stubs_.end(); 5007 ++p) 5008 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5009 address, view_size); 5010 5011 // Relocate all ARM V4BX stubs. 5012 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin(); 5013 p != this->arm_v4bx_stubs_.end(); 5014 ++p) 5015 { 5016 if (*p != NULL) 5017 this->relocate_stub(*p, relinfo, arm_target, output_section, view, 5018 address, view_size); 5019 } 5020 } 5021 5022 // Write out the stubs to file. 5023 5024 template<bool big_endian> 5025 void 5026 Stub_table<big_endian>::do_write(Output_file* of) 5027 { 5028 off_t offset = this->offset(); 5029 const section_size_type oview_size = 5030 convert_to_section_size_type(this->data_size()); 5031 unsigned char* const oview = of->get_output_view(offset, oview_size); 5032 5033 // Write relocation stubs. 5034 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 5035 p != this->reloc_stubs_.end(); 5036 ++p) 5037 { 5038 Reloc_stub* stub = p->second; 5039 Arm_address address = this->address() + stub->offset(); 5040 gold_assert(address 5041 == align_address(address, 5042 stub->stub_template()->alignment())); 5043 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5044 big_endian); 5045 } 5046 5047 // Write Cortex-A8 stubs. 5048 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5049 p != this->cortex_a8_stubs_.end(); 5050 ++p) 5051 { 5052 Cortex_a8_stub* stub = p->second; 5053 Arm_address address = this->address() + stub->offset(); 5054 gold_assert(address 5055 == align_address(address, 5056 stub->stub_template()->alignment())); 5057 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5058 big_endian); 5059 } 5060 5061 // Write ARM V4BX relocation stubs. 5062 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5063 p != this->arm_v4bx_stubs_.end(); 5064 ++p) 5065 { 5066 if (*p == NULL) 5067 continue; 5068 5069 Arm_address address = this->address() + (*p)->offset(); 5070 gold_assert(address 5071 == align_address(address, 5072 (*p)->stub_template()->alignment())); 5073 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(), 5074 big_endian); 5075 } 5076 5077 if (parameters->options().stub_group_auto_padding()) 5078 { 5079 // Zero-fill padding area. 5080 gold_assert((unsigned int)(this->prev_data_size_ + this->padding_) <= oview_size); 5081 unsigned char* p_padding_area = oview + this->prev_data_size_; 5082 for (unsigned int i = 0; i < this->padding_; ++i) 5083 *(p_padding_area + i) = 0; 5084 } 5085 5086 of->write_output_view(this->offset(), oview_size, oview); 5087 } 5088 5089 // Update the data size and address alignment of the stub table at the end 5090 // of a relaxation pass. Return true if either the data size or the 5091 // alignment changed in this relaxation pass. 5092 5093 template<bool big_endian> 5094 bool 5095 Stub_table<big_endian>::update_data_size_and_addralign() 5096 { 5097 // Go over all stubs in table to compute data size and address alignment. 5098 off_t size = this->reloc_stubs_size_; 5099 unsigned addralign = this->reloc_stubs_addralign_; 5100 5101 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5102 p != this->cortex_a8_stubs_.end(); 5103 ++p) 5104 { 5105 const Stub_template* stub_template = p->second->stub_template(); 5106 addralign = std::max(addralign, stub_template->alignment()); 5107 size = (align_address(size, stub_template->alignment()) 5108 + stub_template->size()); 5109 } 5110 5111 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5112 p != this->arm_v4bx_stubs_.end(); 5113 ++p) 5114 { 5115 if (*p == NULL) 5116 continue; 5117 5118 const Stub_template* stub_template = (*p)->stub_template(); 5119 addralign = std::max(addralign, stub_template->alignment()); 5120 size = (align_address(size, stub_template->alignment()) 5121 + stub_template->size()); 5122 } 5123 5124 unsigned int prev_padding = this->padding_; 5125 5126 // Smart padding. 5127 if (parameters->options().stub_group_auto_padding()) 5128 { 5129 if(size > this->prev_data_size_) 5130 { 5131 // Stub table has to grow 'delta' bytes. 5132 unsigned int delta = size - this->prev_data_size_; 5133 // Test to see if this delta grow could be "absorbed" by the 5134 // "padding_" we added in previously iteration. 5135 if (delta <= this->padding_) 5136 { 5137 // Yes! Grow into padding area, shrink padding, keep stub table 5138 // size unchanged. 5139 this->padding_ -= delta; 5140 } 5141 else 5142 { 5143 // No! Delta is too much to fit in padding area. Heuristically, we 5144 // increase padding. Padding is about 0.5% of huge increment, or 5145 // 2% of moderate increment, or 0% for smaller ones.. 5146 if (delta >= 0x50000) 5147 this->padding_ = 0x250; 5148 else if (delta >= 0x30000) 5149 this->padding_ = 0x150; 5150 else if (delta >= 0x10000) 5151 this->padding_ = 0x100; 5152 else if (delta >= 0x500) 5153 { 5154 // Set padding to 2% of stub table growth delta or 0x40, 5155 // whichever is smaller. 5156 this->padding_ = std::min((unsigned int)(delta * 0.02), 5157 (unsigned int)0x40); 5158 } 5159 } 5160 } 5161 else if (size < this->prev_data_size_) 5162 { 5163 // Stub table shrinks, this is rare, but not impossible. 5164 unsigned int delta = this->prev_data_size_ - size; 5165 // So let padding increase to absorb the shrinking. Still we get an 5166 // unchanged stub table. 5167 this->padding_ += delta; 5168 } 5169 } 5170 5171 // Check if either data size or alignment changed in this pass. 5172 // Update prev_data_size_ and prev_addralign_. These will be used 5173 // as the current data size and address alignment for the next pass. 5174 bool changed = (size + this->padding_) != 5175 this->prev_data_size_ + prev_padding; 5176 5177 this->prev_data_size_ = size; 5178 5179 if (addralign != this->prev_addralign_) 5180 changed = true; 5181 this->prev_addralign_ = addralign; 5182 5183 return changed; 5184 } 5185 5186 // Finalize the stubs. This sets the offsets of the stubs within the stub 5187 // table. It also marks all input sections needing Cortex-A8 workaround. 5188 5189 template<bool big_endian> 5190 void 5191 Stub_table<big_endian>::finalize_stubs() 5192 { 5193 off_t off = this->reloc_stubs_size_; 5194 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5195 p != this->cortex_a8_stubs_.end(); 5196 ++p) 5197 { 5198 Cortex_a8_stub* stub = p->second; 5199 const Stub_template* stub_template = stub->stub_template(); 5200 uint64_t stub_addralign = stub_template->alignment(); 5201 off = align_address(off, stub_addralign); 5202 stub->set_offset(off); 5203 off += stub_template->size(); 5204 5205 // Mark input section so that we can determine later if a code section 5206 // needs the Cortex-A8 workaround quickly. 5207 Arm_relobj<big_endian>* arm_relobj = 5208 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj()); 5209 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx()); 5210 } 5211 5212 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5213 p != this->arm_v4bx_stubs_.end(); 5214 ++p) 5215 { 5216 if (*p == NULL) 5217 continue; 5218 5219 const Stub_template* stub_template = (*p)->stub_template(); 5220 uint64_t stub_addralign = stub_template->alignment(); 5221 off = align_address(off, stub_addralign); 5222 (*p)->set_offset(off); 5223 off += stub_template->size(); 5224 } 5225 5226 gold_assert(off <= this->prev_data_size_); 5227 } 5228 5229 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS 5230 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address 5231 // of the address range seen by the linker. 5232 5233 template<bool big_endian> 5234 void 5235 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range( 5236 Target_arm<big_endian>* arm_target, 5237 unsigned char* view, 5238 Arm_address view_address, 5239 section_size_type view_size) 5240 { 5241 // Cortex-A8 stubs are sorted by addresses of branches being fixed up. 5242 for (Cortex_a8_stub_list::const_iterator p = 5243 this->cortex_a8_stubs_.lower_bound(view_address); 5244 ((p != this->cortex_a8_stubs_.end()) 5245 && (p->first < (view_address + view_size))); 5246 ++p) 5247 { 5248 // We do not store the THUMB bit in the LSB of either the branch address 5249 // or the stub offset. There is no need to strip the LSB. 5250 Arm_address branch_address = p->first; 5251 const Cortex_a8_stub* stub = p->second; 5252 Arm_address stub_address = this->address() + stub->offset(); 5253 5254 // Offset of the branch instruction relative to this view. 5255 section_size_type offset = 5256 convert_to_section_size_type(branch_address - view_address); 5257 gold_assert((offset + 4) <= view_size); 5258 5259 arm_target->apply_cortex_a8_workaround(stub, stub_address, 5260 view + offset, branch_address); 5261 } 5262 } 5263 5264 // Arm_input_section methods. 5265 5266 // Initialize an Arm_input_section. 5267 5268 template<bool big_endian> 5269 void 5270 Arm_input_section<big_endian>::init() 5271 { 5272 Relobj* relobj = this->relobj(); 5273 unsigned int shndx = this->shndx(); 5274 5275 // We have to cache original size, alignment and contents to avoid locking 5276 // the original file. 5277 this->original_addralign_ = 5278 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx)); 5279 5280 // This is not efficient but we expect only a small number of relaxed 5281 // input sections for stubs. 5282 section_size_type section_size; 5283 const unsigned char* section_contents = 5284 relobj->section_contents(shndx, §ion_size, false); 5285 this->original_size_ = 5286 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx)); 5287 5288 gold_assert(this->original_contents_ == NULL); 5289 this->original_contents_ = new unsigned char[section_size]; 5290 memcpy(this->original_contents_, section_contents, section_size); 5291 5292 // We want to make this look like the original input section after 5293 // output sections are finalized. 5294 Output_section* os = relobj->output_section(shndx); 5295 off_t offset = relobj->output_section_offset(shndx); 5296 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx)); 5297 this->set_address(os->address() + offset); 5298 this->set_file_offset(os->offset() + offset); 5299 5300 this->set_current_data_size(this->original_size_); 5301 this->finalize_data_size(); 5302 } 5303 5304 template<bool big_endian> 5305 void 5306 Arm_input_section<big_endian>::do_write(Output_file* of) 5307 { 5308 // We have to write out the original section content. 5309 gold_assert(this->original_contents_ != NULL); 5310 of->write(this->offset(), this->original_contents_, 5311 this->original_size_); 5312 5313 // If this owns a stub table and it is not empty, write it. 5314 if (this->is_stub_table_owner() && !this->stub_table_->empty()) 5315 this->stub_table_->write(of); 5316 } 5317 5318 // Finalize data size. 5319 5320 template<bool big_endian> 5321 void 5322 Arm_input_section<big_endian>::set_final_data_size() 5323 { 5324 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5325 5326 if (this->is_stub_table_owner()) 5327 { 5328 this->stub_table_->finalize_data_size(); 5329 off = align_address(off, this->stub_table_->addralign()); 5330 off += this->stub_table_->data_size(); 5331 } 5332 this->set_data_size(off); 5333 } 5334 5335 // Reset address and file offset. 5336 5337 template<bool big_endian> 5338 void 5339 Arm_input_section<big_endian>::do_reset_address_and_file_offset() 5340 { 5341 // Size of the original input section contents. 5342 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5343 5344 // If this is a stub table owner, account for the stub table size. 5345 if (this->is_stub_table_owner()) 5346 { 5347 Stub_table<big_endian>* stub_table = this->stub_table_; 5348 5349 // Reset the stub table's address and file offset. The 5350 // current data size for child will be updated after that. 5351 stub_table_->reset_address_and_file_offset(); 5352 off = align_address(off, stub_table_->addralign()); 5353 off += stub_table->current_data_size(); 5354 } 5355 5356 this->set_current_data_size(off); 5357 } 5358 5359 // Arm_exidx_cantunwind methods. 5360 5361 // Write this to Output file OF for a fixed endianness. 5362 5363 template<bool big_endian> 5364 void 5365 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) 5366 { 5367 off_t offset = this->offset(); 5368 const section_size_type oview_size = 8; 5369 unsigned char* const oview = of->get_output_view(offset, oview_size); 5370 5371 Output_section* os = this->relobj_->output_section(this->shndx_); 5372 gold_assert(os != NULL); 5373 5374 Arm_relobj<big_endian>* arm_relobj = 5375 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_); 5376 Arm_address output_offset = 5377 arm_relobj->get_output_section_offset(this->shndx_); 5378 Arm_address section_start; 5379 section_size_type section_size; 5380 5381 // Find out the end of the text section referred by this. 5382 if (output_offset != Arm_relobj<big_endian>::invalid_address) 5383 { 5384 section_start = os->address() + output_offset; 5385 const Arm_exidx_input_section* exidx_input_section = 5386 arm_relobj->exidx_input_section_by_link(this->shndx_); 5387 gold_assert(exidx_input_section != NULL); 5388 section_size = 5389 convert_to_section_size_type(exidx_input_section->text_size()); 5390 } 5391 else 5392 { 5393 // Currently this only happens for a relaxed section. 5394 const Output_relaxed_input_section* poris = 5395 os->find_relaxed_input_section(this->relobj_, this->shndx_); 5396 gold_assert(poris != NULL); 5397 section_start = poris->address(); 5398 section_size = convert_to_section_size_type(poris->data_size()); 5399 } 5400 5401 // We always append this to the end of an EXIDX section. 5402 Arm_address output_address = section_start + section_size; 5403 5404 // Write out the entry. The first word either points to the beginning 5405 // or after the end of a text section. The second word is the special 5406 // EXIDX_CANTUNWIND value. 5407 uint32_t prel31_offset = output_address - this->address(); 5408 if (Bits<31>::has_overflow32(offset)) 5409 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); 5410 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview, 5411 prel31_offset & 0x7fffffffU); 5412 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4, 5413 elfcpp::EXIDX_CANTUNWIND); 5414 5415 of->write_output_view(this->offset(), oview_size, oview); 5416 } 5417 5418 // Arm_exidx_merged_section methods. 5419 5420 // Constructor for Arm_exidx_merged_section. 5421 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 5422 // SECTION_OFFSET_MAP points to a section offset map describing how 5423 // parts of the input section are mapped to output. DELETED_BYTES is 5424 // the number of bytes deleted from the EXIDX input section. 5425 5426 Arm_exidx_merged_section::Arm_exidx_merged_section( 5427 const Arm_exidx_input_section& exidx_input_section, 5428 const Arm_exidx_section_offset_map& section_offset_map, 5429 uint32_t deleted_bytes) 5430 : Output_relaxed_input_section(exidx_input_section.relobj(), 5431 exidx_input_section.shndx(), 5432 exidx_input_section.addralign()), 5433 exidx_input_section_(exidx_input_section), 5434 section_offset_map_(section_offset_map) 5435 { 5436 // If we retain or discard the whole EXIDX input section, we would 5437 // not be here. 5438 gold_assert(deleted_bytes != 0 5439 && deleted_bytes != this->exidx_input_section_.size()); 5440 5441 // Fix size here so that we do not need to implement set_final_data_size. 5442 uint32_t size = exidx_input_section.size() - deleted_bytes; 5443 this->set_data_size(size); 5444 this->fix_data_size(); 5445 5446 // Allocate buffer for section contents and build contents. 5447 this->section_contents_ = new unsigned char[size]; 5448 } 5449 5450 // Build the contents of a merged EXIDX output section. 5451 5452 void 5453 Arm_exidx_merged_section::build_contents( 5454 const unsigned char* original_contents, 5455 section_size_type original_size) 5456 { 5457 // Go over spans of input offsets and write only those that are not 5458 // discarded. 5459 section_offset_type in_start = 0; 5460 section_offset_type out_start = 0; 5461 section_offset_type in_max = 5462 convert_types<section_offset_type>(original_size); 5463 section_offset_type out_max = 5464 convert_types<section_offset_type>(this->data_size()); 5465 for (Arm_exidx_section_offset_map::const_iterator p = 5466 this->section_offset_map_.begin(); 5467 p != this->section_offset_map_.end(); 5468 ++p) 5469 { 5470 section_offset_type in_end = p->first; 5471 gold_assert(in_end >= in_start); 5472 section_offset_type out_end = p->second; 5473 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1); 5474 if (out_end != -1) 5475 { 5476 size_t out_chunk_size = 5477 convert_types<size_t>(out_end - out_start + 1); 5478 5479 gold_assert(out_chunk_size == in_chunk_size 5480 && in_end < in_max && out_end < out_max); 5481 5482 memcpy(this->section_contents_ + out_start, 5483 original_contents + in_start, 5484 out_chunk_size); 5485 out_start += out_chunk_size; 5486 } 5487 in_start += in_chunk_size; 5488 } 5489 } 5490 5491 // Given an input OBJECT, an input section index SHNDX within that 5492 // object, and an OFFSET relative to the start of that input 5493 // section, return whether or not the corresponding offset within 5494 // the output section is known. If this function returns true, it 5495 // sets *POUTPUT to the output offset. The value -1 indicates that 5496 // this input offset is being discarded. 5497 5498 bool 5499 Arm_exidx_merged_section::do_output_offset( 5500 const Relobj* relobj, 5501 unsigned int shndx, 5502 section_offset_type offset, 5503 section_offset_type* poutput) const 5504 { 5505 // We only handle offsets for the original EXIDX input section. 5506 if (relobj != this->exidx_input_section_.relobj() 5507 || shndx != this->exidx_input_section_.shndx()) 5508 return false; 5509 5510 section_offset_type section_size = 5511 convert_types<section_offset_type>(this->exidx_input_section_.size()); 5512 if (offset < 0 || offset >= section_size) 5513 // Input offset is out of valid range. 5514 *poutput = -1; 5515 else 5516 { 5517 // We need to look up the section offset map to determine the output 5518 // offset. Find the reference point in map that is first offset 5519 // bigger than or equal to this offset. 5520 Arm_exidx_section_offset_map::const_iterator p = 5521 this->section_offset_map_.lower_bound(offset); 5522 5523 // The section offset maps are build such that this should not happen if 5524 // input offset is in the valid range. 5525 gold_assert(p != this->section_offset_map_.end()); 5526 5527 // We need to check if this is dropped. 5528 section_offset_type ref = p->first; 5529 section_offset_type mapped_ref = p->second; 5530 5531 if (mapped_ref != Arm_exidx_input_section::invalid_offset) 5532 // Offset is present in output. 5533 *poutput = mapped_ref + (offset - ref); 5534 else 5535 // Offset is discarded owing to EXIDX entry merging. 5536 *poutput = -1; 5537 } 5538 5539 return true; 5540 } 5541 5542 // Write this to output file OF. 5543 5544 void 5545 Arm_exidx_merged_section::do_write(Output_file* of) 5546 { 5547 off_t offset = this->offset(); 5548 const section_size_type oview_size = this->data_size(); 5549 unsigned char* const oview = of->get_output_view(offset, oview_size); 5550 5551 Output_section* os = this->relobj()->output_section(this->shndx()); 5552 gold_assert(os != NULL); 5553 5554 memcpy(oview, this->section_contents_, oview_size); 5555 of->write_output_view(this->offset(), oview_size, oview); 5556 } 5557 5558 // Arm_exidx_fixup methods. 5559 5560 // Append an EXIDX_CANTUNWIND in the current output section if the last entry 5561 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry 5562 // points to the end of the last seen EXIDX section. 5563 5564 void 5565 Arm_exidx_fixup::add_exidx_cantunwind_as_needed() 5566 { 5567 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND 5568 && this->last_input_section_ != NULL) 5569 { 5570 Relobj* relobj = this->last_input_section_->relobj(); 5571 unsigned int text_shndx = this->last_input_section_->link(); 5572 Arm_exidx_cantunwind* cantunwind = 5573 new Arm_exidx_cantunwind(relobj, text_shndx); 5574 this->exidx_output_section_->add_output_section_data(cantunwind); 5575 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5576 } 5577 } 5578 5579 // Process an EXIDX section entry in input. Return whether this entry 5580 // can be deleted in the output. SECOND_WORD in the second word of the 5581 // EXIDX entry. 5582 5583 bool 5584 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word) 5585 { 5586 bool delete_entry; 5587 if (second_word == elfcpp::EXIDX_CANTUNWIND) 5588 { 5589 // Merge if previous entry is also an EXIDX_CANTUNWIND. 5590 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND; 5591 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5592 } 5593 else if ((second_word & 0x80000000) != 0) 5594 { 5595 // Inlined unwinding data. Merge if equal to previous. 5596 delete_entry = (merge_exidx_entries_ 5597 && this->last_unwind_type_ == UT_INLINED_ENTRY 5598 && this->last_inlined_entry_ == second_word); 5599 this->last_unwind_type_ = UT_INLINED_ENTRY; 5600 this->last_inlined_entry_ = second_word; 5601 } 5602 else 5603 { 5604 // Normal table entry. In theory we could merge these too, 5605 // but duplicate entries are likely to be much less common. 5606 delete_entry = false; 5607 this->last_unwind_type_ = UT_NORMAL_ENTRY; 5608 } 5609 return delete_entry; 5610 } 5611 5612 // Update the current section offset map during EXIDX section fix-up. 5613 // If there is no map, create one. INPUT_OFFSET is the offset of a 5614 // reference point, DELETED_BYTES is the number of deleted by in the 5615 // section so far. If DELETE_ENTRY is true, the reference point and 5616 // all offsets after the previous reference point are discarded. 5617 5618 void 5619 Arm_exidx_fixup::update_offset_map( 5620 section_offset_type input_offset, 5621 section_size_type deleted_bytes, 5622 bool delete_entry) 5623 { 5624 if (this->section_offset_map_ == NULL) 5625 this->section_offset_map_ = new Arm_exidx_section_offset_map(); 5626 section_offset_type output_offset; 5627 if (delete_entry) 5628 output_offset = Arm_exidx_input_section::invalid_offset; 5629 else 5630 output_offset = input_offset - deleted_bytes; 5631 (*this->section_offset_map_)[input_offset] = output_offset; 5632 } 5633 5634 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of 5635 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX 5636 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS. 5637 // If some entries are merged, also store a pointer to a newly created 5638 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller 5639 // owns the map and is responsible for releasing it after use. 5640 5641 template<bool big_endian> 5642 uint32_t 5643 Arm_exidx_fixup::process_exidx_section( 5644 const Arm_exidx_input_section* exidx_input_section, 5645 const unsigned char* section_contents, 5646 section_size_type section_size, 5647 Arm_exidx_section_offset_map** psection_offset_map) 5648 { 5649 Relobj* relobj = exidx_input_section->relobj(); 5650 unsigned shndx = exidx_input_section->shndx(); 5651 5652 if ((section_size % 8) != 0) 5653 { 5654 // Something is wrong with this section. Better not touch it. 5655 gold_error(_("uneven .ARM.exidx section size in %s section %u"), 5656 relobj->name().c_str(), shndx); 5657 this->last_input_section_ = exidx_input_section; 5658 this->last_unwind_type_ = UT_NONE; 5659 return 0; 5660 } 5661 5662 uint32_t deleted_bytes = 0; 5663 bool prev_delete_entry = false; 5664 gold_assert(this->section_offset_map_ == NULL); 5665 5666 for (section_size_type i = 0; i < section_size; i += 8) 5667 { 5668 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 5669 const Valtype* wv = 5670 reinterpret_cast<const Valtype*>(section_contents + i + 4); 5671 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv); 5672 5673 bool delete_entry = this->process_exidx_entry(second_word); 5674 5675 // Entry deletion causes changes in output offsets. We use a std::map 5676 // to record these. And entry (x, y) means input offset x 5677 // is mapped to output offset y. If y is invalid_offset, then x is 5678 // dropped in the output. Because of the way std::map::lower_bound 5679 // works, we record the last offset in a region w.r.t to keeping or 5680 // dropping. If there is no entry (x0, y0) for an input offset x0, 5681 // the output offset y0 of it is determined by the output offset y1 of 5682 // the smallest input offset x1 > x0 that there is an (x1, y1) entry 5683 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1 5684 // y0 is also -1. 5685 if (delete_entry != prev_delete_entry && i != 0) 5686 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry); 5687 5688 // Update total deleted bytes for this entry. 5689 if (delete_entry) 5690 deleted_bytes += 8; 5691 5692 prev_delete_entry = delete_entry; 5693 } 5694 5695 // If section offset map is not NULL, make an entry for the end of 5696 // section. 5697 if (this->section_offset_map_ != NULL) 5698 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry); 5699 5700 *psection_offset_map = this->section_offset_map_; 5701 this->section_offset_map_ = NULL; 5702 this->last_input_section_ = exidx_input_section; 5703 5704 // Set the first output text section so that we can link the EXIDX output 5705 // section to it. Ignore any EXIDX input section that is completely merged. 5706 if (this->first_output_text_section_ == NULL 5707 && deleted_bytes != section_size) 5708 { 5709 unsigned int link = exidx_input_section->link(); 5710 Output_section* os = relobj->output_section(link); 5711 gold_assert(os != NULL); 5712 this->first_output_text_section_ = os; 5713 } 5714 5715 return deleted_bytes; 5716 } 5717 5718 // Arm_output_section methods. 5719 5720 // Create a stub group for input sections from BEGIN to END. OWNER 5721 // points to the input section to be the owner a new stub table. 5722 5723 template<bool big_endian> 5724 void 5725 Arm_output_section<big_endian>::create_stub_group( 5726 Input_section_list::const_iterator begin, 5727 Input_section_list::const_iterator end, 5728 Input_section_list::const_iterator owner, 5729 Target_arm<big_endian>* target, 5730 std::vector<Output_relaxed_input_section*>* new_relaxed_sections, 5731 const Task* task) 5732 { 5733 // We use a different kind of relaxed section in an EXIDX section. 5734 // The static casting from Output_relaxed_input_section to 5735 // Arm_input_section is invalid in an EXIDX section. We are okay 5736 // because we should not be calling this for an EXIDX section. 5737 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX); 5738 5739 // Currently we convert ordinary input sections into relaxed sections only 5740 // at this point but we may want to support creating relaxed input section 5741 // very early. So we check here to see if owner is already a relaxed 5742 // section. 5743 5744 Arm_input_section<big_endian>* arm_input_section; 5745 if (owner->is_relaxed_input_section()) 5746 { 5747 arm_input_section = 5748 Arm_input_section<big_endian>::as_arm_input_section( 5749 owner->relaxed_input_section()); 5750 } 5751 else 5752 { 5753 gold_assert(owner->is_input_section()); 5754 // Create a new relaxed input section. We need to lock the original 5755 // file. 5756 Task_lock_obj<Object> tl(task, owner->relobj()); 5757 arm_input_section = 5758 target->new_arm_input_section(owner->relobj(), owner->shndx()); 5759 new_relaxed_sections->push_back(arm_input_section); 5760 } 5761 5762 // Create a stub table. 5763 Stub_table<big_endian>* stub_table = 5764 target->new_stub_table(arm_input_section); 5765 5766 arm_input_section->set_stub_table(stub_table); 5767 5768 Input_section_list::const_iterator p = begin; 5769 Input_section_list::const_iterator prev_p; 5770 5771 // Look for input sections or relaxed input sections in [begin ... end]. 5772 do 5773 { 5774 if (p->is_input_section() || p->is_relaxed_input_section()) 5775 { 5776 // The stub table information for input sections live 5777 // in their objects. 5778 Arm_relobj<big_endian>* arm_relobj = 5779 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 5780 arm_relobj->set_stub_table(p->shndx(), stub_table); 5781 } 5782 prev_p = p++; 5783 } 5784 while (prev_p != end); 5785 } 5786 5787 // Group input sections for stub generation. GROUP_SIZE is roughly the limit 5788 // of stub groups. We grow a stub group by adding input section until the 5789 // size is just below GROUP_SIZE. The last input section will be converted 5790 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add 5791 // input section after the stub table, effectively double the group size. 5792 // 5793 // This is similar to the group_sections() function in elf32-arm.c but is 5794 // implemented differently. 5795 5796 template<bool big_endian> 5797 void 5798 Arm_output_section<big_endian>::group_sections( 5799 section_size_type group_size, 5800 bool stubs_always_after_branch, 5801 Target_arm<big_endian>* target, 5802 const Task* task) 5803 { 5804 // States for grouping. 5805 typedef enum 5806 { 5807 // No group is being built. 5808 NO_GROUP, 5809 // A group is being built but the stub table is not found yet. 5810 // We keep group a stub group until the size is just under GROUP_SIZE. 5811 // The last input section in the group will be used as the stub table. 5812 FINDING_STUB_SECTION, 5813 // A group is being built and we have already found a stub table. 5814 // We enter this state to grow a stub group by adding input section 5815 // after the stub table. This effectively doubles the group size. 5816 HAS_STUB_SECTION 5817 } State; 5818 5819 // Any newly created relaxed sections are stored here. 5820 std::vector<Output_relaxed_input_section*> new_relaxed_sections; 5821 5822 State state = NO_GROUP; 5823 section_size_type off = 0; 5824 section_size_type group_begin_offset = 0; 5825 section_size_type group_end_offset = 0; 5826 section_size_type stub_table_end_offset = 0; 5827 Input_section_list::const_iterator group_begin = 5828 this->input_sections().end(); 5829 Input_section_list::const_iterator stub_table = 5830 this->input_sections().end(); 5831 Input_section_list::const_iterator group_end = this->input_sections().end(); 5832 for (Input_section_list::const_iterator p = this->input_sections().begin(); 5833 p != this->input_sections().end(); 5834 ++p) 5835 { 5836 section_size_type section_begin_offset = 5837 align_address(off, p->addralign()); 5838 section_size_type section_end_offset = 5839 section_begin_offset + p->data_size(); 5840 5841 // Check to see if we should group the previously seen sections. 5842 switch (state) 5843 { 5844 case NO_GROUP: 5845 break; 5846 5847 case FINDING_STUB_SECTION: 5848 // Adding this section makes the group larger than GROUP_SIZE. 5849 if (section_end_offset - group_begin_offset >= group_size) 5850 { 5851 if (stubs_always_after_branch) 5852 { 5853 gold_assert(group_end != this->input_sections().end()); 5854 this->create_stub_group(group_begin, group_end, group_end, 5855 target, &new_relaxed_sections, 5856 task); 5857 state = NO_GROUP; 5858 } 5859 else 5860 { 5861 // But wait, there's more! Input sections up to 5862 // stub_group_size bytes after the stub table can be 5863 // handled by it too. 5864 state = HAS_STUB_SECTION; 5865 stub_table = group_end; 5866 stub_table_end_offset = group_end_offset; 5867 } 5868 } 5869 break; 5870 5871 case HAS_STUB_SECTION: 5872 // Adding this section makes the post stub-section group larger 5873 // than GROUP_SIZE. 5874 if (section_end_offset - stub_table_end_offset >= group_size) 5875 { 5876 gold_assert(group_end != this->input_sections().end()); 5877 this->create_stub_group(group_begin, group_end, stub_table, 5878 target, &new_relaxed_sections, task); 5879 state = NO_GROUP; 5880 } 5881 break; 5882 5883 default: 5884 gold_unreachable(); 5885 } 5886 5887 // If we see an input section and currently there is no group, start 5888 // a new one. Skip any empty sections. We look at the data size 5889 // instead of calling p->relobj()->section_size() to avoid locking. 5890 if ((p->is_input_section() || p->is_relaxed_input_section()) 5891 && (p->data_size() != 0)) 5892 { 5893 if (state == NO_GROUP) 5894 { 5895 state = FINDING_STUB_SECTION; 5896 group_begin = p; 5897 group_begin_offset = section_begin_offset; 5898 } 5899 5900 // Keep track of the last input section seen. 5901 group_end = p; 5902 group_end_offset = section_end_offset; 5903 } 5904 5905 off = section_end_offset; 5906 } 5907 5908 // Create a stub group for any ungrouped sections. 5909 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION) 5910 { 5911 gold_assert(group_end != this->input_sections().end()); 5912 this->create_stub_group(group_begin, group_end, 5913 (state == FINDING_STUB_SECTION 5914 ? group_end 5915 : stub_table), 5916 target, &new_relaxed_sections, task); 5917 } 5918 5919 // Convert input section into relaxed input section in a batch. 5920 if (!new_relaxed_sections.empty()) 5921 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections); 5922 5923 // Update the section offsets 5924 for (size_t i = 0; i < new_relaxed_sections.size(); ++i) 5925 { 5926 Arm_relobj<big_endian>* arm_relobj = 5927 Arm_relobj<big_endian>::as_arm_relobj( 5928 new_relaxed_sections[i]->relobj()); 5929 unsigned int shndx = new_relaxed_sections[i]->shndx(); 5930 // Tell Arm_relobj that this input section is converted. 5931 arm_relobj->convert_input_section_to_relaxed_section(shndx); 5932 } 5933 } 5934 5935 // Append non empty text sections in this to LIST in ascending 5936 // order of their position in this. 5937 5938 template<bool big_endian> 5939 void 5940 Arm_output_section<big_endian>::append_text_sections_to_list( 5941 Text_section_list* list) 5942 { 5943 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0); 5944 5945 for (Input_section_list::const_iterator p = this->input_sections().begin(); 5946 p != this->input_sections().end(); 5947 ++p) 5948 { 5949 // We only care about plain or relaxed input sections. We also 5950 // ignore any merged sections. 5951 if (p->is_input_section() || p->is_relaxed_input_section()) 5952 list->push_back(Text_section_list::value_type(p->relobj(), 5953 p->shndx())); 5954 } 5955 } 5956 5957 template<bool big_endian> 5958 void 5959 Arm_output_section<big_endian>::fix_exidx_coverage( 5960 Layout* layout, 5961 const Text_section_list& sorted_text_sections, 5962 Symbol_table* symtab, 5963 bool merge_exidx_entries, 5964 const Task* task) 5965 { 5966 // We should only do this for the EXIDX output section. 5967 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 5968 5969 // We don't want the relaxation loop to undo these changes, so we discard 5970 // the current saved states and take another one after the fix-up. 5971 this->discard_states(); 5972 5973 // Remove all input sections. 5974 uint64_t address = this->address(); 5975 typedef std::list<Output_section::Input_section> Input_section_list; 5976 Input_section_list input_sections; 5977 this->reset_address_and_file_offset(); 5978 this->get_input_sections(address, std::string(""), &input_sections); 5979 5980 if (!this->input_sections().empty()) 5981 gold_error(_("Found non-EXIDX input sections in EXIDX output section")); 5982 5983 // Go through all the known input sections and record them. 5984 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 5985 typedef Unordered_map<Section_id, const Output_section::Input_section*, 5986 Section_id_hash> Text_to_exidx_map; 5987 Text_to_exidx_map text_to_exidx_map; 5988 for (Input_section_list::const_iterator p = input_sections.begin(); 5989 p != input_sections.end(); 5990 ++p) 5991 { 5992 // This should never happen. At this point, we should only see 5993 // plain EXIDX input sections. 5994 gold_assert(!p->is_relaxed_input_section()); 5995 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p); 5996 } 5997 5998 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries); 5999 6000 // Go over the sorted text sections. 6001 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 6002 Section_id_set processed_input_sections; 6003 for (Text_section_list::const_iterator p = sorted_text_sections.begin(); 6004 p != sorted_text_sections.end(); 6005 ++p) 6006 { 6007 Relobj* relobj = p->first; 6008 unsigned int shndx = p->second; 6009 6010 Arm_relobj<big_endian>* arm_relobj = 6011 Arm_relobj<big_endian>::as_arm_relobj(relobj); 6012 const Arm_exidx_input_section* exidx_input_section = 6013 arm_relobj->exidx_input_section_by_link(shndx); 6014 6015 // If this text section has no EXIDX section or if the EXIDX section 6016 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end 6017 // of the last seen EXIDX section. 6018 if (exidx_input_section == NULL || exidx_input_section->has_errors()) 6019 { 6020 exidx_fixup.add_exidx_cantunwind_as_needed(); 6021 continue; 6022 } 6023 6024 Relobj* exidx_relobj = exidx_input_section->relobj(); 6025 unsigned int exidx_shndx = exidx_input_section->shndx(); 6026 Section_id sid(exidx_relobj, exidx_shndx); 6027 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid); 6028 if (iter == text_to_exidx_map.end()) 6029 { 6030 // This is odd. We have not seen this EXIDX input section before. 6031 // We cannot do fix-up. If we saw a SECTIONS clause in a script, 6032 // issue a warning instead. We assume the user knows what he 6033 // or she is doing. Otherwise, this is an error. 6034 if (layout->script_options()->saw_sections_clause()) 6035 gold_warning(_("unwinding may not work because EXIDX input section" 6036 " %u of %s is not in EXIDX output section"), 6037 exidx_shndx, exidx_relobj->name().c_str()); 6038 else 6039 gold_error(_("unwinding may not work because EXIDX input section" 6040 " %u of %s is not in EXIDX output section"), 6041 exidx_shndx, exidx_relobj->name().c_str()); 6042 6043 exidx_fixup.add_exidx_cantunwind_as_needed(); 6044 continue; 6045 } 6046 6047 // We need to access the contents of the EXIDX section, lock the 6048 // object here. 6049 Task_lock_obj<Object> tl(task, exidx_relobj); 6050 section_size_type exidx_size; 6051 const unsigned char* exidx_contents = 6052 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false); 6053 6054 // Fix up coverage and append input section to output data list. 6055 Arm_exidx_section_offset_map* section_offset_map = NULL; 6056 uint32_t deleted_bytes = 6057 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section, 6058 exidx_contents, 6059 exidx_size, 6060 §ion_offset_map); 6061 6062 if (deleted_bytes == exidx_input_section->size()) 6063 { 6064 // The whole EXIDX section got merged. Remove it from output. 6065 gold_assert(section_offset_map == NULL); 6066 exidx_relobj->set_output_section(exidx_shndx, NULL); 6067 6068 // All local symbols defined in this input section will be dropped. 6069 // We need to adjust output local symbol count. 6070 arm_relobj->set_output_local_symbol_count_needs_update(); 6071 } 6072 else if (deleted_bytes > 0) 6073 { 6074 // Some entries are merged. We need to convert this EXIDX input 6075 // section into a relaxed section. 6076 gold_assert(section_offset_map != NULL); 6077 6078 Arm_exidx_merged_section* merged_section = 6079 new Arm_exidx_merged_section(*exidx_input_section, 6080 *section_offset_map, deleted_bytes); 6081 merged_section->build_contents(exidx_contents, exidx_size); 6082 6083 const std::string secname = exidx_relobj->section_name(exidx_shndx); 6084 this->add_relaxed_input_section(layout, merged_section, secname); 6085 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx); 6086 6087 // All local symbols defined in discarded portions of this input 6088 // section will be dropped. We need to adjust output local symbol 6089 // count. 6090 arm_relobj->set_output_local_symbol_count_needs_update(); 6091 } 6092 else 6093 { 6094 // Just add back the EXIDX input section. 6095 gold_assert(section_offset_map == NULL); 6096 const Output_section::Input_section* pis = iter->second; 6097 gold_assert(pis->is_input_section()); 6098 this->add_script_input_section(*pis); 6099 } 6100 6101 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx)); 6102 } 6103 6104 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary. 6105 exidx_fixup.add_exidx_cantunwind_as_needed(); 6106 6107 // Remove any known EXIDX input sections that are not processed. 6108 for (Input_section_list::const_iterator p = input_sections.begin(); 6109 p != input_sections.end(); 6110 ++p) 6111 { 6112 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx())) 6113 == processed_input_sections.end()) 6114 { 6115 // We discard a known EXIDX section because its linked 6116 // text section has been folded by ICF. We also discard an 6117 // EXIDX section with error, the output does not matter in this 6118 // case. We do this to avoid triggering asserts. 6119 Arm_relobj<big_endian>* arm_relobj = 6120 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6121 const Arm_exidx_input_section* exidx_input_section = 6122 arm_relobj->exidx_input_section_by_shndx(p->shndx()); 6123 gold_assert(exidx_input_section != NULL); 6124 if (!exidx_input_section->has_errors()) 6125 { 6126 unsigned int text_shndx = exidx_input_section->link(); 6127 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx)); 6128 } 6129 6130 // Remove this from link. We also need to recount the 6131 // local symbols. 6132 p->relobj()->set_output_section(p->shndx(), NULL); 6133 arm_relobj->set_output_local_symbol_count_needs_update(); 6134 } 6135 } 6136 6137 // Link exidx output section to the first seen output section and 6138 // set correct entry size. 6139 this->set_link_section(exidx_fixup.first_output_text_section()); 6140 this->set_entsize(8); 6141 6142 // Make changes permanent. 6143 this->save_states(); 6144 this->set_section_offsets_need_adjustment(); 6145 } 6146 6147 // Link EXIDX output sections to text output sections. 6148 6149 template<bool big_endian> 6150 void 6151 Arm_output_section<big_endian>::set_exidx_section_link() 6152 { 6153 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 6154 if (!this->input_sections().empty()) 6155 { 6156 Input_section_list::const_iterator p = this->input_sections().begin(); 6157 Arm_relobj<big_endian>* arm_relobj = 6158 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6159 unsigned exidx_shndx = p->shndx(); 6160 const Arm_exidx_input_section* exidx_input_section = 6161 arm_relobj->exidx_input_section_by_shndx(exidx_shndx); 6162 gold_assert(exidx_input_section != NULL); 6163 unsigned int text_shndx = exidx_input_section->link(); 6164 Output_section* os = arm_relobj->output_section(text_shndx); 6165 this->set_link_section(os); 6166 } 6167 } 6168 6169 // Arm_relobj methods. 6170 6171 // Determine if an input section is scannable for stub processing. SHDR is 6172 // the header of the section and SHNDX is the section index. OS is the output 6173 // section for the input section and SYMTAB is the global symbol table used to 6174 // look up ICF information. 6175 6176 template<bool big_endian> 6177 bool 6178 Arm_relobj<big_endian>::section_is_scannable( 6179 const elfcpp::Shdr<32, big_endian>& shdr, 6180 unsigned int shndx, 6181 const Output_section* os, 6182 const Symbol_table* symtab) 6183 { 6184 // Skip any empty sections, unallocated sections or sections whose 6185 // type are not SHT_PROGBITS. 6186 if (shdr.get_sh_size() == 0 6187 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0 6188 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS) 6189 return false; 6190 6191 // Skip any discarded or ICF'ed sections. 6192 if (os == NULL || symtab->is_section_folded(this, shndx)) 6193 return false; 6194 6195 // If this requires special offset handling, check to see if it is 6196 // a relaxed section. If this is not, then it is a merged section that 6197 // we cannot handle. 6198 if (this->is_output_section_offset_invalid(shndx)) 6199 { 6200 const Output_relaxed_input_section* poris = 6201 os->find_relaxed_input_section(this, shndx); 6202 if (poris == NULL) 6203 return false; 6204 } 6205 6206 return true; 6207 } 6208 6209 // Determine if we want to scan the SHNDX-th section for relocation stubs. 6210 // This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6211 6212 template<bool big_endian> 6213 bool 6214 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning( 6215 const elfcpp::Shdr<32, big_endian>& shdr, 6216 const Relobj::Output_sections& out_sections, 6217 const Symbol_table* symtab, 6218 const unsigned char* pshdrs) 6219 { 6220 unsigned int sh_type = shdr.get_sh_type(); 6221 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA) 6222 return false; 6223 6224 // Ignore empty section. 6225 off_t sh_size = shdr.get_sh_size(); 6226 if (sh_size == 0) 6227 return false; 6228 6229 // Ignore reloc section with unexpected symbol table. The 6230 // error will be reported in the final link. 6231 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx()) 6232 return false; 6233 6234 unsigned int reloc_size; 6235 if (sh_type == elfcpp::SHT_REL) 6236 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6237 else 6238 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6239 6240 // Ignore reloc section with unexpected entsize or uneven size. 6241 // The error will be reported in the final link. 6242 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0) 6243 return false; 6244 6245 // Ignore reloc section with bad info. This error will be 6246 // reported in the final link. 6247 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6248 if (index >= this->shnum()) 6249 return false; 6250 6251 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6252 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size); 6253 return this->section_is_scannable(text_shdr, index, 6254 out_sections[index], symtab); 6255 } 6256 6257 // Return the output address of either a plain input section or a relaxed 6258 // input section. SHNDX is the section index. We define and use this 6259 // instead of calling Output_section::output_address because that is slow 6260 // for large output. 6261 6262 template<bool big_endian> 6263 Arm_address 6264 Arm_relobj<big_endian>::simple_input_section_output_address( 6265 unsigned int shndx, 6266 Output_section* os) 6267 { 6268 if (this->is_output_section_offset_invalid(shndx)) 6269 { 6270 const Output_relaxed_input_section* poris = 6271 os->find_relaxed_input_section(this, shndx); 6272 // We do not handle merged sections here. 6273 gold_assert(poris != NULL); 6274 return poris->address(); 6275 } 6276 else 6277 return os->address() + this->get_output_section_offset(shndx); 6278 } 6279 6280 // Determine if we want to scan the SHNDX-th section for non-relocation stubs. 6281 // This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6282 6283 template<bool big_endian> 6284 bool 6285 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning( 6286 const elfcpp::Shdr<32, big_endian>& shdr, 6287 unsigned int shndx, 6288 Output_section* os, 6289 const Symbol_table* symtab) 6290 { 6291 if (!this->section_is_scannable(shdr, shndx, os, symtab)) 6292 return false; 6293 6294 // If the section does not cross any 4K-boundaries, it does not need to 6295 // be scanned. 6296 Arm_address address = this->simple_input_section_output_address(shndx, os); 6297 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU)) 6298 return false; 6299 6300 return true; 6301 } 6302 6303 // Scan a section for Cortex-A8 workaround. 6304 6305 template<bool big_endian> 6306 void 6307 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum( 6308 const elfcpp::Shdr<32, big_endian>& shdr, 6309 unsigned int shndx, 6310 Output_section* os, 6311 Target_arm<big_endian>* arm_target) 6312 { 6313 // Look for the first mapping symbol in this section. It should be 6314 // at (shndx, 0). 6315 Mapping_symbol_position section_start(shndx, 0); 6316 typename Mapping_symbols_info::const_iterator p = 6317 this->mapping_symbols_info_.lower_bound(section_start); 6318 6319 // There are no mapping symbols for this section. Treat it as a data-only 6320 // section. 6321 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx) 6322 return; 6323 6324 Arm_address output_address = 6325 this->simple_input_section_output_address(shndx, os); 6326 6327 // Get the section contents. 6328 section_size_type input_view_size = 0; 6329 const unsigned char* input_view = 6330 this->section_contents(shndx, &input_view_size, false); 6331 6332 // We need to go through the mapping symbols to determine what to 6333 // scan. There are two reasons. First, we should look at THUMB code and 6334 // THUMB code only. Second, we only want to look at the 4K-page boundary 6335 // to speed up the scanning. 6336 6337 while (p != this->mapping_symbols_info_.end() 6338 && p->first.first == shndx) 6339 { 6340 typename Mapping_symbols_info::const_iterator next = 6341 this->mapping_symbols_info_.upper_bound(p->first); 6342 6343 // Only scan part of a section with THUMB code. 6344 if (p->second == 't') 6345 { 6346 // Determine the end of this range. 6347 section_size_type span_start = 6348 convert_to_section_size_type(p->first.second); 6349 section_size_type span_end; 6350 if (next != this->mapping_symbols_info_.end() 6351 && next->first.first == shndx) 6352 span_end = convert_to_section_size_type(next->first.second); 6353 else 6354 span_end = convert_to_section_size_type(shdr.get_sh_size()); 6355 6356 if (((span_start + output_address) & ~0xfffUL) 6357 != ((span_end + output_address - 1) & ~0xfffUL)) 6358 { 6359 arm_target->scan_span_for_cortex_a8_erratum(this, shndx, 6360 span_start, span_end, 6361 input_view, 6362 output_address); 6363 } 6364 } 6365 6366 p = next; 6367 } 6368 } 6369 6370 // Scan relocations for stub generation. 6371 6372 template<bool big_endian> 6373 void 6374 Arm_relobj<big_endian>::scan_sections_for_stubs( 6375 Target_arm<big_endian>* arm_target, 6376 const Symbol_table* symtab, 6377 const Layout* layout) 6378 { 6379 unsigned int shnum = this->shnum(); 6380 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6381 6382 // Read the section headers. 6383 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 6384 shnum * shdr_size, 6385 true, true); 6386 6387 // To speed up processing, we set up hash tables for fast lookup of 6388 // input offsets to output addresses. 6389 this->initialize_input_to_output_maps(); 6390 6391 const Relobj::Output_sections& out_sections(this->output_sections()); 6392 6393 Relocate_info<32, big_endian> relinfo; 6394 relinfo.symtab = symtab; 6395 relinfo.layout = layout; 6396 relinfo.object = this; 6397 6398 // Do relocation stubs scanning. 6399 const unsigned char* p = pshdrs + shdr_size; 6400 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6401 { 6402 const elfcpp::Shdr<32, big_endian> shdr(p); 6403 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab, 6404 pshdrs)) 6405 { 6406 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6407 Arm_address output_offset = this->get_output_section_offset(index); 6408 Arm_address output_address; 6409 if (output_offset != invalid_address) 6410 output_address = out_sections[index]->address() + output_offset; 6411 else 6412 { 6413 // Currently this only happens for a relaxed section. 6414 const Output_relaxed_input_section* poris = 6415 out_sections[index]->find_relaxed_input_section(this, index); 6416 gold_assert(poris != NULL); 6417 output_address = poris->address(); 6418 } 6419 6420 // Get the relocations. 6421 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(), 6422 shdr.get_sh_size(), 6423 true, false); 6424 6425 // Get the section contents. This does work for the case in which 6426 // we modify the contents of an input section. We need to pass the 6427 // output view under such circumstances. 6428 section_size_type input_view_size = 0; 6429 const unsigned char* input_view = 6430 this->section_contents(index, &input_view_size, false); 6431 6432 relinfo.reloc_shndx = i; 6433 relinfo.data_shndx = index; 6434 unsigned int sh_type = shdr.get_sh_type(); 6435 unsigned int reloc_size; 6436 if (sh_type == elfcpp::SHT_REL) 6437 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6438 else 6439 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6440 6441 Output_section* os = out_sections[index]; 6442 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs, 6443 shdr.get_sh_size() / reloc_size, 6444 os, 6445 output_offset == invalid_address, 6446 input_view, output_address, 6447 input_view_size); 6448 } 6449 } 6450 6451 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section 6452 // after its relocation section, if there is one, is processed for 6453 // relocation stubs. Merging this loop with the one above would have been 6454 // complicated since we would have had to make sure that relocation stub 6455 // scanning is done first. 6456 if (arm_target->fix_cortex_a8()) 6457 { 6458 const unsigned char* p = pshdrs + shdr_size; 6459 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6460 { 6461 const elfcpp::Shdr<32, big_endian> shdr(p); 6462 if (this->section_needs_cortex_a8_stub_scanning(shdr, i, 6463 out_sections[i], 6464 symtab)) 6465 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i], 6466 arm_target); 6467 } 6468 } 6469 6470 // After we've done the relocations, we release the hash tables, 6471 // since we no longer need them. 6472 this->free_input_to_output_maps(); 6473 } 6474 6475 // Count the local symbols. The ARM backend needs to know if a symbol 6476 // is a THUMB function or not. For global symbols, it is easy because 6477 // the Symbol object keeps the ELF symbol type. For local symbol it is 6478 // harder because we cannot access this information. So we override the 6479 // do_count_local_symbol in parent and scan local symbols to mark 6480 // THUMB functions. This is not the most efficient way but I do not want to 6481 // slow down other ports by calling a per symbol target hook inside 6482 // Sized_relobj_file<size, big_endian>::do_count_local_symbols. 6483 6484 template<bool big_endian> 6485 void 6486 Arm_relobj<big_endian>::do_count_local_symbols( 6487 Stringpool_template<char>* pool, 6488 Stringpool_template<char>* dynpool) 6489 { 6490 // We need to fix-up the values of any local symbols whose type are 6491 // STT_ARM_TFUNC. 6492 6493 // Ask parent to count the local symbols. 6494 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool); 6495 const unsigned int loccount = this->local_symbol_count(); 6496 if (loccount == 0) 6497 return; 6498 6499 // Initialize the thumb function bit-vector. 6500 std::vector<bool> empty_vector(loccount, false); 6501 this->local_symbol_is_thumb_function_.swap(empty_vector); 6502 6503 // Read the symbol table section header. 6504 const unsigned int symtab_shndx = this->symtab_shndx(); 6505 elfcpp::Shdr<32, big_endian> 6506 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 6507 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 6508 6509 // Read the local symbols. 6510 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 6511 gold_assert(loccount == symtabshdr.get_sh_info()); 6512 off_t locsize = loccount * sym_size; 6513 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 6514 locsize, true, true); 6515 6516 // For mapping symbol processing, we need to read the symbol names. 6517 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link()); 6518 if (strtab_shndx >= this->shnum()) 6519 { 6520 this->error(_("invalid symbol table name index: %u"), strtab_shndx); 6521 return; 6522 } 6523 6524 elfcpp::Shdr<32, big_endian> 6525 strtabshdr(this, this->elf_file()->section_header(strtab_shndx)); 6526 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB) 6527 { 6528 this->error(_("symbol table name section has wrong type: %u"), 6529 static_cast<unsigned int>(strtabshdr.get_sh_type())); 6530 return; 6531 } 6532 const char* pnames = 6533 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(), 6534 strtabshdr.get_sh_size(), 6535 false, false)); 6536 6537 // Loop over the local symbols and mark any local symbols pointing 6538 // to THUMB functions. 6539 6540 // Skip the first dummy symbol. 6541 psyms += sym_size; 6542 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values = 6543 this->local_values(); 6544 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 6545 { 6546 elfcpp::Sym<32, big_endian> sym(psyms); 6547 elfcpp::STT st_type = sym.get_st_type(); 6548 Symbol_value<32>& lv((*plocal_values)[i]); 6549 Arm_address input_value = lv.input_value(); 6550 6551 // Check to see if this is a mapping symbol. 6552 const char* sym_name = pnames + sym.get_st_name(); 6553 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name)) 6554 { 6555 bool is_ordinary; 6556 unsigned int input_shndx = 6557 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary); 6558 gold_assert(is_ordinary); 6559 6560 // Strip of LSB in case this is a THUMB symbol. 6561 Mapping_symbol_position msp(input_shndx, input_value & ~1U); 6562 this->mapping_symbols_info_[msp] = sym_name[1]; 6563 } 6564 6565 if (st_type == elfcpp::STT_ARM_TFUNC 6566 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0))) 6567 { 6568 // This is a THUMB function. Mark this and canonicalize the 6569 // symbol value by setting LSB. 6570 this->local_symbol_is_thumb_function_[i] = true; 6571 if ((input_value & 1) == 0) 6572 lv.set_input_value(input_value | 1); 6573 } 6574 } 6575 } 6576 6577 // Relocate sections. 6578 template<bool big_endian> 6579 void 6580 Arm_relobj<big_endian>::do_relocate_sections( 6581 const Symbol_table* symtab, 6582 const Layout* layout, 6583 const unsigned char* pshdrs, 6584 Output_file* of, 6585 typename Sized_relobj_file<32, big_endian>::Views* pviews) 6586 { 6587 // Call parent to relocate sections. 6588 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout, 6589 pshdrs, of, pviews); 6590 6591 // We do not generate stubs if doing a relocatable link. 6592 if (parameters->options().relocatable()) 6593 return; 6594 6595 // Relocate stub tables. 6596 unsigned int shnum = this->shnum(); 6597 6598 Target_arm<big_endian>* arm_target = 6599 Target_arm<big_endian>::default_target(); 6600 6601 Relocate_info<32, big_endian> relinfo; 6602 relinfo.symtab = symtab; 6603 relinfo.layout = layout; 6604 relinfo.object = this; 6605 6606 for (unsigned int i = 1; i < shnum; ++i) 6607 { 6608 Arm_input_section<big_endian>* arm_input_section = 6609 arm_target->find_arm_input_section(this, i); 6610 6611 if (arm_input_section != NULL 6612 && arm_input_section->is_stub_table_owner() 6613 && !arm_input_section->stub_table()->empty()) 6614 { 6615 // We cannot discard a section if it owns a stub table. 6616 Output_section* os = this->output_section(i); 6617 gold_assert(os != NULL); 6618 6619 relinfo.reloc_shndx = elfcpp::SHN_UNDEF; 6620 relinfo.reloc_shdr = NULL; 6621 relinfo.data_shndx = i; 6622 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size; 6623 6624 gold_assert((*pviews)[i].view != NULL); 6625 6626 // We are passed the output section view. Adjust it to cover the 6627 // stub table only. 6628 Stub_table<big_endian>* stub_table = arm_input_section->stub_table(); 6629 gold_assert((stub_table->address() >= (*pviews)[i].address) 6630 && ((stub_table->address() + stub_table->data_size()) 6631 <= (*pviews)[i].address + (*pviews)[i].view_size)); 6632 6633 off_t offset = stub_table->address() - (*pviews)[i].address; 6634 unsigned char* view = (*pviews)[i].view + offset; 6635 Arm_address address = stub_table->address(); 6636 section_size_type view_size = stub_table->data_size(); 6637 6638 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address, 6639 view_size); 6640 } 6641 6642 // Apply Cortex A8 workaround if applicable. 6643 if (this->section_has_cortex_a8_workaround(i)) 6644 { 6645 unsigned char* view = (*pviews)[i].view; 6646 Arm_address view_address = (*pviews)[i].address; 6647 section_size_type view_size = (*pviews)[i].view_size; 6648 Stub_table<big_endian>* stub_table = this->stub_tables_[i]; 6649 6650 // Adjust view to cover section. 6651 Output_section* os = this->output_section(i); 6652 gold_assert(os != NULL); 6653 Arm_address section_address = 6654 this->simple_input_section_output_address(i, os); 6655 uint64_t section_size = this->section_size(i); 6656 6657 gold_assert(section_address >= view_address 6658 && ((section_address + section_size) 6659 <= (view_address + view_size))); 6660 6661 unsigned char* section_view = view + (section_address - view_address); 6662 6663 // Apply the Cortex-A8 workaround to the output address range 6664 // corresponding to this input section. 6665 stub_table->apply_cortex_a8_workaround_to_address_range( 6666 arm_target, 6667 section_view, 6668 section_address, 6669 section_size); 6670 } 6671 } 6672 } 6673 6674 // Find the linked text section of an EXIDX section by looking at the first 6675 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section 6676 // must be linked to its associated code section via the sh_link field of 6677 // its section header. However, some tools are broken and the link is not 6678 // always set. LD just drops such an EXIDX section silently, causing the 6679 // associated code not unwindabled. Here we try a little bit harder to 6680 // discover the linked code section. 6681 // 6682 // PSHDR points to the section header of a relocation section of an EXIDX 6683 // section. If we can find a linked text section, return true and 6684 // store the text section index in the location PSHNDX. Otherwise 6685 // return false. 6686 6687 template<bool big_endian> 6688 bool 6689 Arm_relobj<big_endian>::find_linked_text_section( 6690 const unsigned char* pshdr, 6691 const unsigned char* psyms, 6692 unsigned int* pshndx) 6693 { 6694 elfcpp::Shdr<32, big_endian> shdr(pshdr); 6695 6696 // If there is no relocation, we cannot find the linked text section. 6697 size_t reloc_size; 6698 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6699 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6700 else 6701 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6702 size_t reloc_count = shdr.get_sh_size() / reloc_size; 6703 6704 // Get the relocations. 6705 const unsigned char* prelocs = 6706 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false); 6707 6708 // Find the REL31 relocation for the first word of the first EXIDX entry. 6709 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 6710 { 6711 Arm_address r_offset; 6712 typename elfcpp::Elf_types<32>::Elf_WXword r_info; 6713 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6714 { 6715 typename elfcpp::Rel<32, big_endian> reloc(prelocs); 6716 r_info = reloc.get_r_info(); 6717 r_offset = reloc.get_r_offset(); 6718 } 6719 else 6720 { 6721 typename elfcpp::Rela<32, big_endian> reloc(prelocs); 6722 r_info = reloc.get_r_info(); 6723 r_offset = reloc.get_r_offset(); 6724 } 6725 6726 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 6727 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31) 6728 continue; 6729 6730 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 6731 if (r_sym == 0 6732 || r_sym >= this->local_symbol_count() 6733 || r_offset != 0) 6734 continue; 6735 6736 // This is the relocation for the first word of the first EXIDX entry. 6737 // We expect to see a local section symbol. 6738 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 6739 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size); 6740 if (sym.get_st_type() == elfcpp::STT_SECTION) 6741 { 6742 bool is_ordinary; 6743 *pshndx = 6744 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary); 6745 gold_assert(is_ordinary); 6746 return true; 6747 } 6748 else 6749 return false; 6750 } 6751 6752 return false; 6753 } 6754 6755 // Make an EXIDX input section object for an EXIDX section whose index is 6756 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX 6757 // is the section index of the linked text section. 6758 6759 template<bool big_endian> 6760 void 6761 Arm_relobj<big_endian>::make_exidx_input_section( 6762 unsigned int shndx, 6763 const elfcpp::Shdr<32, big_endian>& shdr, 6764 unsigned int text_shndx, 6765 const elfcpp::Shdr<32, big_endian>& text_shdr) 6766 { 6767 // Create an Arm_exidx_input_section object for this EXIDX section. 6768 Arm_exidx_input_section* exidx_input_section = 6769 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(), 6770 shdr.get_sh_addralign(), 6771 text_shdr.get_sh_size()); 6772 6773 gold_assert(this->exidx_section_map_[shndx] == NULL); 6774 this->exidx_section_map_[shndx] = exidx_input_section; 6775 6776 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum()) 6777 { 6778 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"), 6779 this->section_name(shndx).c_str(), shndx, text_shndx, 6780 this->name().c_str()); 6781 exidx_input_section->set_has_errors(); 6782 } 6783 else if (this->exidx_section_map_[text_shndx] != NULL) 6784 { 6785 unsigned other_exidx_shndx = 6786 this->exidx_section_map_[text_shndx]->shndx(); 6787 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section" 6788 "%s(%u) in %s"), 6789 this->section_name(shndx).c_str(), shndx, 6790 this->section_name(other_exidx_shndx).c_str(), 6791 other_exidx_shndx, this->section_name(text_shndx).c_str(), 6792 text_shndx, this->name().c_str()); 6793 exidx_input_section->set_has_errors(); 6794 } 6795 else 6796 this->exidx_section_map_[text_shndx] = exidx_input_section; 6797 6798 // Check section flags of text section. 6799 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0) 6800 { 6801 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) " 6802 " in %s"), 6803 this->section_name(shndx).c_str(), shndx, 6804 this->section_name(text_shndx).c_str(), text_shndx, 6805 this->name().c_str()); 6806 exidx_input_section->set_has_errors(); 6807 } 6808 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0) 6809 // I would like to make this an error but currently ld just ignores 6810 // this. 6811 gold_warning(_("EXIDX section %s(%u) links to non-executable section " 6812 "%s(%u) in %s"), 6813 this->section_name(shndx).c_str(), shndx, 6814 this->section_name(text_shndx).c_str(), text_shndx, 6815 this->name().c_str()); 6816 } 6817 6818 // Read the symbol information. 6819 6820 template<bool big_endian> 6821 void 6822 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 6823 { 6824 // Call parent class to read symbol information. 6825 this->base_read_symbols(sd); 6826 6827 // If this input file is a binary file, it has no processor 6828 // specific flags and attributes section. 6829 Input_file::Format format = this->input_file()->format(); 6830 if (format != Input_file::FORMAT_ELF) 6831 { 6832 gold_assert(format == Input_file::FORMAT_BINARY); 6833 this->merge_flags_and_attributes_ = false; 6834 return; 6835 } 6836 6837 // Read processor-specific flags in ELF file header. 6838 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 6839 elfcpp::Elf_sizes<32>::ehdr_size, 6840 true, false); 6841 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 6842 this->processor_specific_flags_ = ehdr.get_e_flags(); 6843 6844 // Go over the section headers and look for .ARM.attributes and .ARM.exidx 6845 // sections. 6846 std::vector<unsigned int> deferred_exidx_sections; 6847 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6848 const unsigned char* pshdrs = sd->section_headers->data(); 6849 const unsigned char* ps = pshdrs + shdr_size; 6850 bool must_merge_flags_and_attributes = false; 6851 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6852 { 6853 elfcpp::Shdr<32, big_endian> shdr(ps); 6854 6855 // Sometimes an object has no contents except the section name string 6856 // table and an empty symbol table with the undefined symbol. We 6857 // don't want to merge processor-specific flags from such an object. 6858 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB) 6859 { 6860 // Symbol table is not empty. 6861 const elfcpp::Elf_types<32>::Elf_WXword sym_size = 6862 elfcpp::Elf_sizes<32>::sym_size; 6863 if (shdr.get_sh_size() > sym_size) 6864 must_merge_flags_and_attributes = true; 6865 } 6866 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB) 6867 // If this is neither an empty symbol table nor a string table, 6868 // be conservative. 6869 must_merge_flags_and_attributes = true; 6870 6871 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 6872 { 6873 gold_assert(this->attributes_section_data_ == NULL); 6874 section_offset_type section_offset = shdr.get_sh_offset(); 6875 section_size_type section_size = 6876 convert_to_section_size_type(shdr.get_sh_size()); 6877 const unsigned char* view = 6878 this->get_view(section_offset, section_size, true, false); 6879 this->attributes_section_data_ = 6880 new Attributes_section_data(view, section_size); 6881 } 6882 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 6883 { 6884 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 6885 if (text_shndx == elfcpp::SHN_UNDEF) 6886 deferred_exidx_sections.push_back(i); 6887 else 6888 { 6889 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 6890 + text_shndx * shdr_size); 6891 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr); 6892 } 6893 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set. 6894 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0) 6895 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"), 6896 this->section_name(i).c_str(), this->name().c_str()); 6897 } 6898 } 6899 6900 // This is rare. 6901 if (!must_merge_flags_and_attributes) 6902 { 6903 gold_assert(deferred_exidx_sections.empty()); 6904 this->merge_flags_and_attributes_ = false; 6905 return; 6906 } 6907 6908 // Some tools are broken and they do not set the link of EXIDX sections. 6909 // We look at the first relocation to figure out the linked sections. 6910 if (!deferred_exidx_sections.empty()) 6911 { 6912 // We need to go over the section headers again to find the mapping 6913 // from sections being relocated to their relocation sections. This is 6914 // a bit inefficient as we could do that in the loop above. However, 6915 // we do not expect any deferred EXIDX sections normally. So we do not 6916 // want to slow down the most common path. 6917 typedef Unordered_map<unsigned int, unsigned int> Reloc_map; 6918 Reloc_map reloc_map; 6919 ps = pshdrs + shdr_size; 6920 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6921 { 6922 elfcpp::Shdr<32, big_endian> shdr(ps); 6923 elfcpp::Elf_Word sh_type = shdr.get_sh_type(); 6924 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA) 6925 { 6926 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info()); 6927 if (info_shndx >= this->shnum()) 6928 gold_error(_("relocation section %u has invalid info %u"), 6929 i, info_shndx); 6930 Reloc_map::value_type value(info_shndx, i); 6931 std::pair<Reloc_map::iterator, bool> result = 6932 reloc_map.insert(value); 6933 if (!result.second) 6934 gold_error(_("section %u has multiple relocation sections " 6935 "%u and %u"), 6936 info_shndx, i, reloc_map[info_shndx]); 6937 } 6938 } 6939 6940 // Read the symbol table section header. 6941 const unsigned int symtab_shndx = this->symtab_shndx(); 6942 elfcpp::Shdr<32, big_endian> 6943 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 6944 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 6945 6946 // Read the local symbols. 6947 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 6948 const unsigned int loccount = this->local_symbol_count(); 6949 gold_assert(loccount == symtabshdr.get_sh_info()); 6950 off_t locsize = loccount * sym_size; 6951 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 6952 locsize, true, true); 6953 6954 // Process the deferred EXIDX sections. 6955 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i) 6956 { 6957 unsigned int shndx = deferred_exidx_sections[i]; 6958 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size); 6959 unsigned int text_shndx = elfcpp::SHN_UNDEF; 6960 Reloc_map::const_iterator it = reloc_map.find(shndx); 6961 if (it != reloc_map.end()) 6962 find_linked_text_section(pshdrs + it->second * shdr_size, 6963 psyms, &text_shndx); 6964 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 6965 + text_shndx * shdr_size); 6966 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr); 6967 } 6968 } 6969 } 6970 6971 // Process relocations for garbage collection. The ARM target uses .ARM.exidx 6972 // sections for unwinding. These sections are referenced implicitly by 6973 // text sections linked in the section headers. If we ignore these implicit 6974 // references, the .ARM.exidx sections and any .ARM.extab sections they use 6975 // will be garbage-collected incorrectly. Hence we override the same function 6976 // in the base class to handle these implicit references. 6977 6978 template<bool big_endian> 6979 void 6980 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab, 6981 Layout* layout, 6982 Read_relocs_data* rd) 6983 { 6984 // First, call base class method to process relocations in this object. 6985 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); 6986 6987 // If --gc-sections is not specified, there is nothing more to do. 6988 // This happens when --icf is used but --gc-sections is not. 6989 if (!parameters->options().gc_sections()) 6990 return; 6991 6992 unsigned int shnum = this->shnum(); 6993 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6994 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 6995 shnum * shdr_size, 6996 true, true); 6997 6998 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references 6999 // to these from the linked text sections. 7000 const unsigned char* ps = pshdrs + shdr_size; 7001 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size) 7002 { 7003 elfcpp::Shdr<32, big_endian> shdr(ps); 7004 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 7005 { 7006 // Found an .ARM.exidx section, add it to the set of reachable 7007 // sections from its linked text section. 7008 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 7009 symtab->gc()->add_reference(this, text_shndx, this, i); 7010 } 7011 } 7012 } 7013 7014 // Update output local symbol count. Owing to EXIDX entry merging, some local 7015 // symbols will be removed in output. Adjust output local symbol count 7016 // accordingly. We can only changed the static output local symbol count. It 7017 // is too late to change the dynamic symbols. 7018 7019 template<bool big_endian> 7020 void 7021 Arm_relobj<big_endian>::update_output_local_symbol_count() 7022 { 7023 // Caller should check that this needs updating. We want caller checking 7024 // because output_local_symbol_count_needs_update() is most likely inlined. 7025 gold_assert(this->output_local_symbol_count_needs_update_); 7026 7027 gold_assert(this->symtab_shndx() != -1U); 7028 if (this->symtab_shndx() == 0) 7029 { 7030 // This object has no symbols. Weird but legal. 7031 return; 7032 } 7033 7034 // Read the symbol table section header. 7035 const unsigned int symtab_shndx = this->symtab_shndx(); 7036 elfcpp::Shdr<32, big_endian> 7037 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 7038 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 7039 7040 // Read the local symbols. 7041 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 7042 const unsigned int loccount = this->local_symbol_count(); 7043 gold_assert(loccount == symtabshdr.get_sh_info()); 7044 off_t locsize = loccount * sym_size; 7045 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 7046 locsize, true, true); 7047 7048 // Loop over the local symbols. 7049 7050 typedef typename Sized_relobj_file<32, big_endian>::Output_sections 7051 Output_sections; 7052 const Output_sections& out_sections(this->output_sections()); 7053 unsigned int shnum = this->shnum(); 7054 unsigned int count = 0; 7055 // Skip the first, dummy, symbol. 7056 psyms += sym_size; 7057 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 7058 { 7059 elfcpp::Sym<32, big_endian> sym(psyms); 7060 7061 Symbol_value<32>& lv((*this->local_values())[i]); 7062 7063 // This local symbol was already discarded by do_count_local_symbols. 7064 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry()) 7065 continue; 7066 7067 bool is_ordinary; 7068 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(), 7069 &is_ordinary); 7070 7071 if (shndx < shnum) 7072 { 7073 Output_section* os = out_sections[shndx]; 7074 7075 // This local symbol no longer has an output section. Discard it. 7076 if (os == NULL) 7077 { 7078 lv.set_no_output_symtab_entry(); 7079 continue; 7080 } 7081 7082 // Currently we only discard parts of EXIDX input sections. 7083 // We explicitly check for a merged EXIDX input section to avoid 7084 // calling Output_section_data::output_offset unless necessary. 7085 if ((this->get_output_section_offset(shndx) == invalid_address) 7086 && (this->exidx_input_section_by_shndx(shndx) != NULL)) 7087 { 7088 section_offset_type output_offset = 7089 os->output_offset(this, shndx, lv.input_value()); 7090 if (output_offset == -1) 7091 { 7092 // This symbol is defined in a part of an EXIDX input section 7093 // that is discarded due to entry merging. 7094 lv.set_no_output_symtab_entry(); 7095 continue; 7096 } 7097 } 7098 } 7099 7100 ++count; 7101 } 7102 7103 this->set_output_local_symbol_count(count); 7104 this->output_local_symbol_count_needs_update_ = false; 7105 } 7106 7107 // Arm_dynobj methods. 7108 7109 // Read the symbol information. 7110 7111 template<bool big_endian> 7112 void 7113 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 7114 { 7115 // Call parent class to read symbol information. 7116 this->base_read_symbols(sd); 7117 7118 // Read processor-specific flags in ELF file header. 7119 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 7120 elfcpp::Elf_sizes<32>::ehdr_size, 7121 true, false); 7122 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 7123 this->processor_specific_flags_ = ehdr.get_e_flags(); 7124 7125 // Read the attributes section if there is one. 7126 // We read from the end because gas seems to put it near the end of 7127 // the section headers. 7128 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 7129 const unsigned char* ps = 7130 sd->section_headers->data() + shdr_size * (this->shnum() - 1); 7131 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size) 7132 { 7133 elfcpp::Shdr<32, big_endian> shdr(ps); 7134 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 7135 { 7136 section_offset_type section_offset = shdr.get_sh_offset(); 7137 section_size_type section_size = 7138 convert_to_section_size_type(shdr.get_sh_size()); 7139 const unsigned char* view = 7140 this->get_view(section_offset, section_size, true, false); 7141 this->attributes_section_data_ = 7142 new Attributes_section_data(view, section_size); 7143 break; 7144 } 7145 } 7146 } 7147 7148 // Stub_addend_reader methods. 7149 7150 // Read the addend of a REL relocation of type R_TYPE at VIEW. 7151 7152 template<bool big_endian> 7153 elfcpp::Elf_types<32>::Elf_Swxword 7154 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()( 7155 unsigned int r_type, 7156 const unsigned char* view, 7157 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const 7158 { 7159 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 7160 7161 switch (r_type) 7162 { 7163 case elfcpp::R_ARM_CALL: 7164 case elfcpp::R_ARM_JUMP24: 7165 case elfcpp::R_ARM_PLT32: 7166 { 7167 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7168 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7169 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 7170 return Bits<26>::sign_extend32(val << 2); 7171 } 7172 7173 case elfcpp::R_ARM_THM_CALL: 7174 case elfcpp::R_ARM_THM_JUMP24: 7175 case elfcpp::R_ARM_THM_XPC22: 7176 { 7177 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7178 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7179 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7180 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7181 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn); 7182 } 7183 7184 case elfcpp::R_ARM_THM_JUMP19: 7185 { 7186 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7187 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7188 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7189 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7190 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn); 7191 } 7192 7193 default: 7194 gold_unreachable(); 7195 } 7196 } 7197 7198 // Arm_output_data_got methods. 7199 7200 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 7201 // The first one is initialized to be 1, which is the module index for 7202 // the main executable and the second one 0. A reloc of the type 7203 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 7204 // be applied by gold. GSYM is a global symbol. 7205 // 7206 template<bool big_endian> 7207 void 7208 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7209 unsigned int got_type, 7210 Symbol* gsym) 7211 { 7212 if (gsym->has_got_offset(got_type)) 7213 return; 7214 7215 // We are doing a static link. Just mark it as belong to module 1, 7216 // the executable. 7217 unsigned int got_offset = this->add_constant(1); 7218 gsym->set_got_offset(got_type, got_offset); 7219 got_offset = this->add_constant(0); 7220 this->static_relocs_.push_back(Static_reloc(got_offset, 7221 elfcpp::R_ARM_TLS_DTPOFF32, 7222 gsym)); 7223 } 7224 7225 // Same as the above but for a local symbol. 7226 7227 template<bool big_endian> 7228 void 7229 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7230 unsigned int got_type, 7231 Sized_relobj_file<32, big_endian>* object, 7232 unsigned int index) 7233 { 7234 if (object->local_has_got_offset(index, got_type)) 7235 return; 7236 7237 // We are doing a static link. Just mark it as belong to module 1, 7238 // the executable. 7239 unsigned int got_offset = this->add_constant(1); 7240 object->set_local_got_offset(index, got_type, got_offset); 7241 got_offset = this->add_constant(0); 7242 this->static_relocs_.push_back(Static_reloc(got_offset, 7243 elfcpp::R_ARM_TLS_DTPOFF32, 7244 object, index)); 7245 } 7246 7247 template<bool big_endian> 7248 void 7249 Arm_output_data_got<big_endian>::do_write(Output_file* of) 7250 { 7251 // Call parent to write out GOT. 7252 Output_data_got<32, big_endian>::do_write(of); 7253 7254 // We are done if there is no fix up. 7255 if (this->static_relocs_.empty()) 7256 return; 7257 7258 gold_assert(parameters->doing_static_link()); 7259 7260 const off_t offset = this->offset(); 7261 const section_size_type oview_size = 7262 convert_to_section_size_type(this->data_size()); 7263 unsigned char* const oview = of->get_output_view(offset, oview_size); 7264 7265 Output_segment* tls_segment = this->layout_->tls_segment(); 7266 gold_assert(tls_segment != NULL); 7267 7268 // The thread pointer $tp points to the TCB, which is followed by the 7269 // TLS. So we need to adjust $tp relative addressing by this amount. 7270 Arm_address aligned_tcb_size = 7271 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 7272 7273 for (size_t i = 0; i < this->static_relocs_.size(); ++i) 7274 { 7275 Static_reloc& reloc(this->static_relocs_[i]); 7276 7277 Arm_address value; 7278 if (!reloc.symbol_is_global()) 7279 { 7280 Sized_relobj_file<32, big_endian>* object = reloc.relobj(); 7281 const Symbol_value<32>* psymval = 7282 reloc.relobj()->local_symbol(reloc.index()); 7283 7284 // We are doing static linking. Issue an error and skip this 7285 // relocation if the symbol is undefined or in a discarded_section. 7286 bool is_ordinary; 7287 unsigned int shndx = psymval->input_shndx(&is_ordinary); 7288 if ((shndx == elfcpp::SHN_UNDEF) 7289 || (is_ordinary 7290 && shndx != elfcpp::SHN_UNDEF 7291 && !object->is_section_included(shndx) 7292 && !this->symbol_table_->is_section_folded(object, shndx))) 7293 { 7294 gold_error(_("undefined or discarded local symbol %u from " 7295 " object %s in GOT"), 7296 reloc.index(), reloc.relobj()->name().c_str()); 7297 continue; 7298 } 7299 7300 value = psymval->value(object, 0); 7301 } 7302 else 7303 { 7304 const Symbol* gsym = reloc.symbol(); 7305 gold_assert(gsym != NULL); 7306 if (gsym->is_forwarder()) 7307 gsym = this->symbol_table_->resolve_forwards(gsym); 7308 7309 // We are doing static linking. Issue an error and skip this 7310 // relocation if the symbol is undefined or in a discarded_section 7311 // unless it is a weakly_undefined symbol. 7312 if ((gsym->is_defined_in_discarded_section() 7313 || gsym->is_undefined()) 7314 && !gsym->is_weak_undefined()) 7315 { 7316 gold_error(_("undefined or discarded symbol %s in GOT"), 7317 gsym->name()); 7318 continue; 7319 } 7320 7321 if (!gsym->is_weak_undefined()) 7322 { 7323 const Sized_symbol<32>* sym = 7324 static_cast<const Sized_symbol<32>*>(gsym); 7325 value = sym->value(); 7326 } 7327 else 7328 value = 0; 7329 } 7330 7331 unsigned got_offset = reloc.got_offset(); 7332 gold_assert(got_offset < oview_size); 7333 7334 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7335 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset); 7336 Valtype x; 7337 switch (reloc.r_type()) 7338 { 7339 case elfcpp::R_ARM_TLS_DTPOFF32: 7340 x = value; 7341 break; 7342 case elfcpp::R_ARM_TLS_TPOFF32: 7343 x = value + aligned_tcb_size; 7344 break; 7345 default: 7346 gold_unreachable(); 7347 } 7348 elfcpp::Swap<32, big_endian>::writeval(wv, x); 7349 } 7350 7351 of->write_output_view(offset, oview_size, oview); 7352 } 7353 7354 // A class to handle the PLT data. 7355 // This is an abstract base class that handles most of the linker details 7356 // but does not know the actual contents of PLT entries. The derived 7357 // classes below fill in those details. 7358 7359 template<bool big_endian> 7360 class Output_data_plt_arm : public Output_section_data 7361 { 7362 public: 7363 // Unlike aarch64, which records symbol value in "addend" field of relocations 7364 // and could be done at the same time an IRelative reloc is created for the 7365 // symbol, arm puts the symbol value into "GOT" table, which, however, is 7366 // issued later in Output_data_plt_arm::do_write(). So we have a struct here 7367 // to keep necessary symbol information for later use in do_write. We usually 7368 // have only a very limited number of ifuncs, so the extra data required here 7369 // is also limited. 7370 7371 struct IRelative_data 7372 { 7373 IRelative_data(Sized_symbol<32>* sized_symbol) 7374 : symbol_is_global_(true) 7375 { 7376 u_.global = sized_symbol; 7377 } 7378 7379 IRelative_data(Sized_relobj_file<32, big_endian>* relobj, 7380 unsigned int index) 7381 : symbol_is_global_(false) 7382 { 7383 u_.local.relobj = relobj; 7384 u_.local.index = index; 7385 } 7386 7387 union 7388 { 7389 Sized_symbol<32>* global; 7390 7391 struct 7392 { 7393 Sized_relobj_file<32, big_endian>* relobj; 7394 unsigned int index; 7395 } local; 7396 } u_; 7397 7398 bool symbol_is_global_; 7399 }; 7400 7401 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 7402 Reloc_section; 7403 7404 Output_data_plt_arm(Layout* layout, uint64_t addralign, 7405 Arm_output_data_got<big_endian>* got, 7406 Output_data_space* got_plt, 7407 Output_data_space* got_irelative); 7408 7409 // Add an entry to the PLT. 7410 void 7411 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym); 7412 7413 // Add the relocation for a plt entry. 7414 void 7415 add_relocation(Symbol_table* symtab, Layout* layout, 7416 Symbol* gsym, unsigned int got_offset); 7417 7418 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. 7419 unsigned int 7420 add_local_ifunc_entry(Symbol_table* symtab, Layout*, 7421 Sized_relobj_file<32, big_endian>* relobj, 7422 unsigned int local_sym_index); 7423 7424 // Return the .rel.plt section data. 7425 const Reloc_section* 7426 rel_plt() const 7427 { return this->rel_; } 7428 7429 // Return the PLT relocation container for IRELATIVE. 7430 Reloc_section* 7431 rel_irelative(Symbol_table*, Layout*); 7432 7433 // Return the number of PLT entries. 7434 unsigned int 7435 entry_count() const 7436 { return this->count_ + this->irelative_count_; } 7437 7438 // Return the offset of the first non-reserved PLT entry. 7439 unsigned int 7440 first_plt_entry_offset() const 7441 { return this->do_first_plt_entry_offset(); } 7442 7443 // Return the size of a PLT entry. 7444 unsigned int 7445 get_plt_entry_size() const 7446 { return this->do_get_plt_entry_size(); } 7447 7448 // Return the PLT address for globals. 7449 uint32_t 7450 address_for_global(const Symbol*) const; 7451 7452 // Return the PLT address for locals. 7453 uint32_t 7454 address_for_local(const Relobj*, unsigned int symndx) const; 7455 7456 protected: 7457 // Fill in the first PLT entry. 7458 void 7459 fill_first_plt_entry(unsigned char* pov, 7460 Arm_address got_address, 7461 Arm_address plt_address) 7462 { this->do_fill_first_plt_entry(pov, got_address, plt_address); } 7463 7464 void 7465 fill_plt_entry(unsigned char* pov, 7466 Arm_address got_address, 7467 Arm_address plt_address, 7468 unsigned int got_offset, 7469 unsigned int plt_offset) 7470 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); } 7471 7472 virtual unsigned int 7473 do_first_plt_entry_offset() const = 0; 7474 7475 virtual unsigned int 7476 do_get_plt_entry_size() const = 0; 7477 7478 virtual void 7479 do_fill_first_plt_entry(unsigned char* pov, 7480 Arm_address got_address, 7481 Arm_address plt_address) = 0; 7482 7483 virtual void 7484 do_fill_plt_entry(unsigned char* pov, 7485 Arm_address got_address, 7486 Arm_address plt_address, 7487 unsigned int got_offset, 7488 unsigned int plt_offset) = 0; 7489 7490 void 7491 do_adjust_output_section(Output_section* os); 7492 7493 // Write to a map file. 7494 void 7495 do_print_to_mapfile(Mapfile* mapfile) const 7496 { mapfile->print_output_data(this, _("** PLT")); } 7497 7498 private: 7499 // Set the final size. 7500 void 7501 set_final_data_size() 7502 { 7503 this->set_data_size(this->first_plt_entry_offset() 7504 + ((this->count_ + this->irelative_count_) 7505 * this->get_plt_entry_size())); 7506 } 7507 7508 // Write out the PLT data. 7509 void 7510 do_write(Output_file*); 7511 7512 // Record irelative symbol data. 7513 void insert_irelative_data(const IRelative_data& idata) 7514 { irelative_data_vec_.push_back(idata); } 7515 7516 // The reloc section. 7517 Reloc_section* rel_; 7518 // The IRELATIVE relocs, if necessary. These must follow the 7519 // regular PLT relocations. 7520 Reloc_section* irelative_rel_; 7521 // The .got section. 7522 Arm_output_data_got<big_endian>* got_; 7523 // The .got.plt section. 7524 Output_data_space* got_plt_; 7525 // The part of the .got.plt section used for IRELATIVE relocs. 7526 Output_data_space* got_irelative_; 7527 // The number of PLT entries. 7528 unsigned int count_; 7529 // Number of PLT entries with R_ARM_IRELATIVE relocs. These 7530 // follow the regular PLT entries. 7531 unsigned int irelative_count_; 7532 // Vector for irelative data. 7533 typedef std::vector<IRelative_data> IRelative_data_vec; 7534 IRelative_data_vec irelative_data_vec_; 7535 }; 7536 7537 // Create the PLT section. The ordinary .got section is an argument, 7538 // since we need to refer to the start. We also create our own .got 7539 // section just for PLT entries. 7540 7541 template<bool big_endian> 7542 Output_data_plt_arm<big_endian>::Output_data_plt_arm( 7543 Layout* layout, uint64_t addralign, 7544 Arm_output_data_got<big_endian>* got, 7545 Output_data_space* got_plt, 7546 Output_data_space* got_irelative) 7547 : Output_section_data(addralign), irelative_rel_(NULL), 7548 got_(got), got_plt_(got_plt), got_irelative_(got_irelative), 7549 count_(0), irelative_count_(0) 7550 { 7551 this->rel_ = new Reloc_section(false); 7552 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, 7553 elfcpp::SHF_ALLOC, this->rel_, 7554 ORDER_DYNAMIC_PLT_RELOCS, false); 7555 } 7556 7557 template<bool big_endian> 7558 void 7559 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os) 7560 { 7561 os->set_entsize(0); 7562 } 7563 7564 // Add an entry to the PLT. 7565 7566 template<bool big_endian> 7567 void 7568 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab, 7569 Layout* layout, 7570 Symbol* gsym) 7571 { 7572 gold_assert(!gsym->has_plt_offset()); 7573 7574 unsigned int* entry_count; 7575 Output_section_data_build* got; 7576 7577 // We have 2 different types of plt entry here, normal and ifunc. 7578 7579 // For normal plt, the offset begins with first_plt_entry_offset(20), and the 7580 // 1st entry offset would be 20, the second 32, third 44 ... etc. 7581 7582 // For ifunc plt, the offset begins with 0. So the first offset would 0, 7583 // second 12, third 24 ... etc. 7584 7585 // IFunc plt entries *always* come after *normal* plt entries. 7586 7587 // Notice, when computing the plt address of a certain symbol, "plt_address + 7588 // plt_offset" is no longer correct. Use target->plt_address_for_global() or 7589 // target->plt_address_for_local() instead. 7590 7591 int begin_offset = 0; 7592 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7593 && gsym->can_use_relative_reloc(false)) 7594 { 7595 entry_count = &this->irelative_count_; 7596 got = this->got_irelative_; 7597 // For irelative plt entries, offset is relative to the end of normal plt 7598 // entries, so it starts from 0. 7599 begin_offset = 0; 7600 // Record symbol information. 7601 this->insert_irelative_data( 7602 IRelative_data(symtab->get_sized_symbol<32>(gsym))); 7603 } 7604 else 7605 { 7606 entry_count = &this->count_; 7607 got = this->got_plt_; 7608 // Note that for normal plt entries, when setting the PLT offset we skip 7609 // the initial reserved PLT entry. 7610 begin_offset = this->first_plt_entry_offset(); 7611 } 7612 7613 gsym->set_plt_offset(begin_offset 7614 + (*entry_count) * this->get_plt_entry_size()); 7615 7616 ++(*entry_count); 7617 7618 section_offset_type got_offset = got->current_data_size(); 7619 7620 // Every PLT entry needs a GOT entry which points back to the PLT 7621 // entry (this will be changed by the dynamic linker, normally 7622 // lazily when the function is called). 7623 got->set_current_data_size(got_offset + 4); 7624 7625 // Every PLT entry needs a reloc. 7626 this->add_relocation(symtab, layout, gsym, got_offset); 7627 7628 // Note that we don't need to save the symbol. The contents of the 7629 // PLT are independent of which symbols are used. The symbols only 7630 // appear in the relocations. 7631 } 7632 7633 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return 7634 // the PLT offset. 7635 7636 template<bool big_endian> 7637 unsigned int 7638 Output_data_plt_arm<big_endian>::add_local_ifunc_entry( 7639 Symbol_table* symtab, 7640 Layout* layout, 7641 Sized_relobj_file<32, big_endian>* relobj, 7642 unsigned int local_sym_index) 7643 { 7644 this->insert_irelative_data(IRelative_data(relobj, local_sym_index)); 7645 7646 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is 7647 // no longer correct. Use target->plt_address_for_local() instead. 7648 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size(); 7649 ++this->irelative_count_; 7650 7651 section_offset_type got_offset = this->got_irelative_->current_data_size(); 7652 7653 // Every PLT entry needs a GOT entry which points back to the PLT 7654 // entry. 7655 this->got_irelative_->set_current_data_size(got_offset + 4); 7656 7657 7658 // Every PLT entry needs a reloc. 7659 Reloc_section* rel = this->rel_irelative(symtab, layout); 7660 rel->add_symbolless_local_addend(relobj, local_sym_index, 7661 elfcpp::R_ARM_IRELATIVE, 7662 this->got_irelative_, got_offset); 7663 return plt_offset; 7664 } 7665 7666 7667 // Add the relocation for a PLT entry. 7668 7669 template<bool big_endian> 7670 void 7671 Output_data_plt_arm<big_endian>::add_relocation( 7672 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset) 7673 { 7674 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7675 && gsym->can_use_relative_reloc(false)) 7676 { 7677 Reloc_section* rel = this->rel_irelative(symtab, layout); 7678 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE, 7679 this->got_irelative_, got_offset); 7680 } 7681 else 7682 { 7683 gsym->set_needs_dynsym_entry(); 7684 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_, 7685 got_offset); 7686 } 7687 } 7688 7689 7690 // Create the irelative relocation data. 7691 7692 template<bool big_endian> 7693 typename Output_data_plt_arm<big_endian>::Reloc_section* 7694 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab, 7695 Layout* layout) 7696 { 7697 if (this->irelative_rel_ == NULL) 7698 { 7699 // Since irelative relocations goes into 'rel.dyn', we delegate the 7700 // creation of irelative_rel_ to where rel_dyn section gets created. 7701 Target_arm<big_endian>* arm_target = 7702 Target_arm<big_endian>::default_target(); 7703 this->irelative_rel_ = arm_target->rel_irelative_section(layout); 7704 7705 // Make sure we have a place for the TLSDESC relocations, in 7706 // case we see any later on. 7707 // this->rel_tlsdesc(layout); 7708 if (parameters->doing_static_link()) 7709 { 7710 // A statically linked executable will only have a .rel.plt section to 7711 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library 7712 // will use these symbols to locate the IRELATIVE relocs at program 7713 // startup time. 7714 symtab->define_in_output_data("__rel_iplt_start", NULL, 7715 Symbol_table::PREDEFINED, 7716 this->irelative_rel_, 0, 0, 7717 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7718 elfcpp::STV_HIDDEN, 0, false, true); 7719 symtab->define_in_output_data("__rel_iplt_end", NULL, 7720 Symbol_table::PREDEFINED, 7721 this->irelative_rel_, 0, 0, 7722 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7723 elfcpp::STV_HIDDEN, 0, true, true); 7724 } 7725 } 7726 return this->irelative_rel_; 7727 } 7728 7729 7730 // Return the PLT address for a global symbol. 7731 7732 template<bool big_endian> 7733 uint32_t 7734 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const 7735 { 7736 uint64_t begin_offset = 0; 7737 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7738 && gsym->can_use_relative_reloc(false)) 7739 { 7740 begin_offset = (this->first_plt_entry_offset() + 7741 this->count_ * this->get_plt_entry_size()); 7742 } 7743 return this->address() + begin_offset + gsym->plt_offset(); 7744 } 7745 7746 7747 // Return the PLT address for a local symbol. These are always 7748 // IRELATIVE relocs. 7749 7750 template<bool big_endian> 7751 uint32_t 7752 Output_data_plt_arm<big_endian>::address_for_local( 7753 const Relobj* object, 7754 unsigned int r_sym) const 7755 { 7756 return (this->address() 7757 + this->first_plt_entry_offset() 7758 + this->count_ * this->get_plt_entry_size() 7759 + object->local_plt_offset(r_sym)); 7760 } 7761 7762 7763 template<bool big_endian> 7764 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian> 7765 { 7766 public: 7767 Output_data_plt_arm_standard(Layout* layout, 7768 Arm_output_data_got<big_endian>* got, 7769 Output_data_space* got_plt, 7770 Output_data_space* got_irelative) 7771 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative) 7772 { } 7773 7774 protected: 7775 // Return the offset of the first non-reserved PLT entry. 7776 virtual unsigned int 7777 do_first_plt_entry_offset() const 7778 { return sizeof(first_plt_entry); } 7779 7780 // Return the size of a PLT entry. 7781 virtual unsigned int 7782 do_get_plt_entry_size() const 7783 { return sizeof(plt_entry); } 7784 7785 virtual void 7786 do_fill_first_plt_entry(unsigned char* pov, 7787 Arm_address got_address, 7788 Arm_address plt_address); 7789 7790 virtual void 7791 do_fill_plt_entry(unsigned char* pov, 7792 Arm_address got_address, 7793 Arm_address plt_address, 7794 unsigned int got_offset, 7795 unsigned int plt_offset); 7796 7797 private: 7798 // Template for the first PLT entry. 7799 static const uint32_t first_plt_entry[5]; 7800 7801 // Template for subsequent PLT entries. 7802 static const uint32_t plt_entry[3]; 7803 }; 7804 7805 // ARM PLTs. 7806 // FIXME: This is not very flexible. Right now this has only been tested 7807 // on armv5te. If we are to support additional architecture features like 7808 // Thumb-2 or BE8, we need to make this more flexible like GNU ld. 7809 7810 // The first entry in the PLT. 7811 template<bool big_endian> 7812 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] = 7813 { 7814 0xe52de004, // str lr, [sp, #-4]! 7815 0xe59fe004, // ldr lr, [pc, #4] 7816 0xe08fe00e, // add lr, pc, lr 7817 0xe5bef008, // ldr pc, [lr, #8]! 7818 0x00000000, // &GOT[0] - . 7819 }; 7820 7821 template<bool big_endian> 7822 void 7823 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry( 7824 unsigned char* pov, 7825 Arm_address got_address, 7826 Arm_address plt_address) 7827 { 7828 // Write first PLT entry. All but the last word are constants. 7829 const size_t num_first_plt_words = (sizeof(first_plt_entry) 7830 / sizeof(plt_entry[0])); 7831 for (size_t i = 0; i < num_first_plt_words - 1; i++) 7832 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); 7833 // Last word in first PLT entry is &GOT[0] - . 7834 elfcpp::Swap<32, big_endian>::writeval(pov + 16, 7835 got_address - (plt_address + 16)); 7836 } 7837 7838 // Subsequent entries in the PLT. 7839 7840 template<bool big_endian> 7841 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] = 7842 { 7843 0xe28fc600, // add ip, pc, #0xNN00000 7844 0xe28cca00, // add ip, ip, #0xNN000 7845 0xe5bcf000, // ldr pc, [ip, #0xNNN]! 7846 }; 7847 7848 template<bool big_endian> 7849 void 7850 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry( 7851 unsigned char* pov, 7852 Arm_address got_address, 7853 Arm_address plt_address, 7854 unsigned int got_offset, 7855 unsigned int plt_offset) 7856 { 7857 int32_t offset = ((got_address + got_offset) 7858 - (plt_address + plt_offset + 8)); 7859 7860 gold_assert(offset >= 0 && offset < 0x0fffffff); 7861 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); 7862 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); 7863 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); 7864 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); 7865 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); 7866 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); 7867 } 7868 7869 // Write out the PLT. This uses the hand-coded instructions above, 7870 // and adjusts them as needed. This is all specified by the arm ELF 7871 // Processor Supplement. 7872 7873 template<bool big_endian> 7874 void 7875 Output_data_plt_arm<big_endian>::do_write(Output_file* of) 7876 { 7877 const off_t offset = this->offset(); 7878 const section_size_type oview_size = 7879 convert_to_section_size_type(this->data_size()); 7880 unsigned char* const oview = of->get_output_view(offset, oview_size); 7881 7882 const off_t got_file_offset = this->got_plt_->offset(); 7883 gold_assert(got_file_offset + this->got_plt_->data_size() 7884 == this->got_irelative_->offset()); 7885 const section_size_type got_size = 7886 convert_to_section_size_type(this->got_plt_->data_size() 7887 + this->got_irelative_->data_size()); 7888 unsigned char* const got_view = of->get_output_view(got_file_offset, 7889 got_size); 7890 unsigned char* pov = oview; 7891 7892 Arm_address plt_address = this->address(); 7893 Arm_address got_address = this->got_plt_->address(); 7894 7895 // Write first PLT entry. 7896 this->fill_first_plt_entry(pov, got_address, plt_address); 7897 pov += this->first_plt_entry_offset(); 7898 7899 unsigned char* got_pov = got_view; 7900 7901 memset(got_pov, 0, 12); 7902 got_pov += 12; 7903 7904 unsigned int plt_offset = this->first_plt_entry_offset(); 7905 unsigned int got_offset = 12; 7906 const unsigned int count = this->count_ + this->irelative_count_; 7907 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size()); 7908 for (unsigned int i = 0; 7909 i < count; 7910 ++i, 7911 pov += this->get_plt_entry_size(), 7912 got_pov += 4, 7913 plt_offset += this->get_plt_entry_size(), 7914 got_offset += 4) 7915 { 7916 // Set and adjust the PLT entry itself. 7917 this->fill_plt_entry(pov, got_address, plt_address, 7918 got_offset, plt_offset); 7919 7920 Arm_address value; 7921 if (i < this->count_) 7922 { 7923 // For non-irelative got entries, the value is the beginning of plt. 7924 value = plt_address; 7925 } 7926 else 7927 { 7928 // For irelative got entries, the value is the (global/local) symbol 7929 // address. 7930 const IRelative_data& idata = 7931 this->irelative_data_vec_[i - this->count_]; 7932 if (idata.symbol_is_global_) 7933 { 7934 // Set the entry in the GOT for irelative symbols. The content is 7935 // the address of the ifunc, not the address of plt start. 7936 const Sized_symbol<32>* sized_symbol = idata.u_.global; 7937 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC); 7938 value = sized_symbol->value(); 7939 } 7940 else 7941 { 7942 value = idata.u_.local.relobj->local_symbol_value( 7943 idata.u_.local.index, 0); 7944 } 7945 } 7946 elfcpp::Swap<32, big_endian>::writeval(got_pov, value); 7947 } 7948 7949 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size); 7950 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size); 7951 7952 of->write_output_view(offset, oview_size, oview); 7953 of->write_output_view(got_file_offset, got_size, got_view); 7954 } 7955 7956 7957 // Create a PLT entry for a global symbol. 7958 7959 template<bool big_endian> 7960 void 7961 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout, 7962 Symbol* gsym) 7963 { 7964 if (gsym->has_plt_offset()) 7965 return; 7966 7967 if (this->plt_ == NULL) 7968 this->make_plt_section(symtab, layout); 7969 7970 this->plt_->add_entry(symtab, layout, gsym); 7971 } 7972 7973 7974 // Create the PLT section. 7975 template<bool big_endian> 7976 void 7977 Target_arm<big_endian>::make_plt_section( 7978 Symbol_table* symtab, Layout* layout) 7979 { 7980 if (this->plt_ == NULL) 7981 { 7982 // Create the GOT section first. 7983 this->got_section(symtab, layout); 7984 7985 // GOT for irelatives is create along with got.plt. 7986 gold_assert(this->got_ != NULL 7987 && this->got_plt_ != NULL 7988 && this->got_irelative_ != NULL); 7989 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_, 7990 this->got_irelative_); 7991 7992 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, 7993 (elfcpp::SHF_ALLOC 7994 | elfcpp::SHF_EXECINSTR), 7995 this->plt_, ORDER_PLT, false); 7996 symtab->define_in_output_data("$a", NULL, 7997 Symbol_table::PREDEFINED, 7998 this->plt_, 7999 0, 0, elfcpp::STT_NOTYPE, 8000 elfcpp::STB_LOCAL, 8001 elfcpp::STV_DEFAULT, 0, 8002 false, false); 8003 } 8004 } 8005 8006 8007 // Make a PLT entry for a local STT_GNU_IFUNC symbol. 8008 8009 template<bool big_endian> 8010 void 8011 Target_arm<big_endian>::make_local_ifunc_plt_entry( 8012 Symbol_table* symtab, Layout* layout, 8013 Sized_relobj_file<32, big_endian>* relobj, 8014 unsigned int local_sym_index) 8015 { 8016 if (relobj->local_has_plt_offset(local_sym_index)) 8017 return; 8018 if (this->plt_ == NULL) 8019 this->make_plt_section(symtab, layout); 8020 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, 8021 relobj, 8022 local_sym_index); 8023 relobj->set_local_plt_offset(local_sym_index, plt_offset); 8024 } 8025 8026 8027 // Return the number of entries in the PLT. 8028 8029 template<bool big_endian> 8030 unsigned int 8031 Target_arm<big_endian>::plt_entry_count() const 8032 { 8033 if (this->plt_ == NULL) 8034 return 0; 8035 return this->plt_->entry_count(); 8036 } 8037 8038 // Return the offset of the first non-reserved PLT entry. 8039 8040 template<bool big_endian> 8041 unsigned int 8042 Target_arm<big_endian>::first_plt_entry_offset() const 8043 { 8044 return this->plt_->first_plt_entry_offset(); 8045 } 8046 8047 // Return the size of each PLT entry. 8048 8049 template<bool big_endian> 8050 unsigned int 8051 Target_arm<big_endian>::plt_entry_size() const 8052 { 8053 return this->plt_->get_plt_entry_size(); 8054 } 8055 8056 // Get the section to use for TLS_DESC relocations. 8057 8058 template<bool big_endian> 8059 typename Target_arm<big_endian>::Reloc_section* 8060 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const 8061 { 8062 return this->plt_section()->rel_tls_desc(layout); 8063 } 8064 8065 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 8066 8067 template<bool big_endian> 8068 void 8069 Target_arm<big_endian>::define_tls_base_symbol( 8070 Symbol_table* symtab, 8071 Layout* layout) 8072 { 8073 if (this->tls_base_symbol_defined_) 8074 return; 8075 8076 Output_segment* tls_segment = layout->tls_segment(); 8077 if (tls_segment != NULL) 8078 { 8079 bool is_exec = parameters->options().output_is_executable(); 8080 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL, 8081 Symbol_table::PREDEFINED, 8082 tls_segment, 0, 0, 8083 elfcpp::STT_TLS, 8084 elfcpp::STB_LOCAL, 8085 elfcpp::STV_HIDDEN, 0, 8086 (is_exec 8087 ? Symbol::SEGMENT_END 8088 : Symbol::SEGMENT_START), 8089 true); 8090 } 8091 this->tls_base_symbol_defined_ = true; 8092 } 8093 8094 // Create a GOT entry for the TLS module index. 8095 8096 template<bool big_endian> 8097 unsigned int 8098 Target_arm<big_endian>::got_mod_index_entry( 8099 Symbol_table* symtab, 8100 Layout* layout, 8101 Sized_relobj_file<32, big_endian>* object) 8102 { 8103 if (this->got_mod_index_offset_ == -1U) 8104 { 8105 gold_assert(symtab != NULL && layout != NULL && object != NULL); 8106 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout); 8107 unsigned int got_offset; 8108 if (!parameters->doing_static_link()) 8109 { 8110 got_offset = got->add_constant(0); 8111 Reloc_section* rel_dyn = this->rel_dyn_section(layout); 8112 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got, 8113 got_offset); 8114 } 8115 else 8116 { 8117 // We are doing a static link. Just mark it as belong to module 1, 8118 // the executable. 8119 got_offset = got->add_constant(1); 8120 } 8121 8122 got->add_constant(0); 8123 this->got_mod_index_offset_ = got_offset; 8124 } 8125 return this->got_mod_index_offset_; 8126 } 8127 8128 // Optimize the TLS relocation type based on what we know about the 8129 // symbol. IS_FINAL is true if the final address of this symbol is 8130 // known at link time. 8131 8132 template<bool big_endian> 8133 tls::Tls_optimization 8134 Target_arm<big_endian>::optimize_tls_reloc(bool, int) 8135 { 8136 // FIXME: Currently we do not do any TLS optimization. 8137 return tls::TLSOPT_NONE; 8138 } 8139 8140 // Get the Reference_flags for a particular relocation. 8141 8142 template<bool big_endian> 8143 int 8144 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type) 8145 { 8146 switch (r_type) 8147 { 8148 case elfcpp::R_ARM_NONE: 8149 case elfcpp::R_ARM_V4BX: 8150 case elfcpp::R_ARM_GNU_VTENTRY: 8151 case elfcpp::R_ARM_GNU_VTINHERIT: 8152 // No symbol reference. 8153 return 0; 8154 8155 case elfcpp::R_ARM_ABS32: 8156 case elfcpp::R_ARM_ABS16: 8157 case elfcpp::R_ARM_ABS12: 8158 case elfcpp::R_ARM_THM_ABS5: 8159 case elfcpp::R_ARM_ABS8: 8160 case elfcpp::R_ARM_BASE_ABS: 8161 case elfcpp::R_ARM_MOVW_ABS_NC: 8162 case elfcpp::R_ARM_MOVT_ABS: 8163 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8164 case elfcpp::R_ARM_THM_MOVT_ABS: 8165 case elfcpp::R_ARM_ABS32_NOI: 8166 return Symbol::ABSOLUTE_REF; 8167 8168 case elfcpp::R_ARM_REL32: 8169 case elfcpp::R_ARM_LDR_PC_G0: 8170 case elfcpp::R_ARM_SBREL32: 8171 case elfcpp::R_ARM_THM_PC8: 8172 case elfcpp::R_ARM_BASE_PREL: 8173 case elfcpp::R_ARM_MOVW_PREL_NC: 8174 case elfcpp::R_ARM_MOVT_PREL: 8175 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8176 case elfcpp::R_ARM_THM_MOVT_PREL: 8177 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8178 case elfcpp::R_ARM_THM_PC12: 8179 case elfcpp::R_ARM_REL32_NOI: 8180 case elfcpp::R_ARM_ALU_PC_G0_NC: 8181 case elfcpp::R_ARM_ALU_PC_G0: 8182 case elfcpp::R_ARM_ALU_PC_G1_NC: 8183 case elfcpp::R_ARM_ALU_PC_G1: 8184 case elfcpp::R_ARM_ALU_PC_G2: 8185 case elfcpp::R_ARM_LDR_PC_G1: 8186 case elfcpp::R_ARM_LDR_PC_G2: 8187 case elfcpp::R_ARM_LDRS_PC_G0: 8188 case elfcpp::R_ARM_LDRS_PC_G1: 8189 case elfcpp::R_ARM_LDRS_PC_G2: 8190 case elfcpp::R_ARM_LDC_PC_G0: 8191 case elfcpp::R_ARM_LDC_PC_G1: 8192 case elfcpp::R_ARM_LDC_PC_G2: 8193 case elfcpp::R_ARM_ALU_SB_G0_NC: 8194 case elfcpp::R_ARM_ALU_SB_G0: 8195 case elfcpp::R_ARM_ALU_SB_G1_NC: 8196 case elfcpp::R_ARM_ALU_SB_G1: 8197 case elfcpp::R_ARM_ALU_SB_G2: 8198 case elfcpp::R_ARM_LDR_SB_G0: 8199 case elfcpp::R_ARM_LDR_SB_G1: 8200 case elfcpp::R_ARM_LDR_SB_G2: 8201 case elfcpp::R_ARM_LDRS_SB_G0: 8202 case elfcpp::R_ARM_LDRS_SB_G1: 8203 case elfcpp::R_ARM_LDRS_SB_G2: 8204 case elfcpp::R_ARM_LDC_SB_G0: 8205 case elfcpp::R_ARM_LDC_SB_G1: 8206 case elfcpp::R_ARM_LDC_SB_G2: 8207 case elfcpp::R_ARM_MOVW_BREL_NC: 8208 case elfcpp::R_ARM_MOVT_BREL: 8209 case elfcpp::R_ARM_MOVW_BREL: 8210 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8211 case elfcpp::R_ARM_THM_MOVT_BREL: 8212 case elfcpp::R_ARM_THM_MOVW_BREL: 8213 case elfcpp::R_ARM_GOTOFF32: 8214 case elfcpp::R_ARM_GOTOFF12: 8215 case elfcpp::R_ARM_SBREL31: 8216 return Symbol::RELATIVE_REF; 8217 8218 case elfcpp::R_ARM_PLT32: 8219 case elfcpp::R_ARM_CALL: 8220 case elfcpp::R_ARM_JUMP24: 8221 case elfcpp::R_ARM_THM_CALL: 8222 case elfcpp::R_ARM_THM_JUMP24: 8223 case elfcpp::R_ARM_THM_JUMP19: 8224 case elfcpp::R_ARM_THM_JUMP6: 8225 case elfcpp::R_ARM_THM_JUMP11: 8226 case elfcpp::R_ARM_THM_JUMP8: 8227 // R_ARM_PREL31 is not used to relocate call/jump instructions but 8228 // in unwind tables. It may point to functions via PLTs. 8229 // So we treat it like call/jump relocations above. 8230 case elfcpp::R_ARM_PREL31: 8231 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; 8232 8233 case elfcpp::R_ARM_GOT_BREL: 8234 case elfcpp::R_ARM_GOT_ABS: 8235 case elfcpp::R_ARM_GOT_PREL: 8236 // Absolute in GOT. 8237 return Symbol::ABSOLUTE_REF; 8238 8239 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8240 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8241 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8242 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8243 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8244 return Symbol::TLS_REF; 8245 8246 case elfcpp::R_ARM_TARGET1: 8247 case elfcpp::R_ARM_TARGET2: 8248 case elfcpp::R_ARM_COPY: 8249 case elfcpp::R_ARM_GLOB_DAT: 8250 case elfcpp::R_ARM_JUMP_SLOT: 8251 case elfcpp::R_ARM_RELATIVE: 8252 case elfcpp::R_ARM_PC24: 8253 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8254 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8255 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8256 default: 8257 // Not expected. We will give an error later. 8258 return 0; 8259 } 8260 } 8261 8262 // Report an unsupported relocation against a local symbol. 8263 8264 template<bool big_endian> 8265 void 8266 Target_arm<big_endian>::Scan::unsupported_reloc_local( 8267 Sized_relobj_file<32, big_endian>* object, 8268 unsigned int r_type) 8269 { 8270 gold_error(_("%s: unsupported reloc %u against local symbol"), 8271 object->name().c_str(), r_type); 8272 } 8273 8274 // We are about to emit a dynamic relocation of type R_TYPE. If the 8275 // dynamic linker does not support it, issue an error. The GNU linker 8276 // only issues a non-PIC error for an allocated read-only section. 8277 // Here we know the section is allocated, but we don't know that it is 8278 // read-only. But we check for all the relocation types which the 8279 // glibc dynamic linker supports, so it seems appropriate to issue an 8280 // error even if the section is not read-only. 8281 8282 template<bool big_endian> 8283 void 8284 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object, 8285 unsigned int r_type) 8286 { 8287 switch (r_type) 8288 { 8289 // These are the relocation types supported by glibc for ARM. 8290 case elfcpp::R_ARM_RELATIVE: 8291 case elfcpp::R_ARM_COPY: 8292 case elfcpp::R_ARM_GLOB_DAT: 8293 case elfcpp::R_ARM_JUMP_SLOT: 8294 case elfcpp::R_ARM_ABS32: 8295 case elfcpp::R_ARM_ABS32_NOI: 8296 case elfcpp::R_ARM_IRELATIVE: 8297 case elfcpp::R_ARM_PC24: 8298 // FIXME: The following 3 types are not supported by Android's dynamic 8299 // linker. 8300 case elfcpp::R_ARM_TLS_DTPMOD32: 8301 case elfcpp::R_ARM_TLS_DTPOFF32: 8302 case elfcpp::R_ARM_TLS_TPOFF32: 8303 return; 8304 8305 default: 8306 { 8307 // This prevents us from issuing more than one error per reloc 8308 // section. But we can still wind up issuing more than one 8309 // error per object file. 8310 if (this->issued_non_pic_error_) 8311 return; 8312 const Arm_reloc_property* reloc_property = 8313 arm_reloc_property_table->get_reloc_property(r_type); 8314 gold_assert(reloc_property != NULL); 8315 object->error(_("requires unsupported dynamic reloc %s; " 8316 "recompile with -fPIC"), 8317 reloc_property->name().c_str()); 8318 this->issued_non_pic_error_ = true; 8319 return; 8320 } 8321 8322 case elfcpp::R_ARM_NONE: 8323 gold_unreachable(); 8324 } 8325 } 8326 8327 8328 // Return whether we need to make a PLT entry for a relocation of the 8329 // given type against a STT_GNU_IFUNC symbol. 8330 8331 template<bool big_endian> 8332 bool 8333 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc( 8334 Sized_relobj_file<32, big_endian>* object, 8335 unsigned int r_type) 8336 { 8337 int flags = Scan::get_reference_flags(r_type); 8338 if (flags & Symbol::TLS_REF) 8339 { 8340 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"), 8341 object->name().c_str(), r_type); 8342 return false; 8343 } 8344 return flags != 0; 8345 } 8346 8347 8348 // Scan a relocation for a local symbol. 8349 // FIXME: This only handles a subset of relocation types used by Android 8350 // on ARM v5te devices. 8351 8352 template<bool big_endian> 8353 inline void 8354 Target_arm<big_endian>::Scan::local(Symbol_table* symtab, 8355 Layout* layout, 8356 Target_arm* target, 8357 Sized_relobj_file<32, big_endian>* object, 8358 unsigned int data_shndx, 8359 Output_section* output_section, 8360 const elfcpp::Rel<32, big_endian>& reloc, 8361 unsigned int r_type, 8362 const elfcpp::Sym<32, big_endian>& lsym, 8363 bool is_discarded) 8364 { 8365 if (is_discarded) 8366 return; 8367 8368 r_type = get_real_reloc_type(r_type); 8369 8370 // A local STT_GNU_IFUNC symbol may require a PLT entry. 8371 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; 8372 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type)) 8373 { 8374 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8375 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym); 8376 } 8377 8378 switch (r_type) 8379 { 8380 case elfcpp::R_ARM_NONE: 8381 case elfcpp::R_ARM_V4BX: 8382 case elfcpp::R_ARM_GNU_VTENTRY: 8383 case elfcpp::R_ARM_GNU_VTINHERIT: 8384 break; 8385 8386 case elfcpp::R_ARM_ABS32: 8387 case elfcpp::R_ARM_ABS32_NOI: 8388 // If building a shared library (or a position-independent 8389 // executable), we need to create a dynamic relocation for 8390 // this location. The relocation applied at link time will 8391 // apply the link-time value, so we flag the location with 8392 // an R_ARM_RELATIVE relocation so the dynamic loader can 8393 // relocate it easily. 8394 if (parameters->options().output_is_position_independent()) 8395 { 8396 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8397 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8398 // If we are to add more other reloc types than R_ARM_ABS32, 8399 // we need to add check_non_pic(object, r_type) here. 8400 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE, 8401 output_section, data_shndx, 8402 reloc.get_r_offset(), is_ifunc); 8403 } 8404 break; 8405 8406 case elfcpp::R_ARM_ABS16: 8407 case elfcpp::R_ARM_ABS12: 8408 case elfcpp::R_ARM_THM_ABS5: 8409 case elfcpp::R_ARM_ABS8: 8410 case elfcpp::R_ARM_BASE_ABS: 8411 case elfcpp::R_ARM_MOVW_ABS_NC: 8412 case elfcpp::R_ARM_MOVT_ABS: 8413 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8414 case elfcpp::R_ARM_THM_MOVT_ABS: 8415 // If building a shared library (or a position-independent 8416 // executable), we need to create a dynamic relocation for 8417 // this location. Because the addend needs to remain in the 8418 // data section, we need to be careful not to apply this 8419 // relocation statically. 8420 if (parameters->options().output_is_position_independent()) 8421 { 8422 check_non_pic(object, r_type); 8423 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8424 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8425 if (lsym.get_st_type() != elfcpp::STT_SECTION) 8426 rel_dyn->add_local(object, r_sym, r_type, output_section, 8427 data_shndx, reloc.get_r_offset()); 8428 else 8429 { 8430 gold_assert(lsym.get_st_value() == 0); 8431 unsigned int shndx = lsym.get_st_shndx(); 8432 bool is_ordinary; 8433 shndx = object->adjust_sym_shndx(r_sym, shndx, 8434 &is_ordinary); 8435 if (!is_ordinary) 8436 object->error(_("section symbol %u has bad shndx %u"), 8437 r_sym, shndx); 8438 else 8439 rel_dyn->add_local_section(object, shndx, 8440 r_type, output_section, 8441 data_shndx, reloc.get_r_offset()); 8442 } 8443 } 8444 break; 8445 8446 case elfcpp::R_ARM_REL32: 8447 case elfcpp::R_ARM_LDR_PC_G0: 8448 case elfcpp::R_ARM_SBREL32: 8449 case elfcpp::R_ARM_THM_CALL: 8450 case elfcpp::R_ARM_THM_PC8: 8451 case elfcpp::R_ARM_BASE_PREL: 8452 case elfcpp::R_ARM_PLT32: 8453 case elfcpp::R_ARM_CALL: 8454 case elfcpp::R_ARM_JUMP24: 8455 case elfcpp::R_ARM_THM_JUMP24: 8456 case elfcpp::R_ARM_SBREL31: 8457 case elfcpp::R_ARM_PREL31: 8458 case elfcpp::R_ARM_MOVW_PREL_NC: 8459 case elfcpp::R_ARM_MOVT_PREL: 8460 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8461 case elfcpp::R_ARM_THM_MOVT_PREL: 8462 case elfcpp::R_ARM_THM_JUMP19: 8463 case elfcpp::R_ARM_THM_JUMP6: 8464 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8465 case elfcpp::R_ARM_THM_PC12: 8466 case elfcpp::R_ARM_REL32_NOI: 8467 case elfcpp::R_ARM_ALU_PC_G0_NC: 8468 case elfcpp::R_ARM_ALU_PC_G0: 8469 case elfcpp::R_ARM_ALU_PC_G1_NC: 8470 case elfcpp::R_ARM_ALU_PC_G1: 8471 case elfcpp::R_ARM_ALU_PC_G2: 8472 case elfcpp::R_ARM_LDR_PC_G1: 8473 case elfcpp::R_ARM_LDR_PC_G2: 8474 case elfcpp::R_ARM_LDRS_PC_G0: 8475 case elfcpp::R_ARM_LDRS_PC_G1: 8476 case elfcpp::R_ARM_LDRS_PC_G2: 8477 case elfcpp::R_ARM_LDC_PC_G0: 8478 case elfcpp::R_ARM_LDC_PC_G1: 8479 case elfcpp::R_ARM_LDC_PC_G2: 8480 case elfcpp::R_ARM_ALU_SB_G0_NC: 8481 case elfcpp::R_ARM_ALU_SB_G0: 8482 case elfcpp::R_ARM_ALU_SB_G1_NC: 8483 case elfcpp::R_ARM_ALU_SB_G1: 8484 case elfcpp::R_ARM_ALU_SB_G2: 8485 case elfcpp::R_ARM_LDR_SB_G0: 8486 case elfcpp::R_ARM_LDR_SB_G1: 8487 case elfcpp::R_ARM_LDR_SB_G2: 8488 case elfcpp::R_ARM_LDRS_SB_G0: 8489 case elfcpp::R_ARM_LDRS_SB_G1: 8490 case elfcpp::R_ARM_LDRS_SB_G2: 8491 case elfcpp::R_ARM_LDC_SB_G0: 8492 case elfcpp::R_ARM_LDC_SB_G1: 8493 case elfcpp::R_ARM_LDC_SB_G2: 8494 case elfcpp::R_ARM_MOVW_BREL_NC: 8495 case elfcpp::R_ARM_MOVT_BREL: 8496 case elfcpp::R_ARM_MOVW_BREL: 8497 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8498 case elfcpp::R_ARM_THM_MOVT_BREL: 8499 case elfcpp::R_ARM_THM_MOVW_BREL: 8500 case elfcpp::R_ARM_THM_JUMP11: 8501 case elfcpp::R_ARM_THM_JUMP8: 8502 // We don't need to do anything for a relative addressing relocation 8503 // against a local symbol if it does not reference the GOT. 8504 break; 8505 8506 case elfcpp::R_ARM_GOTOFF32: 8507 case elfcpp::R_ARM_GOTOFF12: 8508 // We need a GOT section: 8509 target->got_section(symtab, layout); 8510 break; 8511 8512 case elfcpp::R_ARM_GOT_BREL: 8513 case elfcpp::R_ARM_GOT_PREL: 8514 { 8515 // The symbol requires a GOT entry. 8516 Arm_output_data_got<big_endian>* got = 8517 target->got_section(symtab, layout); 8518 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8519 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD)) 8520 { 8521 // If we are generating a shared object, we need to add a 8522 // dynamic RELATIVE relocation for this symbol's GOT entry. 8523 if (parameters->options().output_is_position_independent()) 8524 { 8525 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8526 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8527 rel_dyn->add_local_relative( 8528 object, r_sym, elfcpp::R_ARM_RELATIVE, got, 8529 object->local_got_offset(r_sym, GOT_TYPE_STANDARD)); 8530 } 8531 } 8532 } 8533 break; 8534 8535 case elfcpp::R_ARM_TARGET1: 8536 case elfcpp::R_ARM_TARGET2: 8537 // This should have been mapped to another type already. 8538 // Fall through. 8539 case elfcpp::R_ARM_COPY: 8540 case elfcpp::R_ARM_GLOB_DAT: 8541 case elfcpp::R_ARM_JUMP_SLOT: 8542 case elfcpp::R_ARM_RELATIVE: 8543 // These are relocations which should only be seen by the 8544 // dynamic linker, and should never be seen here. 8545 gold_error(_("%s: unexpected reloc %u in object file"), 8546 object->name().c_str(), r_type); 8547 break; 8548 8549 8550 // These are initial TLS relocs, which are expected when 8551 // linking. 8552 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8553 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8554 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8555 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8556 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8557 { 8558 bool output_is_shared = parameters->options().shared(); 8559 const tls::Tls_optimization optimized_type 8560 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared, 8561 r_type); 8562 switch (r_type) 8563 { 8564 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8565 if (optimized_type == tls::TLSOPT_NONE) 8566 { 8567 // Create a pair of GOT entries for the module index and 8568 // dtv-relative offset. 8569 Arm_output_data_got<big_endian>* got 8570 = target->got_section(symtab, layout); 8571 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8572 unsigned int shndx = lsym.get_st_shndx(); 8573 bool is_ordinary; 8574 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary); 8575 if (!is_ordinary) 8576 { 8577 object->error(_("local symbol %u has bad shndx %u"), 8578 r_sym, shndx); 8579 break; 8580 } 8581 8582 if (!parameters->doing_static_link()) 8583 got->add_local_pair_with_rel(object, r_sym, shndx, 8584 GOT_TYPE_TLS_PAIR, 8585 target->rel_dyn_section(layout), 8586 elfcpp::R_ARM_TLS_DTPMOD32); 8587 else 8588 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, 8589 object, r_sym); 8590 } 8591 else 8592 // FIXME: TLS optimization not supported yet. 8593 gold_unreachable(); 8594 break; 8595 8596 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8597 if (optimized_type == tls::TLSOPT_NONE) 8598 { 8599 // Create a GOT entry for the module index. 8600 target->got_mod_index_entry(symtab, layout, object); 8601 } 8602 else 8603 // FIXME: TLS optimization not supported yet. 8604 gold_unreachable(); 8605 break; 8606 8607 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8608 break; 8609 8610 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8611 layout->set_has_static_tls(); 8612 if (optimized_type == tls::TLSOPT_NONE) 8613 { 8614 // Create a GOT entry for the tp-relative offset. 8615 Arm_output_data_got<big_endian>* got 8616 = target->got_section(symtab, layout); 8617 unsigned int r_sym = 8618 elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8619 if (!parameters->doing_static_link()) 8620 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET, 8621 target->rel_dyn_section(layout), 8622 elfcpp::R_ARM_TLS_TPOFF32); 8623 else if (!object->local_has_got_offset(r_sym, 8624 GOT_TYPE_TLS_OFFSET)) 8625 { 8626 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET); 8627 unsigned int got_offset = 8628 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET); 8629 got->add_static_reloc(got_offset, 8630 elfcpp::R_ARM_TLS_TPOFF32, object, 8631 r_sym); 8632 } 8633 } 8634 else 8635 // FIXME: TLS optimization not supported yet. 8636 gold_unreachable(); 8637 break; 8638 8639 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8640 layout->set_has_static_tls(); 8641 if (output_is_shared) 8642 { 8643 // We need to create a dynamic relocation. 8644 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION); 8645 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8646 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8647 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32, 8648 output_section, data_shndx, 8649 reloc.get_r_offset()); 8650 } 8651 break; 8652 8653 default: 8654 gold_unreachable(); 8655 } 8656 } 8657 break; 8658 8659 case elfcpp::R_ARM_PC24: 8660 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8661 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8662 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8663 default: 8664 unsupported_reloc_local(object, r_type); 8665 break; 8666 } 8667 } 8668 8669 // Report an unsupported relocation against a global symbol. 8670 8671 template<bool big_endian> 8672 void 8673 Target_arm<big_endian>::Scan::unsupported_reloc_global( 8674 Sized_relobj_file<32, big_endian>* object, 8675 unsigned int r_type, 8676 Symbol* gsym) 8677 { 8678 gold_error(_("%s: unsupported reloc %u against global symbol %s"), 8679 object->name().c_str(), r_type, gsym->demangled_name().c_str()); 8680 } 8681 8682 template<bool big_endian> 8683 inline bool 8684 Target_arm<big_endian>::Scan::possible_function_pointer_reloc( 8685 unsigned int r_type) 8686 { 8687 switch (r_type) 8688 { 8689 case elfcpp::R_ARM_PC24: 8690 case elfcpp::R_ARM_THM_CALL: 8691 case elfcpp::R_ARM_PLT32: 8692 case elfcpp::R_ARM_CALL: 8693 case elfcpp::R_ARM_JUMP24: 8694 case elfcpp::R_ARM_THM_JUMP24: 8695 case elfcpp::R_ARM_SBREL31: 8696 case elfcpp::R_ARM_PREL31: 8697 case elfcpp::R_ARM_THM_JUMP19: 8698 case elfcpp::R_ARM_THM_JUMP6: 8699 case elfcpp::R_ARM_THM_JUMP11: 8700 case elfcpp::R_ARM_THM_JUMP8: 8701 // All the relocations above are branches except SBREL31 and PREL31. 8702 return false; 8703 8704 default: 8705 // Be conservative and assume this is a function pointer. 8706 return true; 8707 } 8708 } 8709 8710 template<bool big_endian> 8711 inline bool 8712 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer( 8713 Symbol_table*, 8714 Layout*, 8715 Target_arm<big_endian>* target, 8716 Sized_relobj_file<32, big_endian>*, 8717 unsigned int, 8718 Output_section*, 8719 const elfcpp::Rel<32, big_endian>&, 8720 unsigned int r_type, 8721 const elfcpp::Sym<32, big_endian>&) 8722 { 8723 r_type = target->get_real_reloc_type(r_type); 8724 return possible_function_pointer_reloc(r_type); 8725 } 8726 8727 template<bool big_endian> 8728 inline bool 8729 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer( 8730 Symbol_table*, 8731 Layout*, 8732 Target_arm<big_endian>* target, 8733 Sized_relobj_file<32, big_endian>*, 8734 unsigned int, 8735 Output_section*, 8736 const elfcpp::Rel<32, big_endian>&, 8737 unsigned int r_type, 8738 Symbol* gsym) 8739 { 8740 // GOT is not a function. 8741 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8742 return false; 8743 8744 r_type = target->get_real_reloc_type(r_type); 8745 return possible_function_pointer_reloc(r_type); 8746 } 8747 8748 // Scan a relocation for a global symbol. 8749 8750 template<bool big_endian> 8751 inline void 8752 Target_arm<big_endian>::Scan::global(Symbol_table* symtab, 8753 Layout* layout, 8754 Target_arm* target, 8755 Sized_relobj_file<32, big_endian>* object, 8756 unsigned int data_shndx, 8757 Output_section* output_section, 8758 const elfcpp::Rel<32, big_endian>& reloc, 8759 unsigned int r_type, 8760 Symbol* gsym) 8761 { 8762 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got 8763 // section. We check here to avoid creating a dynamic reloc against 8764 // _GLOBAL_OFFSET_TABLE_. 8765 if (!target->has_got_section() 8766 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8767 target->got_section(symtab, layout); 8768 8769 // A STT_GNU_IFUNC symbol may require a PLT entry. 8770 if (gsym->type() == elfcpp::STT_GNU_IFUNC 8771 && this->reloc_needs_plt_for_ifunc(object, r_type)) 8772 target->make_plt_entry(symtab, layout, gsym); 8773 8774 r_type = get_real_reloc_type(r_type); 8775 switch (r_type) 8776 { 8777 case elfcpp::R_ARM_NONE: 8778 case elfcpp::R_ARM_V4BX: 8779 case elfcpp::R_ARM_GNU_VTENTRY: 8780 case elfcpp::R_ARM_GNU_VTINHERIT: 8781 break; 8782 8783 case elfcpp::R_ARM_ABS32: 8784 case elfcpp::R_ARM_ABS16: 8785 case elfcpp::R_ARM_ABS12: 8786 case elfcpp::R_ARM_THM_ABS5: 8787 case elfcpp::R_ARM_ABS8: 8788 case elfcpp::R_ARM_BASE_ABS: 8789 case elfcpp::R_ARM_MOVW_ABS_NC: 8790 case elfcpp::R_ARM_MOVT_ABS: 8791 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8792 case elfcpp::R_ARM_THM_MOVT_ABS: 8793 case elfcpp::R_ARM_ABS32_NOI: 8794 // Absolute addressing relocations. 8795 { 8796 // Make a PLT entry if necessary. 8797 if (this->symbol_needs_plt_entry(gsym)) 8798 { 8799 target->make_plt_entry(symtab, layout, gsym); 8800 // Since this is not a PC-relative relocation, we may be 8801 // taking the address of a function. In that case we need to 8802 // set the entry in the dynamic symbol table to the address of 8803 // the PLT entry. 8804 if (gsym->is_from_dynobj() && !parameters->options().shared()) 8805 gsym->set_needs_dynsym_value(); 8806 } 8807 // Make a dynamic relocation if necessary. 8808 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 8809 { 8810 if (!parameters->options().output_is_position_independent() 8811 && gsym->may_need_copy_reloc()) 8812 { 8813 target->copy_reloc(symtab, layout, object, 8814 data_shndx, output_section, gsym, reloc); 8815 } 8816 else if ((r_type == elfcpp::R_ARM_ABS32 8817 || r_type == elfcpp::R_ARM_ABS32_NOI) 8818 && gsym->type() == elfcpp::STT_GNU_IFUNC 8819 && gsym->can_use_relative_reloc(false) 8820 && !gsym->is_from_dynobj() 8821 && !gsym->is_undefined() 8822 && !gsym->is_preemptible()) 8823 { 8824 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC 8825 // symbol. This makes a function address in a PIE executable 8826 // match the address in a shared library that it links against. 8827 Reloc_section* rel_irelative = 8828 target->rel_irelative_section(layout); 8829 unsigned int r_type = elfcpp::R_ARM_IRELATIVE; 8830 rel_irelative->add_symbolless_global_addend( 8831 gsym, r_type, output_section, object, 8832 data_shndx, reloc.get_r_offset()); 8833 } 8834 else if ((r_type == elfcpp::R_ARM_ABS32 8835 || r_type == elfcpp::R_ARM_ABS32_NOI) 8836 && gsym->can_use_relative_reloc(false)) 8837 { 8838 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8839 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE, 8840 output_section, object, 8841 data_shndx, reloc.get_r_offset()); 8842 } 8843 else 8844 { 8845 check_non_pic(object, r_type); 8846 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8847 rel_dyn->add_global(gsym, r_type, output_section, object, 8848 data_shndx, reloc.get_r_offset()); 8849 } 8850 } 8851 } 8852 break; 8853 8854 case elfcpp::R_ARM_GOTOFF32: 8855 case elfcpp::R_ARM_GOTOFF12: 8856 // We need a GOT section. 8857 target->got_section(symtab, layout); 8858 break; 8859 8860 case elfcpp::R_ARM_REL32: 8861 case elfcpp::R_ARM_LDR_PC_G0: 8862 case elfcpp::R_ARM_SBREL32: 8863 case elfcpp::R_ARM_THM_PC8: 8864 case elfcpp::R_ARM_BASE_PREL: 8865 case elfcpp::R_ARM_MOVW_PREL_NC: 8866 case elfcpp::R_ARM_MOVT_PREL: 8867 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8868 case elfcpp::R_ARM_THM_MOVT_PREL: 8869 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8870 case elfcpp::R_ARM_THM_PC12: 8871 case elfcpp::R_ARM_REL32_NOI: 8872 case elfcpp::R_ARM_ALU_PC_G0_NC: 8873 case elfcpp::R_ARM_ALU_PC_G0: 8874 case elfcpp::R_ARM_ALU_PC_G1_NC: 8875 case elfcpp::R_ARM_ALU_PC_G1: 8876 case elfcpp::R_ARM_ALU_PC_G2: 8877 case elfcpp::R_ARM_LDR_PC_G1: 8878 case elfcpp::R_ARM_LDR_PC_G2: 8879 case elfcpp::R_ARM_LDRS_PC_G0: 8880 case elfcpp::R_ARM_LDRS_PC_G1: 8881 case elfcpp::R_ARM_LDRS_PC_G2: 8882 case elfcpp::R_ARM_LDC_PC_G0: 8883 case elfcpp::R_ARM_LDC_PC_G1: 8884 case elfcpp::R_ARM_LDC_PC_G2: 8885 case elfcpp::R_ARM_ALU_SB_G0_NC: 8886 case elfcpp::R_ARM_ALU_SB_G0: 8887 case elfcpp::R_ARM_ALU_SB_G1_NC: 8888 case elfcpp::R_ARM_ALU_SB_G1: 8889 case elfcpp::R_ARM_ALU_SB_G2: 8890 case elfcpp::R_ARM_LDR_SB_G0: 8891 case elfcpp::R_ARM_LDR_SB_G1: 8892 case elfcpp::R_ARM_LDR_SB_G2: 8893 case elfcpp::R_ARM_LDRS_SB_G0: 8894 case elfcpp::R_ARM_LDRS_SB_G1: 8895 case elfcpp::R_ARM_LDRS_SB_G2: 8896 case elfcpp::R_ARM_LDC_SB_G0: 8897 case elfcpp::R_ARM_LDC_SB_G1: 8898 case elfcpp::R_ARM_LDC_SB_G2: 8899 case elfcpp::R_ARM_MOVW_BREL_NC: 8900 case elfcpp::R_ARM_MOVT_BREL: 8901 case elfcpp::R_ARM_MOVW_BREL: 8902 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8903 case elfcpp::R_ARM_THM_MOVT_BREL: 8904 case elfcpp::R_ARM_THM_MOVW_BREL: 8905 // Relative addressing relocations. 8906 { 8907 // Make a dynamic relocation if necessary. 8908 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 8909 { 8910 if (parameters->options().output_is_executable() 8911 && target->may_need_copy_reloc(gsym)) 8912 { 8913 target->copy_reloc(symtab, layout, object, 8914 data_shndx, output_section, gsym, reloc); 8915 } 8916 else 8917 { 8918 check_non_pic(object, r_type); 8919 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8920 rel_dyn->add_global(gsym, r_type, output_section, object, 8921 data_shndx, reloc.get_r_offset()); 8922 } 8923 } 8924 } 8925 break; 8926 8927 case elfcpp::R_ARM_THM_CALL: 8928 case elfcpp::R_ARM_PLT32: 8929 case elfcpp::R_ARM_CALL: 8930 case elfcpp::R_ARM_JUMP24: 8931 case elfcpp::R_ARM_THM_JUMP24: 8932 case elfcpp::R_ARM_SBREL31: 8933 case elfcpp::R_ARM_PREL31: 8934 case elfcpp::R_ARM_THM_JUMP19: 8935 case elfcpp::R_ARM_THM_JUMP6: 8936 case elfcpp::R_ARM_THM_JUMP11: 8937 case elfcpp::R_ARM_THM_JUMP8: 8938 // All the relocation above are branches except for the PREL31 ones. 8939 // A PREL31 relocation can point to a personality function in a shared 8940 // library. In that case we want to use a PLT because we want to 8941 // call the personality routine and the dynamic linkers we care about 8942 // do not support dynamic PREL31 relocations. An REL31 relocation may 8943 // point to a function whose unwinding behaviour is being described but 8944 // we will not mistakenly generate a PLT for that because we should use 8945 // a local section symbol. 8946 8947 // If the symbol is fully resolved, this is just a relative 8948 // local reloc. Otherwise we need a PLT entry. 8949 if (gsym->final_value_is_known()) 8950 break; 8951 // If building a shared library, we can also skip the PLT entry 8952 // if the symbol is defined in the output file and is protected 8953 // or hidden. 8954 if (gsym->is_defined() 8955 && !gsym->is_from_dynobj() 8956 && !gsym->is_preemptible()) 8957 break; 8958 target->make_plt_entry(symtab, layout, gsym); 8959 break; 8960 8961 case elfcpp::R_ARM_GOT_BREL: 8962 case elfcpp::R_ARM_GOT_ABS: 8963 case elfcpp::R_ARM_GOT_PREL: 8964 { 8965 // The symbol requires a GOT entry. 8966 Arm_output_data_got<big_endian>* got = 8967 target->got_section(symtab, layout); 8968 if (gsym->final_value_is_known()) 8969 { 8970 // For a STT_GNU_IFUNC symbol we want the PLT address. 8971 if (gsym->type() == elfcpp::STT_GNU_IFUNC) 8972 got->add_global_plt(gsym, GOT_TYPE_STANDARD); 8973 else 8974 got->add_global(gsym, GOT_TYPE_STANDARD); 8975 } 8976 else 8977 { 8978 // If this symbol is not fully resolved, we need to add a 8979 // GOT entry with a dynamic relocation. 8980 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8981 if (gsym->is_from_dynobj() 8982 || gsym->is_undefined() 8983 || gsym->is_preemptible() 8984 || (gsym->visibility() == elfcpp::STV_PROTECTED 8985 && parameters->options().shared()) 8986 || (gsym->type() == elfcpp::STT_GNU_IFUNC 8987 && parameters->options().output_is_position_independent())) 8988 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, 8989 rel_dyn, elfcpp::R_ARM_GLOB_DAT); 8990 else 8991 { 8992 // For a STT_GNU_IFUNC symbol we want to write the PLT 8993 // offset into the GOT, so that function pointer 8994 // comparisons work correctly. 8995 bool is_new; 8996 if (gsym->type() != elfcpp::STT_GNU_IFUNC) 8997 is_new = got->add_global(gsym, GOT_TYPE_STANDARD); 8998 else 8999 { 9000 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD); 9001 // Tell the dynamic linker to use the PLT address 9002 // when resolving relocations. 9003 if (gsym->is_from_dynobj() 9004 && !parameters->options().shared()) 9005 gsym->set_needs_dynsym_value(); 9006 } 9007 if (is_new) 9008 rel_dyn->add_global_relative( 9009 gsym, elfcpp::R_ARM_RELATIVE, got, 9010 gsym->got_offset(GOT_TYPE_STANDARD)); 9011 } 9012 } 9013 } 9014 break; 9015 9016 case elfcpp::R_ARM_TARGET1: 9017 case elfcpp::R_ARM_TARGET2: 9018 // These should have been mapped to other types already. 9019 // Fall through. 9020 case elfcpp::R_ARM_COPY: 9021 case elfcpp::R_ARM_GLOB_DAT: 9022 case elfcpp::R_ARM_JUMP_SLOT: 9023 case elfcpp::R_ARM_RELATIVE: 9024 // These are relocations which should only be seen by the 9025 // dynamic linker, and should never be seen here. 9026 gold_error(_("%s: unexpected reloc %u in object file"), 9027 object->name().c_str(), r_type); 9028 break; 9029 9030 // These are initial tls relocs, which are expected when 9031 // linking. 9032 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9033 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9034 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9035 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9036 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9037 { 9038 const bool is_final = gsym->final_value_is_known(); 9039 const tls::Tls_optimization optimized_type 9040 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 9041 switch (r_type) 9042 { 9043 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9044 if (optimized_type == tls::TLSOPT_NONE) 9045 { 9046 // Create a pair of GOT entries for the module index and 9047 // dtv-relative offset. 9048 Arm_output_data_got<big_endian>* got 9049 = target->got_section(symtab, layout); 9050 if (!parameters->doing_static_link()) 9051 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR, 9052 target->rel_dyn_section(layout), 9053 elfcpp::R_ARM_TLS_DTPMOD32, 9054 elfcpp::R_ARM_TLS_DTPOFF32); 9055 else 9056 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym); 9057 } 9058 else 9059 // FIXME: TLS optimization not supported yet. 9060 gold_unreachable(); 9061 break; 9062 9063 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9064 if (optimized_type == tls::TLSOPT_NONE) 9065 { 9066 // Create a GOT entry for the module index. 9067 target->got_mod_index_entry(symtab, layout, object); 9068 } 9069 else 9070 // FIXME: TLS optimization not supported yet. 9071 gold_unreachable(); 9072 break; 9073 9074 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9075 break; 9076 9077 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9078 layout->set_has_static_tls(); 9079 if (optimized_type == tls::TLSOPT_NONE) 9080 { 9081 // Create a GOT entry for the tp-relative offset. 9082 Arm_output_data_got<big_endian>* got 9083 = target->got_section(symtab, layout); 9084 if (!parameters->doing_static_link()) 9085 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET, 9086 target->rel_dyn_section(layout), 9087 elfcpp::R_ARM_TLS_TPOFF32); 9088 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET)) 9089 { 9090 got->add_global(gsym, GOT_TYPE_TLS_OFFSET); 9091 unsigned int got_offset = 9092 gsym->got_offset(GOT_TYPE_TLS_OFFSET); 9093 got->add_static_reloc(got_offset, 9094 elfcpp::R_ARM_TLS_TPOFF32, gsym); 9095 } 9096 } 9097 else 9098 // FIXME: TLS optimization not supported yet. 9099 gold_unreachable(); 9100 break; 9101 9102 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9103 layout->set_has_static_tls(); 9104 if (parameters->options().shared()) 9105 { 9106 // We need to create a dynamic relocation. 9107 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9108 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32, 9109 output_section, object, 9110 data_shndx, reloc.get_r_offset()); 9111 } 9112 break; 9113 9114 default: 9115 gold_unreachable(); 9116 } 9117 } 9118 break; 9119 9120 case elfcpp::R_ARM_PC24: 9121 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 9122 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 9123 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 9124 default: 9125 unsupported_reloc_global(object, r_type, gsym); 9126 break; 9127 } 9128 } 9129 9130 // Process relocations for gc. 9131 9132 template<bool big_endian> 9133 void 9134 Target_arm<big_endian>::gc_process_relocs( 9135 Symbol_table* symtab, 9136 Layout* layout, 9137 Sized_relobj_file<32, big_endian>* object, 9138 unsigned int data_shndx, 9139 unsigned int, 9140 const unsigned char* prelocs, 9141 size_t reloc_count, 9142 Output_section* output_section, 9143 bool needs_special_offset_handling, 9144 size_t local_symbol_count, 9145 const unsigned char* plocal_symbols) 9146 { 9147 typedef Target_arm<big_endian> Arm; 9148 typedef typename Target_arm<big_endian>::Scan Scan; 9149 9150 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan, 9151 typename Target_arm::Relocatable_size_for_reloc>( 9152 symtab, 9153 layout, 9154 this, 9155 object, 9156 data_shndx, 9157 prelocs, 9158 reloc_count, 9159 output_section, 9160 needs_special_offset_handling, 9161 local_symbol_count, 9162 plocal_symbols); 9163 } 9164 9165 // Scan relocations for a section. 9166 9167 template<bool big_endian> 9168 void 9169 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab, 9170 Layout* layout, 9171 Sized_relobj_file<32, big_endian>* object, 9172 unsigned int data_shndx, 9173 unsigned int sh_type, 9174 const unsigned char* prelocs, 9175 size_t reloc_count, 9176 Output_section* output_section, 9177 bool needs_special_offset_handling, 9178 size_t local_symbol_count, 9179 const unsigned char* plocal_symbols) 9180 { 9181 typedef typename Target_arm<big_endian>::Scan Scan; 9182 if (sh_type == elfcpp::SHT_RELA) 9183 { 9184 gold_error(_("%s: unsupported RELA reloc section"), 9185 object->name().c_str()); 9186 return; 9187 } 9188 9189 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>( 9190 symtab, 9191 layout, 9192 this, 9193 object, 9194 data_shndx, 9195 prelocs, 9196 reloc_count, 9197 output_section, 9198 needs_special_offset_handling, 9199 local_symbol_count, 9200 plocal_symbols); 9201 } 9202 9203 // Finalize the sections. 9204 9205 template<bool big_endian> 9206 void 9207 Target_arm<big_endian>::do_finalize_sections( 9208 Layout* layout, 9209 const Input_objects* input_objects, 9210 Symbol_table*) 9211 { 9212 bool merged_any_attributes = false; 9213 // Merge processor-specific flags. 9214 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 9215 p != input_objects->relobj_end(); 9216 ++p) 9217 { 9218 Arm_relobj<big_endian>* arm_relobj = 9219 Arm_relobj<big_endian>::as_arm_relobj(*p); 9220 if (arm_relobj->merge_flags_and_attributes()) 9221 { 9222 this->merge_processor_specific_flags( 9223 arm_relobj->name(), 9224 arm_relobj->processor_specific_flags()); 9225 this->merge_object_attributes(arm_relobj->name().c_str(), 9226 arm_relobj->attributes_section_data()); 9227 merged_any_attributes = true; 9228 } 9229 } 9230 9231 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); 9232 p != input_objects->dynobj_end(); 9233 ++p) 9234 { 9235 Arm_dynobj<big_endian>* arm_dynobj = 9236 Arm_dynobj<big_endian>::as_arm_dynobj(*p); 9237 this->merge_processor_specific_flags( 9238 arm_dynobj->name(), 9239 arm_dynobj->processor_specific_flags()); 9240 this->merge_object_attributes(arm_dynobj->name().c_str(), 9241 arm_dynobj->attributes_section_data()); 9242 merged_any_attributes = true; 9243 } 9244 9245 // Create an empty uninitialized attribute section if we still don't have it 9246 // at this moment. This happens if there is no attributes sections in all 9247 // inputs. 9248 if (this->attributes_section_data_ == NULL) 9249 this->attributes_section_data_ = new Attributes_section_data(NULL, 0); 9250 9251 const Object_attribute* cpu_arch_attr = 9252 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 9253 // Check if we need to use Cortex-A8 workaround. 9254 if (parameters->options().user_set_fix_cortex_a8()) 9255 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); 9256 else 9257 { 9258 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on 9259 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown 9260 // profile. 9261 const Object_attribute* cpu_arch_profile_attr = 9262 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 9263 this->fix_cortex_a8_ = 9264 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7 9265 && (cpu_arch_profile_attr->int_value() == 'A' 9266 || cpu_arch_profile_attr->int_value() == 0)); 9267 } 9268 9269 // Check if we can use V4BX interworking. 9270 // The V4BX interworking stub contains BX instruction, 9271 // which is not specified for some profiles. 9272 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING 9273 && !this->may_use_v4t_interworking()) 9274 gold_error(_("unable to provide V4BX reloc interworking fix up; " 9275 "the target profile does not support BX instruction")); 9276 9277 // Fill in some more dynamic tags. 9278 const Reloc_section* rel_plt = (this->plt_ == NULL 9279 ? NULL 9280 : this->plt_->rel_plt()); 9281 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt, 9282 this->rel_dyn_, true, false); 9283 9284 // Emit any relocs we saved in an attempt to avoid generating COPY 9285 // relocs. 9286 if (this->copy_relocs_.any_saved_relocs()) 9287 this->copy_relocs_.emit(this->rel_dyn_section(layout)); 9288 9289 // Handle the .ARM.exidx section. 9290 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 9291 9292 if (!parameters->options().relocatable()) 9293 { 9294 if (exidx_section != NULL 9295 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX) 9296 { 9297 // For the ARM target, we need to add a PT_ARM_EXIDX segment for 9298 // the .ARM.exidx section. 9299 if (!layout->script_options()->saw_phdrs_clause()) 9300 { 9301 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 9302 0) 9303 == NULL); 9304 Output_segment* exidx_segment = 9305 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R); 9306 exidx_segment->add_output_section_to_nonload(exidx_section, 9307 elfcpp::PF_R); 9308 } 9309 } 9310 } 9311 9312 // Create an .ARM.attributes section if we have merged any attributes 9313 // from inputs. 9314 if (merged_any_attributes) 9315 { 9316 Output_attributes_section_data* attributes_section = 9317 new Output_attributes_section_data(*this->attributes_section_data_); 9318 layout->add_output_section_data(".ARM.attributes", 9319 elfcpp::SHT_ARM_ATTRIBUTES, 0, 9320 attributes_section, ORDER_INVALID, 9321 false); 9322 } 9323 9324 // Fix up links in section EXIDX headers. 9325 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 9326 p != layout->section_list().end(); 9327 ++p) 9328 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 9329 { 9330 Arm_output_section<big_endian>* os = 9331 Arm_output_section<big_endian>::as_arm_output_section(*p); 9332 os->set_exidx_section_link(); 9333 } 9334 } 9335 9336 // Return whether a direct absolute static relocation needs to be applied. 9337 // In cases where Scan::local() or Scan::global() has created 9338 // a dynamic relocation other than R_ARM_RELATIVE, the addend 9339 // of the relocation is carried in the data, and we must not 9340 // apply the static relocation. 9341 9342 template<bool big_endian> 9343 inline bool 9344 Target_arm<big_endian>::Relocate::should_apply_static_reloc( 9345 const Sized_symbol<32>* gsym, 9346 unsigned int r_type, 9347 bool is_32bit, 9348 Output_section* output_section) 9349 { 9350 // If the output section is not allocated, then we didn't call 9351 // scan_relocs, we didn't create a dynamic reloc, and we must apply 9352 // the reloc here. 9353 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0) 9354 return true; 9355 9356 int ref_flags = Scan::get_reference_flags(r_type); 9357 9358 // For local symbols, we will have created a non-RELATIVE dynamic 9359 // relocation only if (a) the output is position independent, 9360 // (b) the relocation is absolute (not pc- or segment-relative), and 9361 // (c) the relocation is not 32 bits wide. 9362 if (gsym == NULL) 9363 return !(parameters->options().output_is_position_independent() 9364 && (ref_flags & Symbol::ABSOLUTE_REF) 9365 && !is_32bit); 9366 9367 // For global symbols, we use the same helper routines used in the 9368 // scan pass. If we did not create a dynamic relocation, or if we 9369 // created a RELATIVE dynamic relocation, we should apply the static 9370 // relocation. 9371 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags); 9372 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF) 9373 && gsym->can_use_relative_reloc(ref_flags 9374 & Symbol::FUNCTION_CALL); 9375 return !has_dyn || is_rel; 9376 } 9377 9378 // Perform a relocation. 9379 9380 template<bool big_endian> 9381 inline bool 9382 Target_arm<big_endian>::Relocate::relocate( 9383 const Relocate_info<32, big_endian>* relinfo, 9384 Target_arm* target, 9385 Output_section* output_section, 9386 size_t relnum, 9387 const elfcpp::Rel<32, big_endian>& rel, 9388 unsigned int r_type, 9389 const Sized_symbol<32>* gsym, 9390 const Symbol_value<32>* psymval, 9391 unsigned char* view, 9392 Arm_address address, 9393 section_size_type view_size) 9394 { 9395 if (view == NULL) 9396 return true; 9397 9398 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions; 9399 9400 r_type = get_real_reloc_type(r_type); 9401 const Arm_reloc_property* reloc_property = 9402 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 9403 if (reloc_property == NULL) 9404 { 9405 std::string reloc_name = 9406 arm_reloc_property_table->reloc_name_in_error_message(r_type); 9407 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 9408 _("cannot relocate %s in object file"), 9409 reloc_name.c_str()); 9410 return true; 9411 } 9412 9413 const Arm_relobj<big_endian>* object = 9414 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 9415 9416 // If the final branch target of a relocation is THUMB instruction, this 9417 // is 1. Otherwise it is 0. 9418 Arm_address thumb_bit = 0; 9419 Symbol_value<32> symval; 9420 bool is_weakly_undefined_without_plt = false; 9421 bool have_got_offset = false; 9422 unsigned int got_offset = 0; 9423 9424 // If the relocation uses the GOT entry of a symbol instead of the symbol 9425 // itself, we don't care about whether the symbol is defined or what kind 9426 // of symbol it is. 9427 if (reloc_property->uses_got_entry()) 9428 { 9429 // Get the GOT offset. 9430 // The GOT pointer points to the end of the GOT section. 9431 // We need to subtract the size of the GOT section to get 9432 // the actual offset to use in the relocation. 9433 // TODO: We should move GOT offset computing code in TLS relocations 9434 // to here. 9435 switch (r_type) 9436 { 9437 case elfcpp::R_ARM_GOT_BREL: 9438 case elfcpp::R_ARM_GOT_PREL: 9439 if (gsym != NULL) 9440 { 9441 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD)); 9442 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD) 9443 - target->got_size()); 9444 } 9445 else 9446 { 9447 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9448 gold_assert(object->local_has_got_offset(r_sym, 9449 GOT_TYPE_STANDARD)); 9450 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD) 9451 - target->got_size()); 9452 } 9453 have_got_offset = true; 9454 break; 9455 9456 default: 9457 break; 9458 } 9459 } 9460 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs) 9461 { 9462 if (gsym != NULL) 9463 { 9464 // This is a global symbol. Determine if we use PLT and if the 9465 // final target is THUMB. 9466 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 9467 { 9468 // This uses a PLT, change the symbol value. 9469 symval.set_output_value(target->plt_address_for_global(gsym)); 9470 psymval = &symval; 9471 } 9472 else if (gsym->is_weak_undefined()) 9473 { 9474 // This is a weakly undefined symbol and we do not use PLT 9475 // for this relocation. A branch targeting this symbol will 9476 // be converted into an NOP. 9477 is_weakly_undefined_without_plt = true; 9478 } 9479 else if (gsym->is_undefined() && reloc_property->uses_symbol()) 9480 { 9481 // This relocation uses the symbol value but the symbol is 9482 // undefined. Exit early and have the caller reporting an 9483 // error. 9484 return true; 9485 } 9486 else 9487 { 9488 // Set thumb bit if symbol: 9489 // -Has type STT_ARM_TFUNC or 9490 // -Has type STT_FUNC, is defined and with LSB in value set. 9491 thumb_bit = 9492 (((gsym->type() == elfcpp::STT_ARM_TFUNC) 9493 || (gsym->type() == elfcpp::STT_FUNC 9494 && !gsym->is_undefined() 9495 && ((psymval->value(object, 0) & 1) != 0))) 9496 ? 1 9497 : 0); 9498 } 9499 } 9500 else 9501 { 9502 // This is a local symbol. Determine if the final target is THUMB. 9503 // We saved this information when all the local symbols were read. 9504 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info(); 9505 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 9506 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 9507 9508 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym)) 9509 { 9510 symval.set_output_value( 9511 target->plt_address_for_local(object, r_sym)); 9512 psymval = &symval; 9513 } 9514 } 9515 } 9516 else 9517 { 9518 // This is a fake relocation synthesized for a stub. It does not have 9519 // a real symbol. We just look at the LSB of the symbol value to 9520 // determine if the target is THUMB or not. 9521 thumb_bit = ((psymval->value(object, 0) & 1) != 0); 9522 } 9523 9524 // Strip LSB if this points to a THUMB target. 9525 if (thumb_bit != 0 9526 && reloc_property->uses_thumb_bit() 9527 && ((psymval->value(object, 0) & 1) != 0)) 9528 { 9529 Arm_address stripped_value = 9530 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 9531 symval.set_output_value(stripped_value); 9532 psymval = &symval; 9533 } 9534 9535 // To look up relocation stubs, we need to pass the symbol table index of 9536 // a local symbol. 9537 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9538 9539 // Get the addressing origin of the output segment defining the 9540 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types). 9541 Arm_address sym_origin = 0; 9542 if (reloc_property->uses_symbol_base()) 9543 { 9544 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL) 9545 // R_ARM_BASE_ABS with the NULL symbol will give the 9546 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI 9547 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations). 9548 sym_origin = target->got_plt_section()->address(); 9549 else if (gsym == NULL) 9550 sym_origin = 0; 9551 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT) 9552 sym_origin = gsym->output_segment()->vaddr(); 9553 else if (gsym->source() == Symbol::IN_OUTPUT_DATA) 9554 sym_origin = gsym->output_data()->address(); 9555 9556 // TODO: Assumes the segment base to be zero for the global symbols 9557 // till the proper support for the segment-base-relative addressing 9558 // will be implemented. This is consistent with GNU ld. 9559 } 9560 9561 // For relative addressing relocation, find out the relative address base. 9562 Arm_address relative_address_base = 0; 9563 switch(reloc_property->relative_address_base()) 9564 { 9565 case Arm_reloc_property::RAB_NONE: 9566 // Relocations with relative address bases RAB_TLS and RAB_tp are 9567 // handled by relocate_tls. So we do not need to do anything here. 9568 case Arm_reloc_property::RAB_TLS: 9569 case Arm_reloc_property::RAB_tp: 9570 break; 9571 case Arm_reloc_property::RAB_B_S: 9572 relative_address_base = sym_origin; 9573 break; 9574 case Arm_reloc_property::RAB_GOT_ORG: 9575 relative_address_base = target->got_plt_section()->address(); 9576 break; 9577 case Arm_reloc_property::RAB_P: 9578 relative_address_base = address; 9579 break; 9580 case Arm_reloc_property::RAB_Pa: 9581 relative_address_base = address & 0xfffffffcU; 9582 break; 9583 default: 9584 gold_unreachable(); 9585 } 9586 9587 typename Arm_relocate_functions::Status reloc_status = 9588 Arm_relocate_functions::STATUS_OKAY; 9589 bool check_overflow = reloc_property->checks_overflow(); 9590 switch (r_type) 9591 { 9592 case elfcpp::R_ARM_NONE: 9593 break; 9594 9595 case elfcpp::R_ARM_ABS8: 9596 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9597 reloc_status = Arm_relocate_functions::abs8(view, object, psymval); 9598 break; 9599 9600 case elfcpp::R_ARM_ABS12: 9601 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9602 reloc_status = Arm_relocate_functions::abs12(view, object, psymval); 9603 break; 9604 9605 case elfcpp::R_ARM_ABS16: 9606 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9607 reloc_status = Arm_relocate_functions::abs16(view, object, psymval); 9608 break; 9609 9610 case elfcpp::R_ARM_ABS32: 9611 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9612 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9613 thumb_bit); 9614 break; 9615 9616 case elfcpp::R_ARM_ABS32_NOI: 9617 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9618 // No thumb bit for this relocation: (S + A) 9619 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9620 0); 9621 break; 9622 9623 case elfcpp::R_ARM_MOVW_ABS_NC: 9624 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9625 reloc_status = Arm_relocate_functions::movw(view, object, psymval, 9626 0, thumb_bit, 9627 check_overflow); 9628 break; 9629 9630 case elfcpp::R_ARM_MOVT_ABS: 9631 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9632 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0); 9633 break; 9634 9635 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 9636 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9637 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval, 9638 0, thumb_bit, false); 9639 break; 9640 9641 case elfcpp::R_ARM_THM_MOVT_ABS: 9642 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9643 reloc_status = Arm_relocate_functions::thm_movt(view, object, 9644 psymval, 0); 9645 break; 9646 9647 case elfcpp::R_ARM_MOVW_PREL_NC: 9648 case elfcpp::R_ARM_MOVW_BREL_NC: 9649 case elfcpp::R_ARM_MOVW_BREL: 9650 reloc_status = 9651 Arm_relocate_functions::movw(view, object, psymval, 9652 relative_address_base, thumb_bit, 9653 check_overflow); 9654 break; 9655 9656 case elfcpp::R_ARM_MOVT_PREL: 9657 case elfcpp::R_ARM_MOVT_BREL: 9658 reloc_status = 9659 Arm_relocate_functions::movt(view, object, psymval, 9660 relative_address_base); 9661 break; 9662 9663 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 9664 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 9665 case elfcpp::R_ARM_THM_MOVW_BREL: 9666 reloc_status = 9667 Arm_relocate_functions::thm_movw(view, object, psymval, 9668 relative_address_base, 9669 thumb_bit, check_overflow); 9670 break; 9671 9672 case elfcpp::R_ARM_THM_MOVT_PREL: 9673 case elfcpp::R_ARM_THM_MOVT_BREL: 9674 reloc_status = 9675 Arm_relocate_functions::thm_movt(view, object, psymval, 9676 relative_address_base); 9677 break; 9678 9679 case elfcpp::R_ARM_REL32: 9680 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9681 address, thumb_bit); 9682 break; 9683 9684 case elfcpp::R_ARM_THM_ABS5: 9685 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9686 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval); 9687 break; 9688 9689 // Thumb long branches. 9690 case elfcpp::R_ARM_THM_CALL: 9691 case elfcpp::R_ARM_THM_XPC22: 9692 case elfcpp::R_ARM_THM_JUMP24: 9693 reloc_status = 9694 Arm_relocate_functions::thumb_branch_common( 9695 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9696 thumb_bit, is_weakly_undefined_without_plt); 9697 break; 9698 9699 case elfcpp::R_ARM_GOTOFF32: 9700 { 9701 Arm_address got_origin; 9702 got_origin = target->got_plt_section()->address(); 9703 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9704 got_origin, thumb_bit); 9705 } 9706 break; 9707 9708 case elfcpp::R_ARM_BASE_PREL: 9709 gold_assert(gsym != NULL); 9710 reloc_status = 9711 Arm_relocate_functions::base_prel(view, sym_origin, address); 9712 break; 9713 9714 case elfcpp::R_ARM_BASE_ABS: 9715 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9716 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin); 9717 break; 9718 9719 case elfcpp::R_ARM_GOT_BREL: 9720 gold_assert(have_got_offset); 9721 reloc_status = Arm_relocate_functions::got_brel(view, got_offset); 9722 break; 9723 9724 case elfcpp::R_ARM_GOT_PREL: 9725 gold_assert(have_got_offset); 9726 // Get the address origin for GOT PLT, which is allocated right 9727 // after the GOT section, to calculate an absolute address of 9728 // the symbol GOT entry (got_origin + got_offset). 9729 Arm_address got_origin; 9730 got_origin = target->got_plt_section()->address(); 9731 reloc_status = Arm_relocate_functions::got_prel(view, 9732 got_origin + got_offset, 9733 address); 9734 break; 9735 9736 case elfcpp::R_ARM_PLT32: 9737 case elfcpp::R_ARM_CALL: 9738 case elfcpp::R_ARM_JUMP24: 9739 case elfcpp::R_ARM_XPC25: 9740 gold_assert(gsym == NULL 9741 || gsym->has_plt_offset() 9742 || gsym->final_value_is_known() 9743 || (gsym->is_defined() 9744 && !gsym->is_from_dynobj() 9745 && !gsym->is_preemptible())); 9746 reloc_status = 9747 Arm_relocate_functions::arm_branch_common( 9748 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9749 thumb_bit, is_weakly_undefined_without_plt); 9750 break; 9751 9752 case elfcpp::R_ARM_THM_JUMP19: 9753 reloc_status = 9754 Arm_relocate_functions::thm_jump19(view, object, psymval, address, 9755 thumb_bit); 9756 break; 9757 9758 case elfcpp::R_ARM_THM_JUMP6: 9759 reloc_status = 9760 Arm_relocate_functions::thm_jump6(view, object, psymval, address); 9761 break; 9762 9763 case elfcpp::R_ARM_THM_JUMP8: 9764 reloc_status = 9765 Arm_relocate_functions::thm_jump8(view, object, psymval, address); 9766 break; 9767 9768 case elfcpp::R_ARM_THM_JUMP11: 9769 reloc_status = 9770 Arm_relocate_functions::thm_jump11(view, object, psymval, address); 9771 break; 9772 9773 case elfcpp::R_ARM_PREL31: 9774 reloc_status = Arm_relocate_functions::prel31(view, object, psymval, 9775 address, thumb_bit); 9776 break; 9777 9778 case elfcpp::R_ARM_V4BX: 9779 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE) 9780 { 9781 const bool is_v4bx_interworking = 9782 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING); 9783 reloc_status = 9784 Arm_relocate_functions::v4bx(relinfo, view, object, address, 9785 is_v4bx_interworking); 9786 } 9787 break; 9788 9789 case elfcpp::R_ARM_THM_PC8: 9790 reloc_status = 9791 Arm_relocate_functions::thm_pc8(view, object, psymval, address); 9792 break; 9793 9794 case elfcpp::R_ARM_THM_PC12: 9795 reloc_status = 9796 Arm_relocate_functions::thm_pc12(view, object, psymval, address); 9797 break; 9798 9799 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 9800 reloc_status = 9801 Arm_relocate_functions::thm_alu11(view, object, psymval, address, 9802 thumb_bit); 9803 break; 9804 9805 case elfcpp::R_ARM_ALU_PC_G0_NC: 9806 case elfcpp::R_ARM_ALU_PC_G0: 9807 case elfcpp::R_ARM_ALU_PC_G1_NC: 9808 case elfcpp::R_ARM_ALU_PC_G1: 9809 case elfcpp::R_ARM_ALU_PC_G2: 9810 case elfcpp::R_ARM_ALU_SB_G0_NC: 9811 case elfcpp::R_ARM_ALU_SB_G0: 9812 case elfcpp::R_ARM_ALU_SB_G1_NC: 9813 case elfcpp::R_ARM_ALU_SB_G1: 9814 case elfcpp::R_ARM_ALU_SB_G2: 9815 reloc_status = 9816 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 9817 reloc_property->group_index(), 9818 relative_address_base, 9819 thumb_bit, check_overflow); 9820 break; 9821 9822 case elfcpp::R_ARM_LDR_PC_G0: 9823 case elfcpp::R_ARM_LDR_PC_G1: 9824 case elfcpp::R_ARM_LDR_PC_G2: 9825 case elfcpp::R_ARM_LDR_SB_G0: 9826 case elfcpp::R_ARM_LDR_SB_G1: 9827 case elfcpp::R_ARM_LDR_SB_G2: 9828 reloc_status = 9829 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 9830 reloc_property->group_index(), 9831 relative_address_base); 9832 break; 9833 9834 case elfcpp::R_ARM_LDRS_PC_G0: 9835 case elfcpp::R_ARM_LDRS_PC_G1: 9836 case elfcpp::R_ARM_LDRS_PC_G2: 9837 case elfcpp::R_ARM_LDRS_SB_G0: 9838 case elfcpp::R_ARM_LDRS_SB_G1: 9839 case elfcpp::R_ARM_LDRS_SB_G2: 9840 reloc_status = 9841 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 9842 reloc_property->group_index(), 9843 relative_address_base); 9844 break; 9845 9846 case elfcpp::R_ARM_LDC_PC_G0: 9847 case elfcpp::R_ARM_LDC_PC_G1: 9848 case elfcpp::R_ARM_LDC_PC_G2: 9849 case elfcpp::R_ARM_LDC_SB_G0: 9850 case elfcpp::R_ARM_LDC_SB_G1: 9851 case elfcpp::R_ARM_LDC_SB_G2: 9852 reloc_status = 9853 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 9854 reloc_property->group_index(), 9855 relative_address_base); 9856 break; 9857 9858 // These are initial tls relocs, which are expected when 9859 // linking. 9860 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9861 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9862 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9863 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9864 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9865 reloc_status = 9866 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval, 9867 view, address, view_size); 9868 break; 9869 9870 // The known and unknown unsupported and/or deprecated relocations. 9871 case elfcpp::R_ARM_PC24: 9872 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 9873 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 9874 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 9875 default: 9876 // Just silently leave the method. We should get an appropriate error 9877 // message in the scan methods. 9878 break; 9879 } 9880 9881 // Report any errors. 9882 switch (reloc_status) 9883 { 9884 case Arm_relocate_functions::STATUS_OKAY: 9885 break; 9886 case Arm_relocate_functions::STATUS_OVERFLOW: 9887 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 9888 _("relocation overflow in %s"), 9889 reloc_property->name().c_str()); 9890 break; 9891 case Arm_relocate_functions::STATUS_BAD_RELOC: 9892 gold_error_at_location( 9893 relinfo, 9894 relnum, 9895 rel.get_r_offset(), 9896 _("unexpected opcode while processing relocation %s"), 9897 reloc_property->name().c_str()); 9898 break; 9899 default: 9900 gold_unreachable(); 9901 } 9902 9903 return true; 9904 } 9905 9906 // Perform a TLS relocation. 9907 9908 template<bool big_endian> 9909 inline typename Arm_relocate_functions<big_endian>::Status 9910 Target_arm<big_endian>::Relocate::relocate_tls( 9911 const Relocate_info<32, big_endian>* relinfo, 9912 Target_arm<big_endian>* target, 9913 size_t relnum, 9914 const elfcpp::Rel<32, big_endian>& rel, 9915 unsigned int r_type, 9916 const Sized_symbol<32>* gsym, 9917 const Symbol_value<32>* psymval, 9918 unsigned char* view, 9919 elfcpp::Elf_types<32>::Elf_Addr address, 9920 section_size_type /*view_size*/ ) 9921 { 9922 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs; 9923 typedef Relocate_functions<32, big_endian> RelocFuncs; 9924 Output_segment* tls_segment = relinfo->layout->tls_segment(); 9925 9926 const Sized_relobj_file<32, big_endian>* object = relinfo->object; 9927 9928 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); 9929 9930 const bool is_final = (gsym == NULL 9931 ? !parameters->options().shared() 9932 : gsym->final_value_is_known()); 9933 const tls::Tls_optimization optimized_type 9934 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 9935 switch (r_type) 9936 { 9937 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9938 { 9939 unsigned int got_type = GOT_TYPE_TLS_PAIR; 9940 unsigned int got_offset; 9941 if (gsym != NULL) 9942 { 9943 gold_assert(gsym->has_got_offset(got_type)); 9944 got_offset = gsym->got_offset(got_type) - target->got_size(); 9945 } 9946 else 9947 { 9948 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9949 gold_assert(object->local_has_got_offset(r_sym, got_type)); 9950 got_offset = (object->local_got_offset(r_sym, got_type) 9951 - target->got_size()); 9952 } 9953 if (optimized_type == tls::TLSOPT_NONE) 9954 { 9955 Arm_address got_entry = 9956 target->got_plt_section()->address() + got_offset; 9957 9958 // Relocate the field with the PC relative offset of the pair of 9959 // GOT entries. 9960 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 9961 return ArmRelocFuncs::STATUS_OKAY; 9962 } 9963 } 9964 break; 9965 9966 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9967 if (optimized_type == tls::TLSOPT_NONE) 9968 { 9969 // Relocate the field with the offset of the GOT entry for 9970 // the module index. 9971 unsigned int got_offset; 9972 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL) 9973 - target->got_size()); 9974 Arm_address got_entry = 9975 target->got_plt_section()->address() + got_offset; 9976 9977 // Relocate the field with the PC relative offset of the pair of 9978 // GOT entries. 9979 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 9980 return ArmRelocFuncs::STATUS_OKAY; 9981 } 9982 break; 9983 9984 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9985 RelocFuncs::rel32_unaligned(view, value); 9986 return ArmRelocFuncs::STATUS_OKAY; 9987 9988 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9989 if (optimized_type == tls::TLSOPT_NONE) 9990 { 9991 // Relocate the field with the offset of the GOT entry for 9992 // the tp-relative offset of the symbol. 9993 unsigned int got_type = GOT_TYPE_TLS_OFFSET; 9994 unsigned int got_offset; 9995 if (gsym != NULL) 9996 { 9997 gold_assert(gsym->has_got_offset(got_type)); 9998 got_offset = gsym->got_offset(got_type); 9999 } 10000 else 10001 { 10002 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 10003 gold_assert(object->local_has_got_offset(r_sym, got_type)); 10004 got_offset = object->local_got_offset(r_sym, got_type); 10005 } 10006 10007 // All GOT offsets are relative to the end of the GOT. 10008 got_offset -= target->got_size(); 10009 10010 Arm_address got_entry = 10011 target->got_plt_section()->address() + got_offset; 10012 10013 // Relocate the field with the PC relative offset of the GOT entry. 10014 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10015 return ArmRelocFuncs::STATUS_OKAY; 10016 } 10017 break; 10018 10019 case elfcpp::R_ARM_TLS_LE32: // Local-exec 10020 // If we're creating a shared library, a dynamic relocation will 10021 // have been created for this location, so do not apply it now. 10022 if (!parameters->options().shared()) 10023 { 10024 gold_assert(tls_segment != NULL); 10025 10026 // $tp points to the TCB, which is followed by the TLS, so we 10027 // need to add TCB size to the offset. 10028 Arm_address aligned_tcb_size = 10029 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 10030 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size); 10031 10032 } 10033 return ArmRelocFuncs::STATUS_OKAY; 10034 10035 default: 10036 gold_unreachable(); 10037 } 10038 10039 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 10040 _("unsupported reloc %u"), 10041 r_type); 10042 return ArmRelocFuncs::STATUS_BAD_RELOC; 10043 } 10044 10045 // Relocate section data. 10046 10047 template<bool big_endian> 10048 void 10049 Target_arm<big_endian>::relocate_section( 10050 const Relocate_info<32, big_endian>* relinfo, 10051 unsigned int sh_type, 10052 const unsigned char* prelocs, 10053 size_t reloc_count, 10054 Output_section* output_section, 10055 bool needs_special_offset_handling, 10056 unsigned char* view, 10057 Arm_address address, 10058 section_size_type view_size, 10059 const Reloc_symbol_changes* reloc_symbol_changes) 10060 { 10061 typedef typename Target_arm<big_endian>::Relocate Arm_relocate; 10062 gold_assert(sh_type == elfcpp::SHT_REL); 10063 10064 // See if we are relocating a relaxed input section. If so, the view 10065 // covers the whole output section and we need to adjust accordingly. 10066 if (needs_special_offset_handling) 10067 { 10068 const Output_relaxed_input_section* poris = 10069 output_section->find_relaxed_input_section(relinfo->object, 10070 relinfo->data_shndx); 10071 if (poris != NULL) 10072 { 10073 Arm_address section_address = poris->address(); 10074 section_size_type section_size = poris->data_size(); 10075 10076 gold_assert((section_address >= address) 10077 && ((section_address + section_size) 10078 <= (address + view_size))); 10079 10080 off_t offset = section_address - address; 10081 view += offset; 10082 address += offset; 10083 view_size = section_size; 10084 } 10085 } 10086 10087 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL, 10088 Arm_relocate, gold::Default_comdat_behavior>( 10089 relinfo, 10090 this, 10091 prelocs, 10092 reloc_count, 10093 output_section, 10094 needs_special_offset_handling, 10095 view, 10096 address, 10097 view_size, 10098 reloc_symbol_changes); 10099 } 10100 10101 // Return the size of a relocation while scanning during a relocatable 10102 // link. 10103 10104 template<bool big_endian> 10105 unsigned int 10106 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc( 10107 unsigned int r_type, 10108 Relobj* object) 10109 { 10110 r_type = get_real_reloc_type(r_type); 10111 const Arm_reloc_property* arp = 10112 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10113 if (arp != NULL) 10114 return arp->size(); 10115 else 10116 { 10117 std::string reloc_name = 10118 arm_reloc_property_table->reloc_name_in_error_message(r_type); 10119 gold_error(_("%s: unexpected %s in object file"), 10120 object->name().c_str(), reloc_name.c_str()); 10121 return 0; 10122 } 10123 } 10124 10125 // Scan the relocs during a relocatable link. 10126 10127 template<bool big_endian> 10128 void 10129 Target_arm<big_endian>::scan_relocatable_relocs( 10130 Symbol_table* symtab, 10131 Layout* layout, 10132 Sized_relobj_file<32, big_endian>* object, 10133 unsigned int data_shndx, 10134 unsigned int sh_type, 10135 const unsigned char* prelocs, 10136 size_t reloc_count, 10137 Output_section* output_section, 10138 bool needs_special_offset_handling, 10139 size_t local_symbol_count, 10140 const unsigned char* plocal_symbols, 10141 Relocatable_relocs* rr) 10142 { 10143 gold_assert(sh_type == elfcpp::SHT_REL); 10144 10145 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL, 10146 Relocatable_size_for_reloc> Scan_relocatable_relocs; 10147 10148 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL, 10149 Scan_relocatable_relocs>( 10150 symtab, 10151 layout, 10152 object, 10153 data_shndx, 10154 prelocs, 10155 reloc_count, 10156 output_section, 10157 needs_special_offset_handling, 10158 local_symbol_count, 10159 plocal_symbols, 10160 rr); 10161 } 10162 10163 // Emit relocations for a section. 10164 10165 template<bool big_endian> 10166 void 10167 Target_arm<big_endian>::relocate_relocs( 10168 const Relocate_info<32, big_endian>* relinfo, 10169 unsigned int sh_type, 10170 const unsigned char* prelocs, 10171 size_t reloc_count, 10172 Output_section* output_section, 10173 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10174 const Relocatable_relocs* rr, 10175 unsigned char* view, 10176 Arm_address view_address, 10177 section_size_type view_size, 10178 unsigned char* reloc_view, 10179 section_size_type reloc_view_size) 10180 { 10181 gold_assert(sh_type == elfcpp::SHT_REL); 10182 10183 gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>( 10184 relinfo, 10185 prelocs, 10186 reloc_count, 10187 output_section, 10188 offset_in_output_section, 10189 rr, 10190 view, 10191 view_address, 10192 view_size, 10193 reloc_view, 10194 reloc_view_size); 10195 } 10196 10197 // Perform target-specific processing in a relocatable link. This is 10198 // only used if we use the relocation strategy RELOC_SPECIAL. 10199 10200 template<bool big_endian> 10201 void 10202 Target_arm<big_endian>::relocate_special_relocatable( 10203 const Relocate_info<32, big_endian>* relinfo, 10204 unsigned int sh_type, 10205 const unsigned char* preloc_in, 10206 size_t relnum, 10207 Output_section* output_section, 10208 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10209 unsigned char* view, 10210 elfcpp::Elf_types<32>::Elf_Addr view_address, 10211 section_size_type, 10212 unsigned char* preloc_out) 10213 { 10214 // We can only handle REL type relocation sections. 10215 gold_assert(sh_type == elfcpp::SHT_REL); 10216 10217 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype; 10218 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write 10219 Reltype_write; 10220 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1; 10221 10222 const Arm_relobj<big_endian>* object = 10223 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 10224 const unsigned int local_count = object->local_symbol_count(); 10225 10226 Reltype reloc(preloc_in); 10227 Reltype_write reloc_write(preloc_out); 10228 10229 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 10230 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 10231 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 10232 10233 const Arm_reloc_property* arp = 10234 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10235 gold_assert(arp != NULL); 10236 10237 // Get the new symbol index. 10238 // We only use RELOC_SPECIAL strategy in local relocations. 10239 gold_assert(r_sym < local_count); 10240 10241 // We are adjusting a section symbol. We need to find 10242 // the symbol table index of the section symbol for 10243 // the output section corresponding to input section 10244 // in which this symbol is defined. 10245 bool is_ordinary; 10246 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary); 10247 gold_assert(is_ordinary); 10248 Output_section* os = object->output_section(shndx); 10249 gold_assert(os != NULL); 10250 gold_assert(os->needs_symtab_index()); 10251 unsigned int new_symndx = os->symtab_index(); 10252 10253 // Get the new offset--the location in the output section where 10254 // this relocation should be applied. 10255 10256 Arm_address offset = reloc.get_r_offset(); 10257 Arm_address new_offset; 10258 if (offset_in_output_section != invalid_address) 10259 new_offset = offset + offset_in_output_section; 10260 else 10261 { 10262 section_offset_type sot_offset = 10263 convert_types<section_offset_type, Arm_address>(offset); 10264 section_offset_type new_sot_offset = 10265 output_section->output_offset(object, relinfo->data_shndx, 10266 sot_offset); 10267 gold_assert(new_sot_offset != -1); 10268 new_offset = new_sot_offset; 10269 } 10270 10271 // In an object file, r_offset is an offset within the section. 10272 // In an executable or dynamic object, generated by 10273 // --emit-relocs, r_offset is an absolute address. 10274 if (!parameters->options().relocatable()) 10275 { 10276 new_offset += view_address; 10277 if (offset_in_output_section != invalid_address) 10278 new_offset -= offset_in_output_section; 10279 } 10280 10281 reloc_write.put_r_offset(new_offset); 10282 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type)); 10283 10284 // Handle the reloc addend. 10285 // The relocation uses a section symbol in the input file. 10286 // We are adjusting it to use a section symbol in the output 10287 // file. The input section symbol refers to some address in 10288 // the input section. We need the relocation in the output 10289 // file to refer to that same address. This adjustment to 10290 // the addend is the same calculation we use for a simple 10291 // absolute relocation for the input section symbol. 10292 10293 const Symbol_value<32>* psymval = object->local_symbol(r_sym); 10294 10295 // Handle THUMB bit. 10296 Symbol_value<32> symval; 10297 Arm_address thumb_bit = 10298 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 10299 if (thumb_bit != 0 10300 && arp->uses_thumb_bit() 10301 && ((psymval->value(object, 0) & 1) != 0)) 10302 { 10303 Arm_address stripped_value = 10304 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 10305 symval.set_output_value(stripped_value); 10306 psymval = &symval; 10307 } 10308 10309 unsigned char* paddend = view + offset; 10310 typename Arm_relocate_functions<big_endian>::Status reloc_status = 10311 Arm_relocate_functions<big_endian>::STATUS_OKAY; 10312 switch (r_type) 10313 { 10314 case elfcpp::R_ARM_ABS8: 10315 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object, 10316 psymval); 10317 break; 10318 10319 case elfcpp::R_ARM_ABS12: 10320 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object, 10321 psymval); 10322 break; 10323 10324 case elfcpp::R_ARM_ABS16: 10325 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object, 10326 psymval); 10327 break; 10328 10329 case elfcpp::R_ARM_THM_ABS5: 10330 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend, 10331 object, 10332 psymval); 10333 break; 10334 10335 case elfcpp::R_ARM_MOVW_ABS_NC: 10336 case elfcpp::R_ARM_MOVW_PREL_NC: 10337 case elfcpp::R_ARM_MOVW_BREL_NC: 10338 case elfcpp::R_ARM_MOVW_BREL: 10339 reloc_status = Arm_relocate_functions<big_endian>::movw( 10340 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10341 break; 10342 10343 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 10344 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 10345 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 10346 case elfcpp::R_ARM_THM_MOVW_BREL: 10347 reloc_status = Arm_relocate_functions<big_endian>::thm_movw( 10348 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10349 break; 10350 10351 case elfcpp::R_ARM_THM_CALL: 10352 case elfcpp::R_ARM_THM_XPC22: 10353 case elfcpp::R_ARM_THM_JUMP24: 10354 reloc_status = 10355 Arm_relocate_functions<big_endian>::thumb_branch_common( 10356 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10357 false); 10358 break; 10359 10360 case elfcpp::R_ARM_PLT32: 10361 case elfcpp::R_ARM_CALL: 10362 case elfcpp::R_ARM_JUMP24: 10363 case elfcpp::R_ARM_XPC25: 10364 reloc_status = 10365 Arm_relocate_functions<big_endian>::arm_branch_common( 10366 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10367 false); 10368 break; 10369 10370 case elfcpp::R_ARM_THM_JUMP19: 10371 reloc_status = 10372 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object, 10373 psymval, 0, thumb_bit); 10374 break; 10375 10376 case elfcpp::R_ARM_THM_JUMP6: 10377 reloc_status = 10378 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval, 10379 0); 10380 break; 10381 10382 case elfcpp::R_ARM_THM_JUMP8: 10383 reloc_status = 10384 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval, 10385 0); 10386 break; 10387 10388 case elfcpp::R_ARM_THM_JUMP11: 10389 reloc_status = 10390 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval, 10391 0); 10392 break; 10393 10394 case elfcpp::R_ARM_PREL31: 10395 reloc_status = 10396 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0, 10397 thumb_bit); 10398 break; 10399 10400 case elfcpp::R_ARM_THM_PC8: 10401 reloc_status = 10402 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval, 10403 0); 10404 break; 10405 10406 case elfcpp::R_ARM_THM_PC12: 10407 reloc_status = 10408 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval, 10409 0); 10410 break; 10411 10412 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 10413 reloc_status = 10414 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval, 10415 0, thumb_bit); 10416 break; 10417 10418 // These relocation truncate relocation results so we cannot handle them 10419 // in a relocatable link. 10420 case elfcpp::R_ARM_MOVT_ABS: 10421 case elfcpp::R_ARM_THM_MOVT_ABS: 10422 case elfcpp::R_ARM_MOVT_PREL: 10423 case elfcpp::R_ARM_MOVT_BREL: 10424 case elfcpp::R_ARM_THM_MOVT_PREL: 10425 case elfcpp::R_ARM_THM_MOVT_BREL: 10426 case elfcpp::R_ARM_ALU_PC_G0_NC: 10427 case elfcpp::R_ARM_ALU_PC_G0: 10428 case elfcpp::R_ARM_ALU_PC_G1_NC: 10429 case elfcpp::R_ARM_ALU_PC_G1: 10430 case elfcpp::R_ARM_ALU_PC_G2: 10431 case elfcpp::R_ARM_ALU_SB_G0_NC: 10432 case elfcpp::R_ARM_ALU_SB_G0: 10433 case elfcpp::R_ARM_ALU_SB_G1_NC: 10434 case elfcpp::R_ARM_ALU_SB_G1: 10435 case elfcpp::R_ARM_ALU_SB_G2: 10436 case elfcpp::R_ARM_LDR_PC_G0: 10437 case elfcpp::R_ARM_LDR_PC_G1: 10438 case elfcpp::R_ARM_LDR_PC_G2: 10439 case elfcpp::R_ARM_LDR_SB_G0: 10440 case elfcpp::R_ARM_LDR_SB_G1: 10441 case elfcpp::R_ARM_LDR_SB_G2: 10442 case elfcpp::R_ARM_LDRS_PC_G0: 10443 case elfcpp::R_ARM_LDRS_PC_G1: 10444 case elfcpp::R_ARM_LDRS_PC_G2: 10445 case elfcpp::R_ARM_LDRS_SB_G0: 10446 case elfcpp::R_ARM_LDRS_SB_G1: 10447 case elfcpp::R_ARM_LDRS_SB_G2: 10448 case elfcpp::R_ARM_LDC_PC_G0: 10449 case elfcpp::R_ARM_LDC_PC_G1: 10450 case elfcpp::R_ARM_LDC_PC_G2: 10451 case elfcpp::R_ARM_LDC_SB_G0: 10452 case elfcpp::R_ARM_LDC_SB_G1: 10453 case elfcpp::R_ARM_LDC_SB_G2: 10454 gold_error(_("cannot handle %s in a relocatable link"), 10455 arp->name().c_str()); 10456 break; 10457 10458 default: 10459 gold_unreachable(); 10460 } 10461 10462 // Report any errors. 10463 switch (reloc_status) 10464 { 10465 case Arm_relocate_functions<big_endian>::STATUS_OKAY: 10466 break; 10467 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW: 10468 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10469 _("relocation overflow in %s"), 10470 arp->name().c_str()); 10471 break; 10472 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC: 10473 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10474 _("unexpected opcode while processing relocation %s"), 10475 arp->name().c_str()); 10476 break; 10477 default: 10478 gold_unreachable(); 10479 } 10480 } 10481 10482 // Return the value to use for a dynamic symbol which requires special 10483 // treatment. This is how we support equality comparisons of function 10484 // pointers across shared library boundaries, as described in the 10485 // processor specific ABI supplement. 10486 10487 template<bool big_endian> 10488 uint64_t 10489 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const 10490 { 10491 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); 10492 return this->plt_address_for_global(gsym); 10493 } 10494 10495 // Map platform-specific relocs to real relocs 10496 // 10497 template<bool big_endian> 10498 unsigned int 10499 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type) 10500 { 10501 switch (r_type) 10502 { 10503 case elfcpp::R_ARM_TARGET1: 10504 // This is either R_ARM_ABS32 or R_ARM_REL32; 10505 return elfcpp::R_ARM_ABS32; 10506 10507 case elfcpp::R_ARM_TARGET2: 10508 // This can be any reloc type but usually is R_ARM_GOT_PREL 10509 return elfcpp::R_ARM_GOT_PREL; 10510 10511 default: 10512 return r_type; 10513 } 10514 } 10515 10516 // Whether if two EABI versions V1 and V2 are compatible. 10517 10518 template<bool big_endian> 10519 bool 10520 Target_arm<big_endian>::are_eabi_versions_compatible( 10521 elfcpp::Elf_Word v1, 10522 elfcpp::Elf_Word v2) 10523 { 10524 // v4 and v5 are the same spec before and after it was released, 10525 // so allow mixing them. 10526 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN) 10527 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5) 10528 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4)) 10529 return true; 10530 10531 return v1 == v2; 10532 } 10533 10534 // Combine FLAGS from an input object called NAME and the processor-specific 10535 // flags in the ELF header of the output. Much of this is adapted from the 10536 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data 10537 // in bfd/elf32-arm.c. 10538 10539 template<bool big_endian> 10540 void 10541 Target_arm<big_endian>::merge_processor_specific_flags( 10542 const std::string& name, 10543 elfcpp::Elf_Word flags) 10544 { 10545 if (this->are_processor_specific_flags_set()) 10546 { 10547 elfcpp::Elf_Word out_flags = this->processor_specific_flags(); 10548 10549 // Nothing to merge if flags equal to those in output. 10550 if (flags == out_flags) 10551 return; 10552 10553 // Complain about various flag mismatches. 10554 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags); 10555 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags); 10556 if (!this->are_eabi_versions_compatible(version1, version2) 10557 && parameters->options().warn_mismatch()) 10558 gold_error(_("Source object %s has EABI version %d but output has " 10559 "EABI version %d."), 10560 name.c_str(), 10561 (flags & elfcpp::EF_ARM_EABIMASK) >> 24, 10562 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24); 10563 } 10564 else 10565 { 10566 // If the input is the default architecture and had the default 10567 // flags then do not bother setting the flags for the output 10568 // architecture, instead allow future merges to do this. If no 10569 // future merges ever set these flags then they will retain their 10570 // uninitialised values, which surprise surprise, correspond 10571 // to the default values. 10572 if (flags == 0) 10573 return; 10574 10575 // This is the first time, just copy the flags. 10576 // We only copy the EABI version for now. 10577 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK); 10578 } 10579 } 10580 10581 // Adjust ELF file header. 10582 template<bool big_endian> 10583 void 10584 Target_arm<big_endian>::do_adjust_elf_header( 10585 unsigned char* view, 10586 int len) 10587 { 10588 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size); 10589 10590 elfcpp::Ehdr<32, big_endian> ehdr(view); 10591 elfcpp::Elf_Word flags = this->processor_specific_flags(); 10592 unsigned char e_ident[elfcpp::EI_NIDENT]; 10593 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); 10594 10595 if (elfcpp::arm_eabi_version(flags) 10596 == elfcpp::EF_ARM_EABI_UNKNOWN) 10597 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM; 10598 else 10599 e_ident[elfcpp::EI_OSABI] = 0; 10600 e_ident[elfcpp::EI_ABIVERSION] = 0; 10601 10602 // FIXME: Do EF_ARM_BE8 adjustment. 10603 10604 // If we're working in EABI_VER5, set the hard/soft float ABI flags 10605 // as appropriate. 10606 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5) 10607 { 10608 elfcpp::Elf_Half type = ehdr.get_e_type(); 10609 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN) 10610 { 10611 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args); 10612 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp) 10613 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD; 10614 else 10615 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT; 10616 this->set_processor_specific_flags(flags); 10617 } 10618 } 10619 elfcpp::Ehdr_write<32, big_endian> oehdr(view); 10620 oehdr.put_e_ident(e_ident); 10621 oehdr.put_e_flags(this->processor_specific_flags()); 10622 } 10623 10624 // do_make_elf_object to override the same function in the base class. 10625 // We need to use a target-specific sub-class of 10626 // Sized_relobj_file<32, big_endian> to store ARM specific information. 10627 // Hence we need to have our own ELF object creation. 10628 10629 template<bool big_endian> 10630 Object* 10631 Target_arm<big_endian>::do_make_elf_object( 10632 const std::string& name, 10633 Input_file* input_file, 10634 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) 10635 { 10636 int et = ehdr.get_e_type(); 10637 // ET_EXEC files are valid input for --just-symbols/-R, 10638 // and we treat them as relocatable objects. 10639 if (et == elfcpp::ET_REL 10640 || (et == elfcpp::ET_EXEC && input_file->just_symbols())) 10641 { 10642 Arm_relobj<big_endian>* obj = 10643 new Arm_relobj<big_endian>(name, input_file, offset, ehdr); 10644 obj->setup(); 10645 return obj; 10646 } 10647 else if (et == elfcpp::ET_DYN) 10648 { 10649 Sized_dynobj<32, big_endian>* obj = 10650 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr); 10651 obj->setup(); 10652 return obj; 10653 } 10654 else 10655 { 10656 gold_error(_("%s: unsupported ELF file type %d"), 10657 name.c_str(), et); 10658 return NULL; 10659 } 10660 } 10661 10662 // Read the architecture from the Tag_also_compatible_with attribute, if any. 10663 // Returns -1 if no architecture could be read. 10664 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c. 10665 10666 template<bool big_endian> 10667 int 10668 Target_arm<big_endian>::get_secondary_compatible_arch( 10669 const Attributes_section_data* pasd) 10670 { 10671 const Object_attribute* known_attributes = 10672 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10673 10674 // Note: the tag and its argument below are uleb128 values, though 10675 // currently-defined values fit in one byte for each. 10676 const std::string& sv = 10677 known_attributes[elfcpp::Tag_also_compatible_with].string_value(); 10678 if (sv.size() == 2 10679 && sv.data()[0] == elfcpp::Tag_CPU_arch 10680 && (sv.data()[1] & 128) != 128) 10681 return sv.data()[1]; 10682 10683 // This tag is "safely ignorable", so don't complain if it looks funny. 10684 return -1; 10685 } 10686 10687 // Set, or unset, the architecture of the Tag_also_compatible_with attribute. 10688 // The tag is removed if ARCH is -1. 10689 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c. 10690 10691 template<bool big_endian> 10692 void 10693 Target_arm<big_endian>::set_secondary_compatible_arch( 10694 Attributes_section_data* pasd, 10695 int arch) 10696 { 10697 Object_attribute* known_attributes = 10698 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10699 10700 if (arch == -1) 10701 { 10702 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(""); 10703 return; 10704 } 10705 10706 // Note: the tag and its argument below are uleb128 values, though 10707 // currently-defined values fit in one byte for each. 10708 char sv[3]; 10709 sv[0] = elfcpp::Tag_CPU_arch; 10710 gold_assert(arch != 0); 10711 sv[1] = arch; 10712 sv[2] = '\0'; 10713 10714 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv); 10715 } 10716 10717 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags 10718 // into account. 10719 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c. 10720 10721 template<bool big_endian> 10722 int 10723 Target_arm<big_endian>::tag_cpu_arch_combine( 10724 const char* name, 10725 int oldtag, 10726 int* secondary_compat_out, 10727 int newtag, 10728 int secondary_compat) 10729 { 10730 #define T(X) elfcpp::TAG_CPU_ARCH_##X 10731 static const int v6t2[] = 10732 { 10733 T(V6T2), // PRE_V4. 10734 T(V6T2), // V4. 10735 T(V6T2), // V4T. 10736 T(V6T2), // V5T. 10737 T(V6T2), // V5TE. 10738 T(V6T2), // V5TEJ. 10739 T(V6T2), // V6. 10740 T(V7), // V6KZ. 10741 T(V6T2) // V6T2. 10742 }; 10743 static const int v6k[] = 10744 { 10745 T(V6K), // PRE_V4. 10746 T(V6K), // V4. 10747 T(V6K), // V4T. 10748 T(V6K), // V5T. 10749 T(V6K), // V5TE. 10750 T(V6K), // V5TEJ. 10751 T(V6K), // V6. 10752 T(V6KZ), // V6KZ. 10753 T(V7), // V6T2. 10754 T(V6K) // V6K. 10755 }; 10756 static const int v7[] = 10757 { 10758 T(V7), // PRE_V4. 10759 T(V7), // V4. 10760 T(V7), // V4T. 10761 T(V7), // V5T. 10762 T(V7), // V5TE. 10763 T(V7), // V5TEJ. 10764 T(V7), // V6. 10765 T(V7), // V6KZ. 10766 T(V7), // V6T2. 10767 T(V7), // V6K. 10768 T(V7) // V7. 10769 }; 10770 static const int v6_m[] = 10771 { 10772 -1, // PRE_V4. 10773 -1, // V4. 10774 T(V6K), // V4T. 10775 T(V6K), // V5T. 10776 T(V6K), // V5TE. 10777 T(V6K), // V5TEJ. 10778 T(V6K), // V6. 10779 T(V6KZ), // V6KZ. 10780 T(V7), // V6T2. 10781 T(V6K), // V6K. 10782 T(V7), // V7. 10783 T(V6_M) // V6_M. 10784 }; 10785 static const int v6s_m[] = 10786 { 10787 -1, // PRE_V4. 10788 -1, // V4. 10789 T(V6K), // V4T. 10790 T(V6K), // V5T. 10791 T(V6K), // V5TE. 10792 T(V6K), // V5TEJ. 10793 T(V6K), // V6. 10794 T(V6KZ), // V6KZ. 10795 T(V7), // V6T2. 10796 T(V6K), // V6K. 10797 T(V7), // V7. 10798 T(V6S_M), // V6_M. 10799 T(V6S_M) // V6S_M. 10800 }; 10801 static const int v7e_m[] = 10802 { 10803 -1, // PRE_V4. 10804 -1, // V4. 10805 T(V7E_M), // V4T. 10806 T(V7E_M), // V5T. 10807 T(V7E_M), // V5TE. 10808 T(V7E_M), // V5TEJ. 10809 T(V7E_M), // V6. 10810 T(V7E_M), // V6KZ. 10811 T(V7E_M), // V6T2. 10812 T(V7E_M), // V6K. 10813 T(V7E_M), // V7. 10814 T(V7E_M), // V6_M. 10815 T(V7E_M), // V6S_M. 10816 T(V7E_M) // V7E_M. 10817 }; 10818 static const int v8[] = 10819 { 10820 T(V8), // PRE_V4. 10821 T(V8), // V4. 10822 T(V8), // V4T. 10823 T(V8), // V5T. 10824 T(V8), // V5TE. 10825 T(V8), // V5TEJ. 10826 T(V8), // V6. 10827 T(V8), // V6KZ. 10828 T(V8), // V6T2. 10829 T(V8), // V6K. 10830 T(V8), // V7. 10831 T(V8), // V6_M. 10832 T(V8), // V6S_M. 10833 T(V8), // V7E_M. 10834 T(V8) // V8. 10835 }; 10836 static const int v4t_plus_v6_m[] = 10837 { 10838 -1, // PRE_V4. 10839 -1, // V4. 10840 T(V4T), // V4T. 10841 T(V5T), // V5T. 10842 T(V5TE), // V5TE. 10843 T(V5TEJ), // V5TEJ. 10844 T(V6), // V6. 10845 T(V6KZ), // V6KZ. 10846 T(V6T2), // V6T2. 10847 T(V6K), // V6K. 10848 T(V7), // V7. 10849 T(V6_M), // V6_M. 10850 T(V6S_M), // V6S_M. 10851 T(V7E_M), // V7E_M. 10852 T(V8), // V8. 10853 T(V4T_PLUS_V6_M) // V4T plus V6_M. 10854 }; 10855 static const int* comb[] = 10856 { 10857 v6t2, 10858 v6k, 10859 v7, 10860 v6_m, 10861 v6s_m, 10862 v7e_m, 10863 v8, 10864 // Pseudo-architecture. 10865 v4t_plus_v6_m 10866 }; 10867 10868 // Check we've not got a higher architecture than we know about. 10869 10870 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH) 10871 { 10872 gold_error(_("%s: unknown CPU architecture"), name); 10873 return -1; 10874 } 10875 10876 // Override old tag if we have a Tag_also_compatible_with on the output. 10877 10878 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) 10879 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) 10880 oldtag = T(V4T_PLUS_V6_M); 10881 10882 // And override the new tag if we have a Tag_also_compatible_with on the 10883 // input. 10884 10885 if ((newtag == T(V6_M) && secondary_compat == T(V4T)) 10886 || (newtag == T(V4T) && secondary_compat == T(V6_M))) 10887 newtag = T(V4T_PLUS_V6_M); 10888 10889 // Architectures before V6KZ add features monotonically. 10890 int tagh = std::max(oldtag, newtag); 10891 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ) 10892 return tagh; 10893 10894 int tagl = std::min(oldtag, newtag); 10895 int result = comb[tagh - T(V6T2)][tagl]; 10896 10897 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) 10898 // as the canonical version. 10899 if (result == T(V4T_PLUS_V6_M)) 10900 { 10901 result = T(V4T); 10902 *secondary_compat_out = T(V6_M); 10903 } 10904 else 10905 *secondary_compat_out = -1; 10906 10907 if (result == -1) 10908 { 10909 gold_error(_("%s: conflicting CPU architectures %d/%d"), 10910 name, oldtag, newtag); 10911 return -1; 10912 } 10913 10914 return result; 10915 #undef T 10916 } 10917 10918 // Helper to print AEABI enum tag value. 10919 10920 template<bool big_endian> 10921 std::string 10922 Target_arm<big_endian>::aeabi_enum_name(unsigned int value) 10923 { 10924 static const char* aeabi_enum_names[] = 10925 { "", "variable-size", "32-bit", "" }; 10926 const size_t aeabi_enum_names_size = 10927 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]); 10928 10929 if (value < aeabi_enum_names_size) 10930 return std::string(aeabi_enum_names[value]); 10931 else 10932 { 10933 char buffer[100]; 10934 sprintf(buffer, "<unknown value %u>", value); 10935 return std::string(buffer); 10936 } 10937 } 10938 10939 // Return the string value to store in TAG_CPU_name. 10940 10941 template<bool big_endian> 10942 std::string 10943 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value) 10944 { 10945 static const char* name_table[] = { 10946 // These aren't real CPU names, but we can't guess 10947 // that from the architecture version alone. 10948 "Pre v4", 10949 "ARM v4", 10950 "ARM v4T", 10951 "ARM v5T", 10952 "ARM v5TE", 10953 "ARM v5TEJ", 10954 "ARM v6", 10955 "ARM v6KZ", 10956 "ARM v6T2", 10957 "ARM v6K", 10958 "ARM v7", 10959 "ARM v6-M", 10960 "ARM v6S-M", 10961 "ARM v7E-M", 10962 "ARM v8" 10963 }; 10964 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]); 10965 10966 if (value < name_table_size) 10967 return std::string(name_table[value]); 10968 else 10969 { 10970 char buffer[100]; 10971 sprintf(buffer, "<unknown CPU value %u>", value); 10972 return std::string(buffer); 10973 } 10974 } 10975 10976 // Query attributes object to see if integer divide instructions may be 10977 // present in an object. 10978 10979 template<bool big_endian> 10980 bool 10981 Target_arm<big_endian>::attributes_accept_div(int arch, int profile, 10982 const Object_attribute* div_attr) 10983 { 10984 switch (div_attr->int_value()) 10985 { 10986 case 0: 10987 // Integer divide allowed if instruction contained in 10988 // archetecture. 10989 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) 10990 return true; 10991 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M) 10992 return true; 10993 else 10994 return false; 10995 10996 case 1: 10997 // Integer divide explicitly prohibited. 10998 return false; 10999 11000 default: 11001 // Unrecognised case - treat as allowing divide everywhere. 11002 case 2: 11003 // Integer divide allowed in ARM state. 11004 return true; 11005 } 11006 } 11007 11008 // Query attributes object to see if integer divide instructions are 11009 // forbidden to be in the object. This is not the inverse of 11010 // attributes_accept_div. 11011 11012 template<bool big_endian> 11013 bool 11014 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr) 11015 { 11016 return div_attr->int_value() == 1; 11017 } 11018 11019 // Merge object attributes from input file called NAME with those of the 11020 // output. The input object attributes are in the object pointed by PASD. 11021 11022 template<bool big_endian> 11023 void 11024 Target_arm<big_endian>::merge_object_attributes( 11025 const char* name, 11026 const Attributes_section_data* pasd) 11027 { 11028 // Return if there is no attributes section data. 11029 if (pasd == NULL) 11030 return; 11031 11032 // If output has no object attributes, just copy. 11033 const int vendor = Object_attribute::OBJ_ATTR_PROC; 11034 if (this->attributes_section_data_ == NULL) 11035 { 11036 this->attributes_section_data_ = new Attributes_section_data(*pasd); 11037 Object_attribute* out_attr = 11038 this->attributes_section_data_->known_attributes(vendor); 11039 11040 // We do not output objects with Tag_MPextension_use_legacy - we move 11041 // the attribute's value to Tag_MPextension_use. */ 11042 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0) 11043 { 11044 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0 11045 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() 11046 != out_attr[elfcpp::Tag_MPextension_use].int_value()) 11047 { 11048 gold_error(_("%s has both the current and legacy " 11049 "Tag_MPextension_use attributes"), 11050 name); 11051 } 11052 11053 out_attr[elfcpp::Tag_MPextension_use] = 11054 out_attr[elfcpp::Tag_MPextension_use_legacy]; 11055 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0); 11056 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0); 11057 } 11058 11059 return; 11060 } 11061 11062 const Object_attribute* in_attr = pasd->known_attributes(vendor); 11063 Object_attribute* out_attr = 11064 this->attributes_section_data_->known_attributes(vendor); 11065 11066 // This needs to happen before Tag_ABI_FP_number_model is merged. */ 11067 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11068 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) 11069 { 11070 // Ignore mismatches if the object doesn't use floating point. */ 11071 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11072 == elfcpp::AEABI_FP_number_model_none 11073 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11074 != elfcpp::AEABI_FP_number_model_none 11075 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11076 == elfcpp::AEABI_VFP_args_compatible)) 11077 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( 11078 in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); 11079 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11080 != elfcpp::AEABI_FP_number_model_none 11081 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11082 != elfcpp::AEABI_VFP_args_compatible 11083 && parameters->options().warn_mismatch()) 11084 gold_error(_("%s uses VFP register arguments, output does not"), 11085 name); 11086 } 11087 11088 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i) 11089 { 11090 // Merge this attribute with existing attributes. 11091 switch (i) 11092 { 11093 case elfcpp::Tag_CPU_raw_name: 11094 case elfcpp::Tag_CPU_name: 11095 // These are merged after Tag_CPU_arch. 11096 break; 11097 11098 case elfcpp::Tag_ABI_optimization_goals: 11099 case elfcpp::Tag_ABI_FP_optimization_goals: 11100 // Use the first value seen. 11101 break; 11102 11103 case elfcpp::Tag_CPU_arch: 11104 { 11105 unsigned int saved_out_attr = out_attr->int_value(); 11106 // Merge Tag_CPU_arch and Tag_also_compatible_with. 11107 int secondary_compat = 11108 this->get_secondary_compatible_arch(pasd); 11109 int secondary_compat_out = 11110 this->get_secondary_compatible_arch( 11111 this->attributes_section_data_); 11112 out_attr[i].set_int_value( 11113 tag_cpu_arch_combine(name, out_attr[i].int_value(), 11114 &secondary_compat_out, 11115 in_attr[i].int_value(), 11116 secondary_compat)); 11117 this->set_secondary_compatible_arch(this->attributes_section_data_, 11118 secondary_compat_out); 11119 11120 // Merge Tag_CPU_name and Tag_CPU_raw_name. 11121 if (out_attr[i].int_value() == saved_out_attr) 11122 ; // Leave the names alone. 11123 else if (out_attr[i].int_value() == in_attr[i].int_value()) 11124 { 11125 // The output architecture has been changed to match the 11126 // input architecture. Use the input names. 11127 out_attr[elfcpp::Tag_CPU_name].set_string_value( 11128 in_attr[elfcpp::Tag_CPU_name].string_value()); 11129 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value( 11130 in_attr[elfcpp::Tag_CPU_raw_name].string_value()); 11131 } 11132 else 11133 { 11134 out_attr[elfcpp::Tag_CPU_name].set_string_value(""); 11135 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(""); 11136 } 11137 11138 // If we still don't have a value for Tag_CPU_name, 11139 // make one up now. Tag_CPU_raw_name remains blank. 11140 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "") 11141 { 11142 const std::string cpu_name = 11143 this->tag_cpu_name_value(out_attr[i].int_value()); 11144 // FIXME: If we see an unknown CPU, this will be set 11145 // to "<unknown CPU n>", where n is the attribute value. 11146 // This is different from BFD, which leaves the name alone. 11147 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name); 11148 } 11149 } 11150 break; 11151 11152 case elfcpp::Tag_ARM_ISA_use: 11153 case elfcpp::Tag_THUMB_ISA_use: 11154 case elfcpp::Tag_WMMX_arch: 11155 case elfcpp::Tag_Advanced_SIMD_arch: 11156 // ??? Do Advanced_SIMD (NEON) and WMMX conflict? 11157 case elfcpp::Tag_ABI_FP_rounding: 11158 case elfcpp::Tag_ABI_FP_exceptions: 11159 case elfcpp::Tag_ABI_FP_user_exceptions: 11160 case elfcpp::Tag_ABI_FP_number_model: 11161 case elfcpp::Tag_VFP_HP_extension: 11162 case elfcpp::Tag_CPU_unaligned_access: 11163 case elfcpp::Tag_T2EE_use: 11164 case elfcpp::Tag_Virtualization_use: 11165 case elfcpp::Tag_MPextension_use: 11166 // Use the largest value specified. 11167 if (in_attr[i].int_value() > out_attr[i].int_value()) 11168 out_attr[i].set_int_value(in_attr[i].int_value()); 11169 break; 11170 11171 case elfcpp::Tag_ABI_align8_preserved: 11172 case elfcpp::Tag_ABI_PCS_RO_data: 11173 // Use the smallest value specified. 11174 if (in_attr[i].int_value() < out_attr[i].int_value()) 11175 out_attr[i].set_int_value(in_attr[i].int_value()); 11176 break; 11177 11178 case elfcpp::Tag_ABI_align8_needed: 11179 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0) 11180 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0 11181 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value() 11182 == 0))) 11183 { 11184 // This error message should be enabled once all non-conforming 11185 // binaries in the toolchain have had the attributes set 11186 // properly. 11187 // gold_error(_("output 8-byte data alignment conflicts with %s"), 11188 // name); 11189 } 11190 // Fall through. 11191 case elfcpp::Tag_ABI_FP_denormal: 11192 case elfcpp::Tag_ABI_PCS_GOT_use: 11193 { 11194 // These tags have 0 = don't care, 1 = strong requirement, 11195 // 2 = weak requirement. 11196 static const int order_021[3] = {0, 2, 1}; 11197 11198 // Use the "greatest" from the sequence 0, 2, 1, or the largest 11199 // value if greater than 2 (for future-proofing). 11200 if ((in_attr[i].int_value() > 2 11201 && in_attr[i].int_value() > out_attr[i].int_value()) 11202 || (in_attr[i].int_value() <= 2 11203 && out_attr[i].int_value() <= 2 11204 && (order_021[in_attr[i].int_value()] 11205 > order_021[out_attr[i].int_value()]))) 11206 out_attr[i].set_int_value(in_attr[i].int_value()); 11207 } 11208 break; 11209 11210 case elfcpp::Tag_CPU_arch_profile: 11211 if (out_attr[i].int_value() != in_attr[i].int_value()) 11212 { 11213 // 0 will merge with anything. 11214 // 'A' and 'S' merge to 'A'. 11215 // 'R' and 'S' merge to 'R'. 11216 // 'M' and 'A|R|S' is an error. 11217 if (out_attr[i].int_value() == 0 11218 || (out_attr[i].int_value() == 'S' 11219 && (in_attr[i].int_value() == 'A' 11220 || in_attr[i].int_value() == 'R'))) 11221 out_attr[i].set_int_value(in_attr[i].int_value()); 11222 else if (in_attr[i].int_value() == 0 11223 || (in_attr[i].int_value() == 'S' 11224 && (out_attr[i].int_value() == 'A' 11225 || out_attr[i].int_value() == 'R'))) 11226 ; // Do nothing. 11227 else if (parameters->options().warn_mismatch()) 11228 { 11229 gold_error 11230 (_("conflicting architecture profiles %c/%c"), 11231 in_attr[i].int_value() ? in_attr[i].int_value() : '0', 11232 out_attr[i].int_value() ? out_attr[i].int_value() : '0'); 11233 } 11234 } 11235 break; 11236 case elfcpp::Tag_VFP_arch: 11237 { 11238 static const struct 11239 { 11240 int ver; 11241 int regs; 11242 } vfp_versions[7] = 11243 { 11244 {0, 0}, 11245 {1, 16}, 11246 {2, 16}, 11247 {3, 32}, 11248 {3, 16}, 11249 {4, 32}, 11250 {4, 16} 11251 }; 11252 11253 // Values greater than 6 aren't defined, so just pick the 11254 // biggest. 11255 if (in_attr[i].int_value() > 6 11256 && in_attr[i].int_value() > out_attr[i].int_value()) 11257 { 11258 *out_attr = *in_attr; 11259 break; 11260 } 11261 // The output uses the superset of input features 11262 // (ISA version) and registers. 11263 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver, 11264 vfp_versions[out_attr[i].int_value()].ver); 11265 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs, 11266 vfp_versions[out_attr[i].int_value()].regs); 11267 // This assumes all possible supersets are also a valid 11268 // options. 11269 int newval; 11270 for (newval = 6; newval > 0; newval--) 11271 { 11272 if (regs == vfp_versions[newval].regs 11273 && ver == vfp_versions[newval].ver) 11274 break; 11275 } 11276 out_attr[i].set_int_value(newval); 11277 } 11278 break; 11279 case elfcpp::Tag_PCS_config: 11280 if (out_attr[i].int_value() == 0) 11281 out_attr[i].set_int_value(in_attr[i].int_value()); 11282 else if (in_attr[i].int_value() != 0 11283 && out_attr[i].int_value() != 0 11284 && parameters->options().warn_mismatch()) 11285 { 11286 // It's sometimes ok to mix different configs, so this is only 11287 // a warning. 11288 gold_warning(_("%s: conflicting platform configuration"), name); 11289 } 11290 break; 11291 case elfcpp::Tag_ABI_PCS_R9_use: 11292 if (in_attr[i].int_value() != out_attr[i].int_value() 11293 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused 11294 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused 11295 && parameters->options().warn_mismatch()) 11296 { 11297 gold_error(_("%s: conflicting use of R9"), name); 11298 } 11299 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused) 11300 out_attr[i].set_int_value(in_attr[i].int_value()); 11301 break; 11302 case elfcpp::Tag_ABI_PCS_RW_data: 11303 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel 11304 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11305 != elfcpp::AEABI_R9_SB) 11306 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11307 != elfcpp::AEABI_R9_unused) 11308 && parameters->options().warn_mismatch()) 11309 { 11310 gold_error(_("%s: SB relative addressing conflicts with use " 11311 "of R9"), 11312 name); 11313 } 11314 // Use the smallest value specified. 11315 if (in_attr[i].int_value() < out_attr[i].int_value()) 11316 out_attr[i].set_int_value(in_attr[i].int_value()); 11317 break; 11318 case elfcpp::Tag_ABI_PCS_wchar_t: 11319 if (out_attr[i].int_value() 11320 && in_attr[i].int_value() 11321 && out_attr[i].int_value() != in_attr[i].int_value() 11322 && parameters->options().warn_mismatch() 11323 && parameters->options().wchar_size_warning()) 11324 { 11325 gold_warning(_("%s uses %u-byte wchar_t yet the output is to " 11326 "use %u-byte wchar_t; use of wchar_t values " 11327 "across objects may fail"), 11328 name, in_attr[i].int_value(), 11329 out_attr[i].int_value()); 11330 } 11331 else if (in_attr[i].int_value() && !out_attr[i].int_value()) 11332 out_attr[i].set_int_value(in_attr[i].int_value()); 11333 break; 11334 case elfcpp::Tag_ABI_enum_size: 11335 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused) 11336 { 11337 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused 11338 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide) 11339 { 11340 // The existing object is compatible with anything. 11341 // Use whatever requirements the new object has. 11342 out_attr[i].set_int_value(in_attr[i].int_value()); 11343 } 11344 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide 11345 && out_attr[i].int_value() != in_attr[i].int_value() 11346 && parameters->options().warn_mismatch() 11347 && parameters->options().enum_size_warning()) 11348 { 11349 unsigned int in_value = in_attr[i].int_value(); 11350 unsigned int out_value = out_attr[i].int_value(); 11351 gold_warning(_("%s uses %s enums yet the output is to use " 11352 "%s enums; use of enum values across objects " 11353 "may fail"), 11354 name, 11355 this->aeabi_enum_name(in_value).c_str(), 11356 this->aeabi_enum_name(out_value).c_str()); 11357 } 11358 } 11359 break; 11360 case elfcpp::Tag_ABI_VFP_args: 11361 // Already done. 11362 break; 11363 case elfcpp::Tag_ABI_WMMX_args: 11364 if (in_attr[i].int_value() != out_attr[i].int_value() 11365 && parameters->options().warn_mismatch()) 11366 { 11367 gold_error(_("%s uses iWMMXt register arguments, output does " 11368 "not"), 11369 name); 11370 } 11371 break; 11372 case Object_attribute::Tag_compatibility: 11373 // Merged in target-independent code. 11374 break; 11375 case elfcpp::Tag_ABI_HardFP_use: 11376 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). 11377 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2) 11378 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1)) 11379 out_attr[i].set_int_value(3); 11380 else if (in_attr[i].int_value() > out_attr[i].int_value()) 11381 out_attr[i].set_int_value(in_attr[i].int_value()); 11382 break; 11383 case elfcpp::Tag_ABI_FP_16bit_format: 11384 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) 11385 { 11386 if (in_attr[i].int_value() != out_attr[i].int_value() 11387 && parameters->options().warn_mismatch()) 11388 gold_error(_("fp16 format mismatch between %s and output"), 11389 name); 11390 } 11391 if (in_attr[i].int_value() != 0) 11392 out_attr[i].set_int_value(in_attr[i].int_value()); 11393 break; 11394 11395 case elfcpp::Tag_DIV_use: 11396 { 11397 // A value of zero on input means that the divide 11398 // instruction may be used if available in the base 11399 // architecture as specified via Tag_CPU_arch and 11400 // Tag_CPU_arch_profile. A value of 1 means that the user 11401 // did not want divide instructions. A value of 2 11402 // explicitly means that divide instructions were allowed 11403 // in ARM and Thumb state. 11404 int arch = this-> 11405 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)-> 11406 int_value(); 11407 int profile = this-> 11408 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)-> 11409 int_value(); 11410 if (in_attr[i].int_value() == out_attr[i].int_value()) 11411 { 11412 // Do nothing. 11413 } 11414 else if (attributes_forbid_div(&in_attr[i]) 11415 && !attributes_accept_div(arch, profile, &out_attr[i])) 11416 out_attr[i].set_int_value(1); 11417 else if (attributes_forbid_div(&out_attr[i]) 11418 && attributes_accept_div(arch, profile, &in_attr[i])) 11419 out_attr[i].set_int_value(in_attr[i].int_value()); 11420 else if (in_attr[i].int_value() == 2) 11421 out_attr[i].set_int_value(in_attr[i].int_value()); 11422 } 11423 break; 11424 11425 case elfcpp::Tag_MPextension_use_legacy: 11426 // We don't output objects with Tag_MPextension_use_legacy - we 11427 // move the value to Tag_MPextension_use. 11428 if (in_attr[i].int_value() != 0 11429 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0) 11430 { 11431 if (in_attr[elfcpp::Tag_MPextension_use].int_value() 11432 != in_attr[i].int_value()) 11433 { 11434 gold_error(_("%s has has both the current and legacy " 11435 "Tag_MPextension_use attributes"), 11436 name); 11437 } 11438 } 11439 11440 if (in_attr[i].int_value() 11441 > out_attr[elfcpp::Tag_MPextension_use].int_value()) 11442 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i]; 11443 11444 break; 11445 11446 case elfcpp::Tag_nodefaults: 11447 // This tag is set if it exists, but the value is unused (and is 11448 // typically zero). We don't actually need to do anything here - 11449 // the merge happens automatically when the type flags are merged 11450 // below. 11451 break; 11452 case elfcpp::Tag_also_compatible_with: 11453 // Already done in Tag_CPU_arch. 11454 break; 11455 case elfcpp::Tag_conformance: 11456 // Keep the attribute if it matches. Throw it away otherwise. 11457 // No attribute means no claim to conform. 11458 if (in_attr[i].string_value() != out_attr[i].string_value()) 11459 out_attr[i].set_string_value(""); 11460 break; 11461 11462 default: 11463 { 11464 const char* err_object = NULL; 11465 11466 // The "known_obj_attributes" table does contain some undefined 11467 // attributes. Ensure that there are unused. 11468 if (out_attr[i].int_value() != 0 11469 || out_attr[i].string_value() != "") 11470 err_object = "output"; 11471 else if (in_attr[i].int_value() != 0 11472 || in_attr[i].string_value() != "") 11473 err_object = name; 11474 11475 if (err_object != NULL 11476 && parameters->options().warn_mismatch()) 11477 { 11478 // Attribute numbers >=64 (mod 128) can be safely ignored. 11479 if ((i & 127) < 64) 11480 gold_error(_("%s: unknown mandatory EABI object attribute " 11481 "%d"), 11482 err_object, i); 11483 else 11484 gold_warning(_("%s: unknown EABI object attribute %d"), 11485 err_object, i); 11486 } 11487 11488 // Only pass on attributes that match in both inputs. 11489 if (!in_attr[i].matches(out_attr[i])) 11490 { 11491 out_attr[i].set_int_value(0); 11492 out_attr[i].set_string_value(""); 11493 } 11494 } 11495 } 11496 11497 // If out_attr was copied from in_attr then it won't have a type yet. 11498 if (in_attr[i].type() && !out_attr[i].type()) 11499 out_attr[i].set_type(in_attr[i].type()); 11500 } 11501 11502 // Merge Tag_compatibility attributes and any common GNU ones. 11503 this->attributes_section_data_->merge(name, pasd); 11504 11505 // Check for any attributes not known on ARM. 11506 typedef Vendor_object_attributes::Other_attributes Other_attributes; 11507 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor); 11508 Other_attributes::const_iterator in_iter = in_other_attributes->begin(); 11509 Other_attributes* out_other_attributes = 11510 this->attributes_section_data_->other_attributes(vendor); 11511 Other_attributes::iterator out_iter = out_other_attributes->begin(); 11512 11513 while (in_iter != in_other_attributes->end() 11514 || out_iter != out_other_attributes->end()) 11515 { 11516 const char* err_object = NULL; 11517 int err_tag = 0; 11518 11519 // The tags for each list are in numerical order. 11520 // If the tags are equal, then merge. 11521 if (out_iter != out_other_attributes->end() 11522 && (in_iter == in_other_attributes->end() 11523 || in_iter->first > out_iter->first)) 11524 { 11525 // This attribute only exists in output. We can't merge, and we 11526 // don't know what the tag means, so delete it. 11527 err_object = "output"; 11528 err_tag = out_iter->first; 11529 int saved_tag = out_iter->first; 11530 delete out_iter->second; 11531 out_other_attributes->erase(out_iter); 11532 out_iter = out_other_attributes->upper_bound(saved_tag); 11533 } 11534 else if (in_iter != in_other_attributes->end() 11535 && (out_iter != out_other_attributes->end() 11536 || in_iter->first < out_iter->first)) 11537 { 11538 // This attribute only exists in input. We can't merge, and we 11539 // don't know what the tag means, so ignore it. 11540 err_object = name; 11541 err_tag = in_iter->first; 11542 ++in_iter; 11543 } 11544 else // The tags are equal. 11545 { 11546 // As present, all attributes in the list are unknown, and 11547 // therefore can't be merged meaningfully. 11548 err_object = "output"; 11549 err_tag = out_iter->first; 11550 11551 // Only pass on attributes that match in both inputs. 11552 if (!in_iter->second->matches(*(out_iter->second))) 11553 { 11554 // No match. Delete the attribute. 11555 int saved_tag = out_iter->first; 11556 delete out_iter->second; 11557 out_other_attributes->erase(out_iter); 11558 out_iter = out_other_attributes->upper_bound(saved_tag); 11559 } 11560 else 11561 { 11562 // Matched. Keep the attribute and move to the next. 11563 ++out_iter; 11564 ++in_iter; 11565 } 11566 } 11567 11568 if (err_object && parameters->options().warn_mismatch()) 11569 { 11570 // Attribute numbers >=64 (mod 128) can be safely ignored. */ 11571 if ((err_tag & 127) < 64) 11572 { 11573 gold_error(_("%s: unknown mandatory EABI object attribute %d"), 11574 err_object, err_tag); 11575 } 11576 else 11577 { 11578 gold_warning(_("%s: unknown EABI object attribute %d"), 11579 err_object, err_tag); 11580 } 11581 } 11582 } 11583 } 11584 11585 // Stub-generation methods for Target_arm. 11586 11587 // Make a new Arm_input_section object. 11588 11589 template<bool big_endian> 11590 Arm_input_section<big_endian>* 11591 Target_arm<big_endian>::new_arm_input_section( 11592 Relobj* relobj, 11593 unsigned int shndx) 11594 { 11595 Section_id sid(relobj, shndx); 11596 11597 Arm_input_section<big_endian>* arm_input_section = 11598 new Arm_input_section<big_endian>(relobj, shndx); 11599 arm_input_section->init(); 11600 11601 // Register new Arm_input_section in map for look-up. 11602 std::pair<typename Arm_input_section_map::iterator, bool> ins = 11603 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section)); 11604 11605 // Make sure that it we have not created another Arm_input_section 11606 // for this input section already. 11607 gold_assert(ins.second); 11608 11609 return arm_input_section; 11610 } 11611 11612 // Find the Arm_input_section object corresponding to the SHNDX-th input 11613 // section of RELOBJ. 11614 11615 template<bool big_endian> 11616 Arm_input_section<big_endian>* 11617 Target_arm<big_endian>::find_arm_input_section( 11618 Relobj* relobj, 11619 unsigned int shndx) const 11620 { 11621 Section_id sid(relobj, shndx); 11622 typename Arm_input_section_map::const_iterator p = 11623 this->arm_input_section_map_.find(sid); 11624 return (p != this->arm_input_section_map_.end()) ? p->second : NULL; 11625 } 11626 11627 // Make a new stub table. 11628 11629 template<bool big_endian> 11630 Stub_table<big_endian>* 11631 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner) 11632 { 11633 Stub_table<big_endian>* stub_table = 11634 new Stub_table<big_endian>(owner); 11635 this->stub_tables_.push_back(stub_table); 11636 11637 stub_table->set_address(owner->address() + owner->data_size()); 11638 stub_table->set_file_offset(owner->offset() + owner->data_size()); 11639 stub_table->finalize_data_size(); 11640 11641 return stub_table; 11642 } 11643 11644 // Scan a relocation for stub generation. 11645 11646 template<bool big_endian> 11647 void 11648 Target_arm<big_endian>::scan_reloc_for_stub( 11649 const Relocate_info<32, big_endian>* relinfo, 11650 unsigned int r_type, 11651 const Sized_symbol<32>* gsym, 11652 unsigned int r_sym, 11653 const Symbol_value<32>* psymval, 11654 elfcpp::Elf_types<32>::Elf_Swxword addend, 11655 Arm_address address) 11656 { 11657 const Arm_relobj<big_endian>* arm_relobj = 11658 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 11659 11660 bool target_is_thumb; 11661 Symbol_value<32> symval; 11662 if (gsym != NULL) 11663 { 11664 // This is a global symbol. Determine if we use PLT and if the 11665 // final target is THUMB. 11666 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 11667 { 11668 // This uses a PLT, change the symbol value. 11669 symval.set_output_value(this->plt_address_for_global(gsym)); 11670 psymval = &symval; 11671 target_is_thumb = false; 11672 } 11673 else if (gsym->is_undefined()) 11674 // There is no need to generate a stub symbol is undefined. 11675 return; 11676 else 11677 { 11678 target_is_thumb = 11679 ((gsym->type() == elfcpp::STT_ARM_TFUNC) 11680 || (gsym->type() == elfcpp::STT_FUNC 11681 && !gsym->is_undefined() 11682 && ((psymval->value(arm_relobj, 0) & 1) != 0))); 11683 } 11684 } 11685 else 11686 { 11687 // This is a local symbol. Determine if the final target is THUMB. 11688 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym); 11689 } 11690 11691 // Strip LSB if this points to a THUMB target. 11692 const Arm_reloc_property* reloc_property = 11693 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 11694 gold_assert(reloc_property != NULL); 11695 if (target_is_thumb 11696 && reloc_property->uses_thumb_bit() 11697 && ((psymval->value(arm_relobj, 0) & 1) != 0)) 11698 { 11699 Arm_address stripped_value = 11700 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1); 11701 symval.set_output_value(stripped_value); 11702 psymval = &symval; 11703 } 11704 11705 // Get the symbol value. 11706 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0); 11707 11708 // Owing to pipelining, the PC relative branches below actually skip 11709 // two instructions when the branch offset is 0. 11710 Arm_address destination; 11711 switch (r_type) 11712 { 11713 case elfcpp::R_ARM_CALL: 11714 case elfcpp::R_ARM_JUMP24: 11715 case elfcpp::R_ARM_PLT32: 11716 // ARM branches. 11717 destination = value + addend + 8; 11718 break; 11719 case elfcpp::R_ARM_THM_CALL: 11720 case elfcpp::R_ARM_THM_XPC22: 11721 case elfcpp::R_ARM_THM_JUMP24: 11722 case elfcpp::R_ARM_THM_JUMP19: 11723 // THUMB branches. 11724 destination = value + addend + 4; 11725 break; 11726 default: 11727 gold_unreachable(); 11728 } 11729 11730 Reloc_stub* stub = NULL; 11731 Stub_type stub_type = 11732 Reloc_stub::stub_type_for_reloc(r_type, address, destination, 11733 target_is_thumb); 11734 if (stub_type != arm_stub_none) 11735 { 11736 // Try looking up an existing stub from a stub table. 11737 Stub_table<big_endian>* stub_table = 11738 arm_relobj->stub_table(relinfo->data_shndx); 11739 gold_assert(stub_table != NULL); 11740 11741 // Locate stub by destination. 11742 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend); 11743 11744 // Create a stub if there is not one already 11745 stub = stub_table->find_reloc_stub(stub_key); 11746 if (stub == NULL) 11747 { 11748 // create a new stub and add it to stub table. 11749 stub = this->stub_factory().make_reloc_stub(stub_type); 11750 stub_table->add_reloc_stub(stub, stub_key); 11751 } 11752 11753 // Record the destination address. 11754 stub->set_destination_address(destination 11755 | (target_is_thumb ? 1 : 0)); 11756 } 11757 11758 // For Cortex-A8, we need to record a relocation at 4K page boundary. 11759 if (this->fix_cortex_a8_ 11760 && (r_type == elfcpp::R_ARM_THM_JUMP24 11761 || r_type == elfcpp::R_ARM_THM_JUMP19 11762 || r_type == elfcpp::R_ARM_THM_CALL 11763 || r_type == elfcpp::R_ARM_THM_XPC22) 11764 && (address & 0xfffU) == 0xffeU) 11765 { 11766 // Found a candidate. Note we haven't checked the destination is 11767 // within 4K here: if we do so (and don't create a record) we can't 11768 // tell that a branch should have been relocated when scanning later. 11769 this->cortex_a8_relocs_info_[address] = 11770 new Cortex_a8_reloc(stub, r_type, 11771 destination | (target_is_thumb ? 1 : 0)); 11772 } 11773 } 11774 11775 // This function scans a relocation sections for stub generation. 11776 // The template parameter Relocate must be a class type which provides 11777 // a single function, relocate(), which implements the machine 11778 // specific part of a relocation. 11779 11780 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type: 11781 // SHT_REL or SHT_RELA. 11782 11783 // PRELOCS points to the relocation data. RELOC_COUNT is the number 11784 // of relocs. OUTPUT_SECTION is the output section. 11785 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be 11786 // mapped to output offsets. 11787 11788 // VIEW is the section data, VIEW_ADDRESS is its memory address, and 11789 // VIEW_SIZE is the size. These refer to the input section, unless 11790 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to 11791 // the output section. 11792 11793 template<bool big_endian> 11794 template<int sh_type> 11795 void inline 11796 Target_arm<big_endian>::scan_reloc_section_for_stubs( 11797 const Relocate_info<32, big_endian>* relinfo, 11798 const unsigned char* prelocs, 11799 size_t reloc_count, 11800 Output_section* output_section, 11801 bool needs_special_offset_handling, 11802 const unsigned char* view, 11803 elfcpp::Elf_types<32>::Elf_Addr view_address, 11804 section_size_type) 11805 { 11806 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype; 11807 const int reloc_size = 11808 Reloc_types<sh_type, 32, big_endian>::reloc_size; 11809 11810 Arm_relobj<big_endian>* arm_object = 11811 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 11812 unsigned int local_count = arm_object->local_symbol_count(); 11813 11814 gold::Default_comdat_behavior default_comdat_behavior; 11815 Comdat_behavior comdat_behavior = CB_UNDETERMINED; 11816 11817 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 11818 { 11819 Reltype reloc(prelocs); 11820 11821 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 11822 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 11823 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 11824 11825 r_type = this->get_real_reloc_type(r_type); 11826 11827 // Only a few relocation types need stubs. 11828 if ((r_type != elfcpp::R_ARM_CALL) 11829 && (r_type != elfcpp::R_ARM_JUMP24) 11830 && (r_type != elfcpp::R_ARM_PLT32) 11831 && (r_type != elfcpp::R_ARM_THM_CALL) 11832 && (r_type != elfcpp::R_ARM_THM_XPC22) 11833 && (r_type != elfcpp::R_ARM_THM_JUMP24) 11834 && (r_type != elfcpp::R_ARM_THM_JUMP19) 11835 && (r_type != elfcpp::R_ARM_V4BX)) 11836 continue; 11837 11838 section_offset_type offset = 11839 convert_to_section_size_type(reloc.get_r_offset()); 11840 11841 if (needs_special_offset_handling) 11842 { 11843 offset = output_section->output_offset(relinfo->object, 11844 relinfo->data_shndx, 11845 offset); 11846 if (offset == -1) 11847 continue; 11848 } 11849 11850 // Create a v4bx stub if --fix-v4bx-interworking is used. 11851 if (r_type == elfcpp::R_ARM_V4BX) 11852 { 11853 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING) 11854 { 11855 // Get the BX instruction. 11856 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 11857 const Valtype* wv = 11858 reinterpret_cast<const Valtype*>(view + offset); 11859 elfcpp::Elf_types<32>::Elf_Swxword insn = 11860 elfcpp::Swap<32, big_endian>::readval(wv); 11861 const uint32_t reg = (insn & 0xf); 11862 11863 if (reg < 0xf) 11864 { 11865 // Try looking up an existing stub from a stub table. 11866 Stub_table<big_endian>* stub_table = 11867 arm_object->stub_table(relinfo->data_shndx); 11868 gold_assert(stub_table != NULL); 11869 11870 if (stub_table->find_arm_v4bx_stub(reg) == NULL) 11871 { 11872 // create a new stub and add it to stub table. 11873 Arm_v4bx_stub* stub = 11874 this->stub_factory().make_arm_v4bx_stub(reg); 11875 gold_assert(stub != NULL); 11876 stub_table->add_arm_v4bx_stub(stub); 11877 } 11878 } 11879 } 11880 continue; 11881 } 11882 11883 // Get the addend. 11884 Stub_addend_reader<sh_type, big_endian> stub_addend_reader; 11885 elfcpp::Elf_types<32>::Elf_Swxword addend = 11886 stub_addend_reader(r_type, view + offset, reloc); 11887 11888 const Sized_symbol<32>* sym; 11889 11890 Symbol_value<32> symval; 11891 const Symbol_value<32> *psymval; 11892 bool is_defined_in_discarded_section; 11893 unsigned int shndx; 11894 if (r_sym < local_count) 11895 { 11896 sym = NULL; 11897 psymval = arm_object->local_symbol(r_sym); 11898 11899 // If the local symbol belongs to a section we are discarding, 11900 // and that section is a debug section, try to find the 11901 // corresponding kept section and map this symbol to its 11902 // counterpart in the kept section. The symbol must not 11903 // correspond to a section we are folding. 11904 bool is_ordinary; 11905 shndx = psymval->input_shndx(&is_ordinary); 11906 is_defined_in_discarded_section = 11907 (is_ordinary 11908 && shndx != elfcpp::SHN_UNDEF 11909 && !arm_object->is_section_included(shndx) 11910 && !relinfo->symtab->is_section_folded(arm_object, shndx)); 11911 11912 // We need to compute the would-be final value of this local 11913 // symbol. 11914 if (!is_defined_in_discarded_section) 11915 { 11916 typedef Sized_relobj_file<32, big_endian> ObjType; 11917 typename ObjType::Compute_final_local_value_status status = 11918 arm_object->compute_final_local_value(r_sym, psymval, &symval, 11919 relinfo->symtab); 11920 if (status == ObjType::CFLV_OK) 11921 { 11922 // Currently we cannot handle a branch to a target in 11923 // a merged section. If this is the case, issue an error 11924 // and also free the merge symbol value. 11925 if (!symval.has_output_value()) 11926 { 11927 const std::string& section_name = 11928 arm_object->section_name(shndx); 11929 arm_object->error(_("cannot handle branch to local %u " 11930 "in a merged section %s"), 11931 r_sym, section_name.c_str()); 11932 } 11933 psymval = &symval; 11934 } 11935 else 11936 { 11937 // We cannot determine the final value. 11938 continue; 11939 } 11940 } 11941 } 11942 else 11943 { 11944 const Symbol* gsym; 11945 gsym = arm_object->global_symbol(r_sym); 11946 gold_assert(gsym != NULL); 11947 if (gsym->is_forwarder()) 11948 gsym = relinfo->symtab->resolve_forwards(gsym); 11949 11950 sym = static_cast<const Sized_symbol<32>*>(gsym); 11951 if (sym->has_symtab_index() && sym->symtab_index() != -1U) 11952 symval.set_output_symtab_index(sym->symtab_index()); 11953 else 11954 symval.set_no_output_symtab_entry(); 11955 11956 // We need to compute the would-be final value of this global 11957 // symbol. 11958 const Symbol_table* symtab = relinfo->symtab; 11959 const Sized_symbol<32>* sized_symbol = 11960 symtab->get_sized_symbol<32>(gsym); 11961 Symbol_table::Compute_final_value_status status; 11962 Arm_address value = 11963 symtab->compute_final_value<32>(sized_symbol, &status); 11964 11965 // Skip this if the symbol has not output section. 11966 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION) 11967 continue; 11968 symval.set_output_value(value); 11969 11970 if (gsym->type() == elfcpp::STT_TLS) 11971 symval.set_is_tls_symbol(); 11972 else if (gsym->type() == elfcpp::STT_GNU_IFUNC) 11973 symval.set_is_ifunc_symbol(); 11974 psymval = &symval; 11975 11976 is_defined_in_discarded_section = 11977 (gsym->is_defined_in_discarded_section() 11978 && gsym->is_undefined()); 11979 shndx = 0; 11980 } 11981 11982 Symbol_value<32> symval2; 11983 if (is_defined_in_discarded_section) 11984 { 11985 if (comdat_behavior == CB_UNDETERMINED) 11986 { 11987 std::string name = arm_object->section_name(relinfo->data_shndx); 11988 comdat_behavior = default_comdat_behavior.get(name.c_str()); 11989 } 11990 if (comdat_behavior == CB_PRETEND) 11991 { 11992 // FIXME: This case does not work for global symbols. 11993 // We have no place to store the original section index. 11994 // Fortunately this does not matter for comdat sections, 11995 // only for sections explicitly discarded by a linker 11996 // script. 11997 bool found; 11998 typename elfcpp::Elf_types<32>::Elf_Addr value = 11999 arm_object->map_to_kept_section(shndx, &found); 12000 if (found) 12001 symval2.set_output_value(value + psymval->input_value()); 12002 else 12003 symval2.set_output_value(0); 12004 } 12005 else 12006 { 12007 if (comdat_behavior == CB_WARNING) 12008 gold_warning_at_location(relinfo, i, offset, 12009 _("relocation refers to discarded " 12010 "section")); 12011 symval2.set_output_value(0); 12012 } 12013 symval2.set_no_output_symtab_entry(); 12014 psymval = &symval2; 12015 } 12016 12017 // If symbol is a section symbol, we don't know the actual type of 12018 // destination. Give up. 12019 if (psymval->is_section_symbol()) 12020 continue; 12021 12022 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval, 12023 addend, view_address + offset); 12024 } 12025 } 12026 12027 // Scan an input section for stub generation. 12028 12029 template<bool big_endian> 12030 void 12031 Target_arm<big_endian>::scan_section_for_stubs( 12032 const Relocate_info<32, big_endian>* relinfo, 12033 unsigned int sh_type, 12034 const unsigned char* prelocs, 12035 size_t reloc_count, 12036 Output_section* output_section, 12037 bool needs_special_offset_handling, 12038 const unsigned char* view, 12039 Arm_address view_address, 12040 section_size_type view_size) 12041 { 12042 if (sh_type == elfcpp::SHT_REL) 12043 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>( 12044 relinfo, 12045 prelocs, 12046 reloc_count, 12047 output_section, 12048 needs_special_offset_handling, 12049 view, 12050 view_address, 12051 view_size); 12052 else if (sh_type == elfcpp::SHT_RELA) 12053 // We do not support RELA type relocations yet. This is provided for 12054 // completeness. 12055 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>( 12056 relinfo, 12057 prelocs, 12058 reloc_count, 12059 output_section, 12060 needs_special_offset_handling, 12061 view, 12062 view_address, 12063 view_size); 12064 else 12065 gold_unreachable(); 12066 } 12067 12068 // Group input sections for stub generation. 12069 // 12070 // We group input sections in an output section so that the total size, 12071 // including any padding space due to alignment is smaller than GROUP_SIZE 12072 // unless the only input section in group is bigger than GROUP_SIZE already. 12073 // Then an ARM stub table is created to follow the last input section 12074 // in group. For each group an ARM stub table is created an is placed 12075 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further 12076 // extend the group after the stub table. 12077 12078 template<bool big_endian> 12079 void 12080 Target_arm<big_endian>::group_sections( 12081 Layout* layout, 12082 section_size_type group_size, 12083 bool stubs_always_after_branch, 12084 const Task* task) 12085 { 12086 // Group input sections and insert stub table 12087 Layout::Section_list section_list; 12088 layout->get_executable_sections(§ion_list); 12089 for (Layout::Section_list::const_iterator p = section_list.begin(); 12090 p != section_list.end(); 12091 ++p) 12092 { 12093 Arm_output_section<big_endian>* output_section = 12094 Arm_output_section<big_endian>::as_arm_output_section(*p); 12095 output_section->group_sections(group_size, stubs_always_after_branch, 12096 this, task); 12097 } 12098 } 12099 12100 // Relaxation hook. This is where we do stub generation. 12101 12102 template<bool big_endian> 12103 bool 12104 Target_arm<big_endian>::do_relax( 12105 int pass, 12106 const Input_objects* input_objects, 12107 Symbol_table* symtab, 12108 Layout* layout, 12109 const Task* task) 12110 { 12111 // No need to generate stubs if this is a relocatable link. 12112 gold_assert(!parameters->options().relocatable()); 12113 12114 // If this is the first pass, we need to group input sections into 12115 // stub groups. 12116 bool done_exidx_fixup = false; 12117 typedef typename Stub_table_list::iterator Stub_table_iterator; 12118 if (pass == 1) 12119 { 12120 // Determine the stub group size. The group size is the absolute 12121 // value of the parameter --stub-group-size. If --stub-group-size 12122 // is passed a negative value, we restrict stubs to be always after 12123 // the stubbed branches. 12124 int32_t stub_group_size_param = 12125 parameters->options().stub_group_size(); 12126 bool stubs_always_after_branch = stub_group_size_param < 0; 12127 section_size_type stub_group_size = abs(stub_group_size_param); 12128 12129 if (stub_group_size == 1) 12130 { 12131 // Default value. 12132 // Thumb branch range is +-4MB has to be used as the default 12133 // maximum size (a given section can contain both ARM and Thumb 12134 // code, so the worst case has to be taken into account). If we are 12135 // fixing cortex-a8 errata, the branch range has to be even smaller, 12136 // since wide conditional branch has a range of +-1MB only. 12137 // 12138 // This value is 48K less than that, which allows for 4096 12139 // 12-byte stubs. If we exceed that, then we will fail to link. 12140 // The user will have to relink with an explicit group size 12141 // option. 12142 stub_group_size = 4145152; 12143 } 12144 12145 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K 12146 // page as the first half of a 32-bit branch straddling two 4K pages. 12147 // This is a crude way of enforcing that. In addition, long conditional 12148 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8 12149 // erratum, limit the group size to (1M - 12k) to avoid unreachable 12150 // cortex-A8 stubs from long conditional branches. 12151 if (this->fix_cortex_a8_) 12152 { 12153 stubs_always_after_branch = true; 12154 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12); 12155 stub_group_size = std::max(stub_group_size, cortex_a8_group_size); 12156 } 12157 12158 group_sections(layout, stub_group_size, stubs_always_after_branch, task); 12159 12160 // Also fix .ARM.exidx section coverage. 12161 Arm_output_section<big_endian>* exidx_output_section = NULL; 12162 for (Layout::Section_list::const_iterator p = 12163 layout->section_list().begin(); 12164 p != layout->section_list().end(); 12165 ++p) 12166 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 12167 { 12168 if (exidx_output_section == NULL) 12169 exidx_output_section = 12170 Arm_output_section<big_endian>::as_arm_output_section(*p); 12171 else 12172 // We cannot handle this now. 12173 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a " 12174 "non-relocatable link"), 12175 exidx_output_section->name(), 12176 (*p)->name()); 12177 } 12178 12179 if (exidx_output_section != NULL) 12180 { 12181 this->fix_exidx_coverage(layout, input_objects, exidx_output_section, 12182 symtab, task); 12183 done_exidx_fixup = true; 12184 } 12185 } 12186 else 12187 { 12188 // If this is not the first pass, addresses and file offsets have 12189 // been reset at this point, set them here. 12190 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12191 sp != this->stub_tables_.end(); 12192 ++sp) 12193 { 12194 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12195 off_t off = align_address(owner->original_size(), 12196 (*sp)->addralign()); 12197 (*sp)->set_address_and_file_offset(owner->address() + off, 12198 owner->offset() + off); 12199 } 12200 } 12201 12202 // The Cortex-A8 stubs are sensitive to layout of code sections. At the 12203 // beginning of each relaxation pass, just blow away all the stubs. 12204 // Alternatively, we could selectively remove only the stubs and reloc 12205 // information for code sections that have moved since the last pass. 12206 // That would require more book-keeping. 12207 if (this->fix_cortex_a8_) 12208 { 12209 // Clear all Cortex-A8 reloc information. 12210 for (typename Cortex_a8_relocs_info::const_iterator p = 12211 this->cortex_a8_relocs_info_.begin(); 12212 p != this->cortex_a8_relocs_info_.end(); 12213 ++p) 12214 delete p->second; 12215 this->cortex_a8_relocs_info_.clear(); 12216 12217 // Remove all Cortex-A8 stubs. 12218 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12219 sp != this->stub_tables_.end(); 12220 ++sp) 12221 (*sp)->remove_all_cortex_a8_stubs(); 12222 } 12223 12224 // Scan relocs for relocation stubs 12225 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12226 op != input_objects->relobj_end(); 12227 ++op) 12228 { 12229 Arm_relobj<big_endian>* arm_relobj = 12230 Arm_relobj<big_endian>::as_arm_relobj(*op); 12231 // Lock the object so we can read from it. This is only called 12232 // single-threaded from Layout::finalize, so it is OK to lock. 12233 Task_lock_obj<Object> tl(task, arm_relobj); 12234 arm_relobj->scan_sections_for_stubs(this, symtab, layout); 12235 } 12236 12237 // Check all stub tables to see if any of them have their data sizes 12238 // or addresses alignments changed. These are the only things that 12239 // matter. 12240 bool any_stub_table_changed = false; 12241 Unordered_set<const Output_section*> sections_needing_adjustment; 12242 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12243 (sp != this->stub_tables_.end() 12244 && (parameters->options().stub_group_auto_padding() 12245 || !any_stub_table_changed)); 12246 ++sp) 12247 { 12248 if ((*sp)->update_data_size_and_addralign()) 12249 { 12250 // Update data size of stub table owner. 12251 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12252 uint64_t address = owner->address(); 12253 off_t offset = owner->offset(); 12254 owner->reset_address_and_file_offset(); 12255 owner->set_address_and_file_offset(address, offset); 12256 12257 sections_needing_adjustment.insert(owner->output_section()); 12258 any_stub_table_changed = true; 12259 } 12260 } 12261 12262 // Output_section_data::output_section() returns a const pointer but we 12263 // need to update output sections, so we record all output sections needing 12264 // update above and scan the sections here to find out what sections need 12265 // to be updated. 12266 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 12267 p != layout->section_list().end(); 12268 ++p) 12269 { 12270 if (sections_needing_adjustment.find(*p) 12271 != sections_needing_adjustment.end()) 12272 (*p)->set_section_offsets_need_adjustment(); 12273 } 12274 12275 // Stop relaxation if no EXIDX fix-up and no stub table change. 12276 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed; 12277 12278 // Finalize the stubs in the last relaxation pass. 12279 if (!continue_relaxation) 12280 { 12281 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12282 (sp != this->stub_tables_.end()) && !any_stub_table_changed; 12283 ++sp) 12284 (*sp)->finalize_stubs(); 12285 12286 // Update output local symbol counts of objects if necessary. 12287 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12288 op != input_objects->relobj_end(); 12289 ++op) 12290 { 12291 Arm_relobj<big_endian>* arm_relobj = 12292 Arm_relobj<big_endian>::as_arm_relobj(*op); 12293 12294 // Update output local symbol counts. We need to discard local 12295 // symbols defined in parts of input sections that are discarded by 12296 // relaxation. 12297 if (arm_relobj->output_local_symbol_count_needs_update()) 12298 { 12299 // We need to lock the object's file to update it. 12300 Task_lock_obj<Object> tl(task, arm_relobj); 12301 arm_relobj->update_output_local_symbol_count(); 12302 } 12303 } 12304 } 12305 12306 return continue_relaxation; 12307 } 12308 12309 // Relocate a stub. 12310 12311 template<bool big_endian> 12312 void 12313 Target_arm<big_endian>::relocate_stub( 12314 Stub* stub, 12315 const Relocate_info<32, big_endian>* relinfo, 12316 Output_section* output_section, 12317 unsigned char* view, 12318 Arm_address address, 12319 section_size_type view_size) 12320 { 12321 Relocate relocate; 12322 const Stub_template* stub_template = stub->stub_template(); 12323 for (size_t i = 0; i < stub_template->reloc_count(); i++) 12324 { 12325 size_t reloc_insn_index = stub_template->reloc_insn_index(i); 12326 const Insn_template* insn = &stub_template->insns()[reloc_insn_index]; 12327 12328 unsigned int r_type = insn->r_type(); 12329 section_size_type reloc_offset = stub_template->reloc_offset(i); 12330 section_size_type reloc_size = insn->size(); 12331 gold_assert(reloc_offset + reloc_size <= view_size); 12332 12333 // This is the address of the stub destination. 12334 Arm_address target = stub->reloc_target(i) + insn->reloc_addend(); 12335 Symbol_value<32> symval; 12336 symval.set_output_value(target); 12337 12338 // Synthesize a fake reloc just in case. We don't have a symbol so 12339 // we use 0. 12340 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size]; 12341 memset(reloc_buffer, 0, sizeof(reloc_buffer)); 12342 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer); 12343 reloc_write.put_r_offset(reloc_offset); 12344 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type)); 12345 elfcpp::Rel<32, big_endian> rel(reloc_buffer); 12346 12347 relocate.relocate(relinfo, this, output_section, 12348 this->fake_relnum_for_stubs, rel, r_type, 12349 NULL, &symval, view + reloc_offset, 12350 address + reloc_offset, reloc_size); 12351 } 12352 } 12353 12354 // Determine whether an object attribute tag takes an integer, a 12355 // string or both. 12356 12357 template<bool big_endian> 12358 int 12359 Target_arm<big_endian>::do_attribute_arg_type(int tag) const 12360 { 12361 if (tag == Object_attribute::Tag_compatibility) 12362 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12363 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL); 12364 else if (tag == elfcpp::Tag_nodefaults) 12365 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12366 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT); 12367 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name) 12368 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL; 12369 else if (tag < 32) 12370 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL; 12371 else 12372 return ((tag & 1) != 0 12373 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL 12374 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL); 12375 } 12376 12377 // Reorder attributes. 12378 // 12379 // The ABI defines that Tag_conformance should be emitted first, and that 12380 // Tag_nodefaults should be second (if either is defined). This sets those 12381 // two positions, and bumps up the position of all the remaining tags to 12382 // compensate. 12383 12384 template<bool big_endian> 12385 int 12386 Target_arm<big_endian>::do_attributes_order(int num) const 12387 { 12388 // Reorder the known object attributes in output. We want to move 12389 // Tag_conformance to position 4 and Tag_conformance to position 5 12390 // and shift everything between 4 .. Tag_conformance - 1 to make room. 12391 if (num == 4) 12392 return elfcpp::Tag_conformance; 12393 if (num == 5) 12394 return elfcpp::Tag_nodefaults; 12395 if ((num - 2) < elfcpp::Tag_nodefaults) 12396 return num - 2; 12397 if ((num - 1) < elfcpp::Tag_conformance) 12398 return num - 1; 12399 return num; 12400 } 12401 12402 // Scan a span of THUMB code for Cortex-A8 erratum. 12403 12404 template<bool big_endian> 12405 void 12406 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum( 12407 Arm_relobj<big_endian>* arm_relobj, 12408 unsigned int shndx, 12409 section_size_type span_start, 12410 section_size_type span_end, 12411 const unsigned char* view, 12412 Arm_address address) 12413 { 12414 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where: 12415 // 12416 // The opcode is BLX.W, BL.W, B.W, Bcc.W 12417 // The branch target is in the same 4KB region as the 12418 // first half of the branch. 12419 // The instruction before the branch is a 32-bit 12420 // length non-branch instruction. 12421 section_size_type i = span_start; 12422 bool last_was_32bit = false; 12423 bool last_was_branch = false; 12424 while (i < span_end) 12425 { 12426 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12427 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i); 12428 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv); 12429 bool is_blx = false, is_b = false; 12430 bool is_bl = false, is_bcc = false; 12431 12432 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000; 12433 if (insn_32bit) 12434 { 12435 // Load the rest of the insn (in manual-friendly order). 12436 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1); 12437 12438 // Encoding T4: B<c>.W. 12439 is_b = (insn & 0xf800d000U) == 0xf0009000U; 12440 // Encoding T1: BL<c>.W. 12441 is_bl = (insn & 0xf800d000U) == 0xf000d000U; 12442 // Encoding T2: BLX<c>.W. 12443 is_blx = (insn & 0xf800d000U) == 0xf000c000U; 12444 // Encoding T3: B<c>.W (not permitted in IT block). 12445 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U 12446 && (insn & 0x07f00000U) != 0x03800000U); 12447 } 12448 12449 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc; 12450 12451 // If this instruction is a 32-bit THUMB branch that crosses a 4K 12452 // page boundary and it follows 32-bit non-branch instruction, 12453 // we need to work around. 12454 if (is_32bit_branch 12455 && ((address + i) & 0xfffU) == 0xffeU 12456 && last_was_32bit 12457 && !last_was_branch) 12458 { 12459 // Check to see if there is a relocation stub for this branch. 12460 bool force_target_arm = false; 12461 bool force_target_thumb = false; 12462 const Cortex_a8_reloc* cortex_a8_reloc = NULL; 12463 Cortex_a8_relocs_info::const_iterator p = 12464 this->cortex_a8_relocs_info_.find(address + i); 12465 12466 if (p != this->cortex_a8_relocs_info_.end()) 12467 { 12468 cortex_a8_reloc = p->second; 12469 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0; 12470 12471 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12472 && !target_is_thumb) 12473 force_target_arm = true; 12474 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12475 && target_is_thumb) 12476 force_target_thumb = true; 12477 } 12478 12479 off_t offset; 12480 Stub_type stub_type = arm_stub_none; 12481 12482 // Check if we have an offending branch instruction. 12483 uint16_t upper_insn = (insn >> 16) & 0xffffU; 12484 uint16_t lower_insn = insn & 0xffffU; 12485 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12486 12487 if (cortex_a8_reloc != NULL 12488 && cortex_a8_reloc->reloc_stub() != NULL) 12489 // We've already made a stub for this instruction, e.g. 12490 // it's a long branch or a Thumb->ARM stub. Assume that 12491 // stub will suffice to work around the A8 erratum (see 12492 // setting of always_after_branch above). 12493 ; 12494 else if (is_bcc) 12495 { 12496 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn, 12497 lower_insn); 12498 stub_type = arm_stub_a8_veneer_b_cond; 12499 } 12500 else if (is_b || is_bl || is_blx) 12501 { 12502 offset = RelocFuncs::thumb32_branch_offset(upper_insn, 12503 lower_insn); 12504 if (is_blx) 12505 offset &= ~3; 12506 12507 stub_type = (is_blx 12508 ? arm_stub_a8_veneer_blx 12509 : (is_bl 12510 ? arm_stub_a8_veneer_bl 12511 : arm_stub_a8_veneer_b)); 12512 } 12513 12514 if (stub_type != arm_stub_none) 12515 { 12516 Arm_address pc_for_insn = address + i + 4; 12517 12518 // The original instruction is a BL, but the target is 12519 // an ARM instruction. If we were not making a stub, 12520 // the BL would have been converted to a BLX. Use the 12521 // BLX stub instead in that case. 12522 if (this->may_use_v5t_interworking() && force_target_arm 12523 && stub_type == arm_stub_a8_veneer_bl) 12524 { 12525 stub_type = arm_stub_a8_veneer_blx; 12526 is_blx = true; 12527 is_bl = false; 12528 } 12529 // Conversely, if the original instruction was 12530 // BLX but the target is Thumb mode, use the BL stub. 12531 else if (force_target_thumb 12532 && stub_type == arm_stub_a8_veneer_blx) 12533 { 12534 stub_type = arm_stub_a8_veneer_bl; 12535 is_blx = false; 12536 is_bl = true; 12537 } 12538 12539 if (is_blx) 12540 pc_for_insn &= ~3; 12541 12542 // If we found a relocation, use the proper destination, 12543 // not the offset in the (unrelocated) instruction. 12544 // Note this is always done if we switched the stub type above. 12545 if (cortex_a8_reloc != NULL) 12546 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn); 12547 12548 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1); 12549 12550 // Add a new stub if destination address in in the same page. 12551 if (((address + i) & ~0xfffU) == (target & ~0xfffU)) 12552 { 12553 Cortex_a8_stub* stub = 12554 this->stub_factory_.make_cortex_a8_stub(stub_type, 12555 arm_relobj, shndx, 12556 address + i, 12557 target, insn); 12558 Stub_table<big_endian>* stub_table = 12559 arm_relobj->stub_table(shndx); 12560 gold_assert(stub_table != NULL); 12561 stub_table->add_cortex_a8_stub(address + i, stub); 12562 } 12563 } 12564 } 12565 12566 i += insn_32bit ? 4 : 2; 12567 last_was_32bit = insn_32bit; 12568 last_was_branch = is_32bit_branch; 12569 } 12570 } 12571 12572 // Apply the Cortex-A8 workaround. 12573 12574 template<bool big_endian> 12575 void 12576 Target_arm<big_endian>::apply_cortex_a8_workaround( 12577 const Cortex_a8_stub* stub, 12578 Arm_address stub_address, 12579 unsigned char* insn_view, 12580 Arm_address insn_address) 12581 { 12582 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12583 Valtype* wv = reinterpret_cast<Valtype*>(insn_view); 12584 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 12585 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 12586 off_t branch_offset = stub_address - (insn_address + 4); 12587 12588 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12589 switch (stub->stub_template()->type()) 12590 { 12591 case arm_stub_a8_veneer_b_cond: 12592 // For a conditional branch, we re-write it to be an unconditional 12593 // branch to the stub. We use the THUMB-2 encoding here. 12594 upper_insn = 0xf000U; 12595 lower_insn = 0xb800U; 12596 // Fall through 12597 case arm_stub_a8_veneer_b: 12598 case arm_stub_a8_veneer_bl: 12599 case arm_stub_a8_veneer_blx: 12600 if ((lower_insn & 0x5000U) == 0x4000U) 12601 // For a BLX instruction, make sure that the relocation is 12602 // rounded up to a word boundary. This follows the semantics of 12603 // the instruction which specifies that bit 1 of the target 12604 // address will come from bit 1 of the base address. 12605 branch_offset = (branch_offset + 2) & ~3; 12606 12607 // Put BRANCH_OFFSET back into the insn. 12608 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 12609 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset); 12610 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset); 12611 break; 12612 12613 default: 12614 gold_unreachable(); 12615 } 12616 12617 // Put the relocated value back in the object file: 12618 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 12619 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 12620 } 12621 12622 // Target selector for ARM. Note this is never instantiated directly. 12623 // It's only used in Target_selector_arm_nacl, below. 12624 12625 template<bool big_endian> 12626 class Target_selector_arm : public Target_selector 12627 { 12628 public: 12629 Target_selector_arm() 12630 : Target_selector(elfcpp::EM_ARM, 32, big_endian, 12631 (big_endian ? "elf32-bigarm" : "elf32-littlearm"), 12632 (big_endian ? "armelfb" : "armelf")) 12633 { } 12634 12635 Target* 12636 do_instantiate_target() 12637 { return new Target_arm<big_endian>(); } 12638 }; 12639 12640 // Fix .ARM.exidx section coverage. 12641 12642 template<bool big_endian> 12643 void 12644 Target_arm<big_endian>::fix_exidx_coverage( 12645 Layout* layout, 12646 const Input_objects* input_objects, 12647 Arm_output_section<big_endian>* exidx_section, 12648 Symbol_table* symtab, 12649 const Task* task) 12650 { 12651 // We need to look at all the input sections in output in ascending 12652 // order of of output address. We do that by building a sorted list 12653 // of output sections by addresses. Then we looks at the output sections 12654 // in order. The input sections in an output section are already sorted 12655 // by addresses within the output section. 12656 12657 typedef std::set<Output_section*, output_section_address_less_than> 12658 Sorted_output_section_list; 12659 Sorted_output_section_list sorted_output_sections; 12660 12661 // Find out all the output sections of input sections pointed by 12662 // EXIDX input sections. 12663 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 12664 p != input_objects->relobj_end(); 12665 ++p) 12666 { 12667 Arm_relobj<big_endian>* arm_relobj = 12668 Arm_relobj<big_endian>::as_arm_relobj(*p); 12669 std::vector<unsigned int> shndx_list; 12670 arm_relobj->get_exidx_shndx_list(&shndx_list); 12671 for (size_t i = 0; i < shndx_list.size(); ++i) 12672 { 12673 const Arm_exidx_input_section* exidx_input_section = 12674 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]); 12675 gold_assert(exidx_input_section != NULL); 12676 if (!exidx_input_section->has_errors()) 12677 { 12678 unsigned int text_shndx = exidx_input_section->link(); 12679 Output_section* os = arm_relobj->output_section(text_shndx); 12680 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0) 12681 sorted_output_sections.insert(os); 12682 } 12683 } 12684 } 12685 12686 // Go over the output sections in ascending order of output addresses. 12687 typedef typename Arm_output_section<big_endian>::Text_section_list 12688 Text_section_list; 12689 Text_section_list sorted_text_sections; 12690 for (typename Sorted_output_section_list::iterator p = 12691 sorted_output_sections.begin(); 12692 p != sorted_output_sections.end(); 12693 ++p) 12694 { 12695 Arm_output_section<big_endian>* arm_output_section = 12696 Arm_output_section<big_endian>::as_arm_output_section(*p); 12697 arm_output_section->append_text_sections_to_list(&sorted_text_sections); 12698 } 12699 12700 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab, 12701 merge_exidx_entries(), task); 12702 } 12703 12704 template<bool big_endian> 12705 void 12706 Target_arm<big_endian>::do_define_standard_symbols( 12707 Symbol_table* symtab, 12708 Layout* layout) 12709 { 12710 // Handle the .ARM.exidx section. 12711 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 12712 12713 if (exidx_section != NULL) 12714 { 12715 // Create __exidx_start and __exidx_end symbols. 12716 symtab->define_in_output_data("__exidx_start", 12717 NULL, // version 12718 Symbol_table::PREDEFINED, 12719 exidx_section, 12720 0, // value 12721 0, // symsize 12722 elfcpp::STT_NOTYPE, 12723 elfcpp::STB_GLOBAL, 12724 elfcpp::STV_HIDDEN, 12725 0, // nonvis 12726 false, // offset_is_from_end 12727 true); // only_if_ref 12728 12729 symtab->define_in_output_data("__exidx_end", 12730 NULL, // version 12731 Symbol_table::PREDEFINED, 12732 exidx_section, 12733 0, // value 12734 0, // symsize 12735 elfcpp::STT_NOTYPE, 12736 elfcpp::STB_GLOBAL, 12737 elfcpp::STV_HIDDEN, 12738 0, // nonvis 12739 true, // offset_is_from_end 12740 true); // only_if_ref 12741 } 12742 else 12743 { 12744 // Define __exidx_start and __exidx_end even when .ARM.exidx 12745 // section is missing to match ld's behaviour. 12746 symtab->define_as_constant("__exidx_start", NULL, 12747 Symbol_table::PREDEFINED, 12748 0, 0, elfcpp::STT_OBJECT, 12749 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 12750 true, false); 12751 symtab->define_as_constant("__exidx_end", NULL, 12752 Symbol_table::PREDEFINED, 12753 0, 0, elfcpp::STT_OBJECT, 12754 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 12755 true, false); 12756 } 12757 } 12758 12759 // NaCl variant. It uses different PLT contents. 12760 12761 template<bool big_endian> 12762 class Output_data_plt_arm_nacl; 12763 12764 template<bool big_endian> 12765 class Target_arm_nacl : public Target_arm<big_endian> 12766 { 12767 public: 12768 Target_arm_nacl() 12769 : Target_arm<big_endian>(&arm_nacl_info) 12770 { } 12771 12772 protected: 12773 virtual Output_data_plt_arm<big_endian>* 12774 do_make_data_plt( 12775 Layout* layout, 12776 Arm_output_data_got<big_endian>* got, 12777 Output_data_space* got_plt, 12778 Output_data_space* got_irelative) 12779 { return new Output_data_plt_arm_nacl<big_endian>( 12780 layout, got, got_plt, got_irelative); } 12781 12782 private: 12783 static const Target::Target_info arm_nacl_info; 12784 }; 12785 12786 template<bool big_endian> 12787 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info = 12788 { 12789 32, // size 12790 big_endian, // is_big_endian 12791 elfcpp::EM_ARM, // machine_code 12792 false, // has_make_symbol 12793 false, // has_resolve 12794 false, // has_code_fill 12795 true, // is_default_stack_executable 12796 false, // can_icf_inline_merge_sections 12797 '\0', // wrap_char 12798 "/lib/ld-nacl-arm.so.1", // dynamic_linker 12799 0x20000, // default_text_segment_address 12800 0x10000, // abi_pagesize (overridable by -z max-page-size) 12801 0x10000, // common_pagesize (overridable by -z common-page-size) 12802 true, // isolate_execinstr 12803 0x10000000, // rosegment_gap 12804 elfcpp::SHN_UNDEF, // small_common_shndx 12805 elfcpp::SHN_UNDEF, // large_common_shndx 12806 0, // small_common_section_flags 12807 0, // large_common_section_flags 12808 ".ARM.attributes", // attributes_section 12809 "aeabi", // attributes_vendor 12810 "_start" // entry_symbol_name 12811 }; 12812 12813 template<bool big_endian> 12814 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian> 12815 { 12816 public: 12817 Output_data_plt_arm_nacl( 12818 Layout* layout, 12819 Arm_output_data_got<big_endian>* got, 12820 Output_data_space* got_plt, 12821 Output_data_space* got_irelative) 12822 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative) 12823 { } 12824 12825 protected: 12826 // Return the offset of the first non-reserved PLT entry. 12827 virtual unsigned int 12828 do_first_plt_entry_offset() const 12829 { return sizeof(first_plt_entry); } 12830 12831 // Return the size of a PLT entry. 12832 virtual unsigned int 12833 do_get_plt_entry_size() const 12834 { return sizeof(plt_entry); } 12835 12836 virtual void 12837 do_fill_first_plt_entry(unsigned char* pov, 12838 Arm_address got_address, 12839 Arm_address plt_address); 12840 12841 virtual void 12842 do_fill_plt_entry(unsigned char* pov, 12843 Arm_address got_address, 12844 Arm_address plt_address, 12845 unsigned int got_offset, 12846 unsigned int plt_offset); 12847 12848 private: 12849 inline uint32_t arm_movw_immediate(uint32_t value) 12850 { 12851 return (value & 0x00000fff) | ((value & 0x0000f000) << 4); 12852 } 12853 12854 inline uint32_t arm_movt_immediate(uint32_t value) 12855 { 12856 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); 12857 } 12858 12859 // Template for the first PLT entry. 12860 static const uint32_t first_plt_entry[16]; 12861 12862 // Template for subsequent PLT entries. 12863 static const uint32_t plt_entry[4]; 12864 }; 12865 12866 // The first entry in the PLT. 12867 template<bool big_endian> 12868 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] = 12869 { 12870 // First bundle: 12871 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8 12872 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8 12873 0xe08cc00f, // add ip, ip, pc 12874 0xe52dc008, // str ip, [sp, #-8]! 12875 // Second bundle: 12876 0xe3ccc103, // bic ip, ip, #0xc0000000 12877 0xe59cc000, // ldr ip, [ip] 12878 0xe3ccc13f, // bic ip, ip, #0xc000000f 12879 0xe12fff1c, // bx ip 12880 // Third bundle: 12881 0xe320f000, // nop 12882 0xe320f000, // nop 12883 0xe320f000, // nop 12884 // .Lplt_tail: 12885 0xe50dc004, // str ip, [sp, #-4] 12886 // Fourth bundle: 12887 0xe3ccc103, // bic ip, ip, #0xc0000000 12888 0xe59cc000, // ldr ip, [ip] 12889 0xe3ccc13f, // bic ip, ip, #0xc000000f 12890 0xe12fff1c, // bx ip 12891 }; 12892 12893 template<bool big_endian> 12894 void 12895 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry( 12896 unsigned char* pov, 12897 Arm_address got_address, 12898 Arm_address plt_address) 12899 { 12900 // Write first PLT entry. All but first two words are constants. 12901 const size_t num_first_plt_words = (sizeof(first_plt_entry) 12902 / sizeof(first_plt_entry[0])); 12903 12904 int32_t got_displacement = got_address + 8 - (plt_address + 16); 12905 12906 elfcpp::Swap<32, big_endian>::writeval 12907 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement)); 12908 elfcpp::Swap<32, big_endian>::writeval 12909 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement)); 12910 12911 for (size_t i = 2; i < num_first_plt_words; ++i) 12912 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); 12913 } 12914 12915 // Subsequent entries in the PLT. 12916 12917 template<bool big_endian> 12918 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] = 12919 { 12920 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8 12921 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8 12922 0xe08cc00f, // add ip, ip, pc 12923 0xea000000, // b .Lplt_tail 12924 }; 12925 12926 template<bool big_endian> 12927 void 12928 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry( 12929 unsigned char* pov, 12930 Arm_address got_address, 12931 Arm_address plt_address, 12932 unsigned int got_offset, 12933 unsigned int plt_offset) 12934 { 12935 // Calculate the displacement between the PLT slot and the 12936 // common tail that's part of the special initial PLT slot. 12937 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t)) 12938 - (plt_address + plt_offset 12939 + sizeof(plt_entry) + sizeof(uint32_t))); 12940 gold_assert((tail_displacement & 3) == 0); 12941 tail_displacement >>= 2; 12942 12943 gold_assert ((tail_displacement & 0xff000000) == 0 12944 || (-tail_displacement & 0xff000000) == 0); 12945 12946 // Calculate the displacement between the PLT slot and the entry 12947 // in the GOT. The offset accounts for the value produced by 12948 // adding to pc in the penultimate instruction of the PLT stub. 12949 const int32_t got_displacement = (got_address + got_offset 12950 - (plt_address + sizeof(plt_entry))); 12951 12952 elfcpp::Swap<32, big_endian>::writeval 12953 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement)); 12954 elfcpp::Swap<32, big_endian>::writeval 12955 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement)); 12956 elfcpp::Swap<32, big_endian>::writeval 12957 (pov + 8, plt_entry[2]); 12958 elfcpp::Swap<32, big_endian>::writeval 12959 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff)); 12960 } 12961 12962 // Target selectors. 12963 12964 template<bool big_endian> 12965 class Target_selector_arm_nacl 12966 : public Target_selector_nacl<Target_selector_arm<big_endian>, 12967 Target_arm_nacl<big_endian> > 12968 { 12969 public: 12970 Target_selector_arm_nacl() 12971 : Target_selector_nacl<Target_selector_arm<big_endian>, 12972 Target_arm_nacl<big_endian> >( 12973 "arm", 12974 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl", 12975 big_endian ? "armelfb_nacl" : "armelf_nacl") 12976 { } 12977 }; 12978 12979 Target_selector_arm_nacl<false> target_selector_arm; 12980 Target_selector_arm_nacl<true> target_selector_armbe; 12981 12982 } // End anonymous namespace. 12983