Home | History | Annotate | Download | only in opcodes
      1 2015-05-07  Renlin Li  <renlin.li (a] arm.com>
      2 
      3 	Applied from master.
      4 	2015-03-10  Renlin Li  <renlin.li (a] arm.com>
      5 
      6 	* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
      7 	stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
      8 	related alias.
      9 	* aarch64-asm-2.c: Regenerate.
     10 	* aarch64-dis-2.c: Likewise.
     11 	* aarch64-opc-2.c: Likewise.
     12 
     13 2014-11-17  Ilya Tocar  <ilya.tocar (a] intel.com>
     14 
     15 	* i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb,
     16 	vpmultishiftqb.
     17 	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2.
     18 	* i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS.
     19 	(cpu_flags): Add CpuAVX512VBMI.
     20 	* i386-opc.h (enum): Add CpuAVX512VBMI.
     21 	(i386_cpu_flags): Add cpuavx512vbmi.
     22 	* i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b,
     23 	vpermt2b.
     24 	* i386-init.h: Regenerated.
     25 	* i386-tbl.h: Likewise.
     26 
     27 2014-11-17  Ilya Tocar  <ilya.tocar (a] intel.com>
     28 
     29 	* i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq.
     30 	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4,
     31 	PREFIX_EVEX_0F38B5.
     32 	* i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS.
     33 	(cpu_flags): Add CpuAVX512IFMA.
     34 	* i386-opc.h (enum): Add CpuAVX512IFMA.
     35 	(i386_cpu_flags): Add cpuavx512ifma.
     36 	* i386-opc.tbl: Add vpmadd52huq, vpmadd52luq.
     37 	* i386-init.h: Regenerated.
     38 	* i386-tbl.h: Likewise.
     39 
     40 2014-11-17  Ilya Tocar  <ilya.tocar (a] intel.com>
     41 
     42 	* i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7.
     43 	(prefix_table): Add pcommit.
     44 	* i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS.
     45 	(cpu_flags): Add CpuPCOMMIT.
     46 	* i386-opc.h (enum): Add CpuPCOMMIT.
     47 	(i386_cpu_flags): Add cpupcommit.
     48 	* i386-opc.tbl: Add pcommit.
     49 	* i386-init.h: Regenerated.
     50 	* i386-tbl.h: Likewise.
     51 
     52 2014-11-17  Ilya Tocar  <ilya.tocar (a] intel.com>
     53 
     54 	* i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6.
     55 	(prefix_table): Add clwb.
     56 	* i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS.
     57 	(cpu_flags): Add CpuCLWB.
     58 	* i386-opc.h (enum): Add CpuCLWB.
     59 	(i386_cpu_flags): Add cpuclwb.
     60 	* i386-opc.tbl: Add clwb.
     61 	* i386-init.h: Regenerated.
     62 	* i386-tbl.h: Likewise.
     63 
     64 2014-11-06  Sandra Loosemore  <sandra (a] codesourcery.com>
     65 
     66 	* nios2-dis.c (nios2_find_opcode_hash): Add mach parameter.
     67 	(nios2_disassemble): Adjust call to nios2_find_opcode_hash.
     68 
     69 2014-11-03  Nick Clifton  <nickc (a] redhat.com>
     70 
     71 	* po/fi.po: Updated Finnish translation.
     72 
     73 2014-10-31  Andrew Pinski  <apinski (a] cavium.com>
     74             Naveen H.S  <Naveen.Hurugalawadi (a] caviumnetworks.com>
     75 
     76 	* mips-dis.c (mips_arch_choices): Add octeon3.
     77 	* mips-opc.c (IOCT): Include INSN_OCTEON3.
     78 	(IOCT2): Likewise.
     79 	(IOCT3): New define.
     80 	(IVIRT): New define.
     81 	(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
     82 	tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
     83 	IVIRT instructions.
     84 	Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
     85 	operand for IOCT3.
     86 
     87 2014-10-29  Nick Clifton  <nickc (a] redhat.com>
     88 
     89 	* po/de.po: Updated German translation.
     90 
     91 2014-10-23  Sandra Loosemore  <sandra (a] codesourcery.com>
     92 
     93 	* nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
     94 	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.  Use new
     95 	MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers.  Add
     96 	size and format initializers.  Merge 'b' arguments into 'j'.
     97 	(NIOS2_NUM_OPCODES): Adjust definition.
     98 	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
     99 	(nios2_opcodes): Adjust.
    100 	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
    101 	* nios2-dis.c (INSNLEN): Update comment.
    102 	(nios2_hash_init, nios2_hash): Delete.
    103 	(OPCODE_HASH_SIZE): New.
    104 	(nios2_r1_extract_opcode): New.
    105 	(nios2_disassembler_state): New.
    106 	(nios2_r1_disassembler_state): New.
    107 	(nios2_init_opcode_hash): Add state parameter.  Adjust to use it.
    108 	(nios2_find_opcode_hash): Use state object.
    109 	(bad_opcode): New.
    110 	(nios2_print_insn_arg): Add op parameter.  Use it to access
    111 	format.  Remove 'b' case.
    112 	(nios2_disassemble): Remove special case for nop.  Remove
    113 	hard-coded instruction size.
    114 
    115 2014-10-21  Jan Beulich  <jbeulich (a] suse.com>
    116 
    117 	* ppc-opc.c (powerpc_opcodes): Enable msgclr and msgsnd on Power8.
    118 
    119 2014-10-17  Jose E. Marchesi  <jose.marchesi (a] oracle.com>
    120 
    121 	* sparc-opc.c (sparc-opcodes): Fix several misplaced hwcap
    122 	entries.
    123 	Annotate several instructions with the HWCAP2_VIS3B hwcap.
    124 
    125 2014-10-15  Tristan Gingold  <gingold (a] adacore.com>
    126 
    127 	* configure: Regenerate.
    128 
    129 2014-10-09  Jose E. Marchesi  &lt;jose.marchesi (a] oracle.com&gt;
    130 
    131 	* sparc-opc.c (sparc-opcodes): Remove instructions `chkpt',
    132 	`commit', `random', `wr r,r,%cps', `wr r,i,%cps' and `rd %cps,r'.
    133 	Annotate table with HWCAP2 bits.
    134 	Add instructions xmontmul, xmontsqr, xmpmul.
    135 	(sparc-opcodes): Add the `mwait',  `wr r,r,%mwait', `wr
    136 	r,i,%mwait' and `rd %mwait,r' instructions.
    137 	Add rd/wr instructions for accessing the %mcdper ancillary state
    138 	register.
    139 	(sparc-opcodes): Add sparc5/vis4.0 instructions:
    140 	subxc, subxccc, fpadd8, fpadds8, fpaddus8, fpaddus16, fpcmple8,
    141 	fpcmpgt8, fpcmpule16, fpcmpugt16, fpcmpule32, fpcmpugt32, fpmax8,
    142 	fpmax16, fpmax32, fpmaxu8, fpmaxu16, fpmaxu32, fpmin8, fpmin16,
    143 	fpmin32, fpminu8, fpminu16, fpminu32, fpsub8, fpsubs8, fpsubus8,
    144 	fpsubus16, and faligndatai.
    145 	* sparc-dis.c (v9a_asr_reg_names): Add the %mwait (%asr28)
    146 	ancillary state register to the table.
    147 	(print_insn_sparc): Handle the %mcdper ancillary state register.
    148 	(print_insn_sparc): Handle new operand type '}'.
    149 
    150 2014-09-22  H.J. Lu  <hongjiu.lu (a] intel.com>
    151 
    152 	* i386-dis.c (MOD_0F20): Removed.
    153 	(MOD_0F21): Likewise.
    154 	(MOD_0F22): Likewise.
    155 	(MOD_0F23): Likewise.
    156 	(dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and
    157 	MOD_0F23 with "movZ".
    158 	(mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23.
    159 	(OP_R): Check mod/rm byte and call OP_E_register.
    160 
    161 2014-09-16 Kuan-Lin Chen <kuanlinchentw (a] gmail.com>
    162 
    163 	* nds32-asm.c (nds32_opcodes, operand_fields, keyword_im5_i,
    164 	keyword_im5_m, keyword_accumulator, keyword_aridx, keyword_aridx2,
    165 	keyword_aridxi): Add audio ISA extension.
    166 	(keyword_gpr, keyword_usr, keyword_sr, keyword_cp, keyword_cpr,
    167 	keyword_fsr, keyword_fdr, keyword_abdim, keyword_abm, keyword_dpref_st,
    168 	keyword_cctl_lv, keyword_standby_st, keyword_msync_st): Adjust scrope
    169 	for nds32-dis.c using.
    170 	(build_opcode_syntax): Remove dead code.
    171 	(parse_re, parse_a30b20, parse_rt21, parse_rte_start, parse_rte_end,
    172 	parse_rte69_start, parse_rte69_end, parse_im5_ip, parse_im5_mr,
    173 	parse_im6_ip, parse_im6_iq, parse_im6_mr, parse_im6_ms): Add audio ISA
    174 	operand parser.
    175 	* nds32-asm.h: Declare.
    176 	* nds32-dis.c: Use array nds32_opcodes to disassemble instead of
    177 	decoding by switch.
    178 
    179 2014-09-15  Andrew Bennett  <andrew.bennett (a] imgtec.com>
    180 	    Matthew Fortune  <matthew.fortune (a] imgtec.com>
    181 
    182 	* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
    183 	mips64r6.
    184 	(parse_mips_dis_option): Allow MSA and virtualization support for
    185 	mips64r6.
    186 	(mips_print_arg_state): Add fields dest_regno and seen_dest.
    187 	(mips_seen_register): New function.
    188 	(print_insn_arg): Refactored code to use mips_seen_register
    189 	function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
    190 	OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
    191 	the register rather than aborting.
    192 	(print_insn_args): Add length argument.  Add code to correctly
    193 	calculate the instruction address for pc relative instructions.
    194 	(validate_insn_args): New static function.
    195 	(print_insn_mips): Prevent jalx disassembling for r6.  Use
    196 	validate_insn_args.
    197 	(print_insn_micromips): Use validate_insn_args.
    198 	all the arguments are valid.
    199 	* mips-formats.h (PREV_CHECK): New define.
    200 	* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
    201 	-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
    202 	(RD_pc): New define.
    203 	(FS): New define.
    204 	(I37): New define.
    205 	(I69): New define.
    206 	(mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
    207 	MIPS R6 instructions from MIPS R2 instructions.
    208 
    209 2014-09-10  H.J. Lu  <hongjiu.lu (a] intel.com>
    210 
    211 	* i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
    212 	(putop): Handle "%LP".
    213 
    214 2014-09-03  Jiong Wang  <jiong.wang (a] arm.com>
    215 
    216 	* aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
    217 	* aarch64-dis-2.c: Update auto-generated file.
    218 
    219 2014-09-03  Jiong Wang  <jiong.wang (a] arm.com>
    220 
    221 	* aarch64-tbl.h (QL_R4NIL): New qualifiers.
    222 	(aarch64_feature_lse): New feature added.
    223 	(LSE): New Added.
    224 	(aarch64_opcode_table): New LSE instructions added.  Improve
    225 	descriptions for ldarb/ldarh/ldar.
    226 	(aarch64_opcode_table): Describe PAIRREG.
    227 	* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
    228 	* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
    229 	(aarch64_print_operand): Recognize PAIRREG.
    230 	(operand_general_constraint_met_p): Check reg pair constraints for CASP
    231 	instructions.
    232 	* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
    233 	(do_special_decoding): Recognize F_LSE_SZ.
    234 	* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
    235 
    236 2014-08-26  Maciej W. Rozycki  <macro (a] codesourcery.com>
    237 
    238 	* micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
    239 	(micromips_opcodes): Use "+J" in place of "B" for "hypcall",
    240 	"sdbbp", "syscall" and "wait".
    241 
    242 2014-08-21  Nathan Sidwell  <nathan (a] codesourcery.com>
    243 	    Maciej W. Rozycki  <macro (a] codesourcery.com>
    244 
    245 	* arm-dis.c (print_arm_address): Negate the GPR-relative offset
    246 	returned if the U bit is set.
    247 
    248 2014-08-21  Maciej W. Rozycki  <macro (a] codesourcery.com>
    249 
    250 	* micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
    251 	48-bit "li" encoding.
    252 
    253 2014-08-19  Andreas Arnez  <arnez (a] linux.vnet.ibm.com>
    254 
    255 	* s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
    256 	(s390_print_insn_with_opcode, opcode_mask_more_specific): New
    257 	static functions, code was moved from...
    258 	(print_insn_s390): ...here.
    259 	(s390_extract_operand): Adjust comment.  Change type of first
    260 	parameter from 'unsigned char *' to 'const bfd_byte *'.
    261 	(union operand_value): New.
    262 	(s390_extract_operand): Change return type to union operand_value.
    263 	Also avoid integer overflow in sign-extension.
    264 	(s390_print_insn_with_opcode): Adjust to changed return value from
    265 	s390_extract_operand().  Change "%i" printf format to "%u" for
    266 	unsigned values.
    267 	(init_disasm): Simplify initialization of opc_index[].  This also
    268 	fixes an access after the last element of s390_opcodes[].
    269 	(print_insn_s390): Simplify the opcode search loop.
    270 	Check architecture mask against all searched opcodes, not just the
    271 	first matching one.
    272 	(s390_print_insn_with_opcode): Drop function pointer dereferences
    273 	without effect.
    274 	(print_insn_s390): Likewise.
    275 	(s390_insn_length): Simplify formula for return value.
    276 	(s390_print_insn_with_opcode): Avoid special handling for the
    277 	separator before the first operand.  Use new local variable
    278 	'flags' in place of 'operand->flags'.
    279 
    280 2014-08-14  Mike Frysinger  <vapier (a] gentoo.org>
    281 
    282 	* bfin-dis.c (struct private): Change int's to bfd_boolean's.
    283 	(decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
    284 	decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
    285 	Change assignment of 1 to priv->comment to TRUE.
    286 	(print_insn_bfin): Change legal to a bfd_boolean.  Change
    287 	assignment of 0/1 with priv comment and parallel and legal
    288 	to FALSE/TRUE.
    289 
    290 2014-08-14  Mike Frysinger  <vapier (a] gentoo.org>
    291 
    292 	* bfin-dis.c (OUT): Define.
    293 	(decode_CC2stat_0): Declare new op_names array.
    294 	Replace multiple if statements with a single one.
    295 
    296 2014-08-14  Mike Frysinger  <vapier (a] gentoo.org>
    297 
    298 	* bfin-dis.c (struct private): Add iw0.
    299 	(_print_insn_bfin): Assign iw0 to priv.iw0.
    300 	(print_insn_bfin): Drop ifetch and use priv.iw0.
    301 
    302 2014-08-13  Mike Frysinger  <vapier (a] gentoo.org>
    303 
    304 	* bfin-dis.c (comment, parallel): Move from global scope ...
    305 	(struct private): ... to this new struct.
    306 	(decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
    307 	decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
    308 	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
    309 	decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
    310 	decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
    311 	decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
    312 	decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
    313 	print_insn_bfin): Declare private struct.  Use priv's comment and
    314 	parallel members.
    315 
    316 2014-08-13  Mike Frysinger  <vapier (a] gentoo.org>
    317 
    318 	* bfin-dis.c (ifetch): Do not align pc to 2 bytes.
    319 	(_print_insn_bfin): Add check for unaligned pc.
    320 
    321 2014-08-13  Mike Frysinger  <vapier (a] gentoo.org>
    322 
    323 	* bfin-dis.c (ifetch): New function.
    324 	(_print_insn_bfin, print_insn_bfin): Call new ifetch and return
    325 	-1 when it errors.
    326 
    327 2014-07-29  Matthew Fortune  <matthew.fortune (a] imgtec.com>
    328 
    329 	* micromips-opc.c (COD): Rename throughout to...
    330 	(CM): New define, update to use INSN_COPROC_MOVE.
    331 	(LCD): Rename throughout to...
    332 	(LC): New define, update to use INSN_LOAD_COPROC.
    333 	* mips-opc.c: Likewise.
    334 
    335 2014-07-29  Matthew Fortune  <matthew.fortune (a] imgtec.com>
    336 
    337 	* micromips-opc.c (COD, LCD) New macros.
    338 	(cfc1, ctc1): Remove FP_S attribute.
    339 	(dmfc1, mfc1, mfhc1): Add LCD attribute.
    340 	(dmtc1, mtc1, mthc1): Add COD attribute.
    341 	* mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
    342 
    343 2014-07-22  Sergey Guriev  <sergey.s.guriev (a] intel.com>
    344 	    Alexander Ivchenko  <alexander.ivchenko (a] intel.com>
    345 	    Maxim Kuznetsov  <maxim.kuznetsov (a] intel.com>
    346 	    Sergey Lega  <sergey.s.lega (a] intel.com>
    347 	    Anna Tikhonova  <anna.tikhonova (a] intel.com>
    348 	    Ilya Tocar  <ilya.tocar (a] intel.com>
    349 	    Andrey Turetskiy  <andrey.turetskiy (a] intel.com>
    350 	    Ilya Verbin  <ilya.verbin (a] intel.com>
    351 	    Kirill Yukhin  <kirill.yukhin (a] intel.com>
    352 	    Michael Zolotukhin  <michael.v.zolotukhin (a] intel.com>
    353 
    354 	* i386-dis-evex.h: Updated.
    355 	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
    356 	PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
    357 	PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
    358 	PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
    359 	PREFIX_EVEX_0F3A67.
    360 	(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
    361 	VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
    362 	(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
    363 	EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
    364 	EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
    365 	EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
    366 	EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
    367 	EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
    368 	EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
    369 	(prefix_table): Add entries for new instructions.
    370 	(vex_len_table): Ditto.
    371 	(vex_w_table): Ditto.
    372 	(OP_E_memory): Update xmmq_mode handling.
    373 	* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
    374 	(cpu_flags): Add CpuAVX512DQ.
    375 	* i386-init.h: Regenerared.
    376 	* i386-opc.h (CpuAVX512DQ): New.
    377 	(i386_cpu_flags): Add cpuavx512dq.
    378 	* i386-opc.tbl: Add AVX512DQ instructions.
    379 	* i386-tbl.h: Regenerate.
    380 
    381 2014-07-22  Sergey Guriev  <sergey.s.guriev (a] intel.com>
    382 	    Alexander Ivchenko  <alexander.ivchenko (a] intel.com>
    383 	    Maxim Kuznetsov  <maxim.kuznetsov (a] intel.com>
    384 	    Sergey Lega  <sergey.s.lega (a] intel.com>
    385 	    Anna Tikhonova  <anna.tikhonova (a] intel.com>
    386 	    Ilya Tocar  <ilya.tocar (a] intel.com>
    387 	    Andrey Turetskiy  <andrey.turetskiy (a] intel.com>
    388 	    Ilya Verbin  <ilya.verbin (a] intel.com>
    389 	    Kirill Yukhin  <kirill.yukhin (a] intel.com>
    390 	    Michael Zolotukhin  <michael.v.zolotukhin (a] intel.com>
    391 
    392 	* i386-dis-evex.h: Add new instructions (prefixes bellow).
    393 	* i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
    394 	(enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
    395 	(PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
    396 	PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
    397 	PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
    398 	PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
    399 	PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
    400 	PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
    401 	PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
    402 	PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
    403 	PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
    404 	PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
    405 	PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
    406 	PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
    407 	PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
    408 	PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
    409 	PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
    410 	PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
    411 	PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
    412 	PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
    413 	PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
    414 	PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
    415 	(VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
    416 	VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
    417 	VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
    418 	VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
    419 	VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
    420 	VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
    421 	VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
    422 	VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
    423 	VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
    424 	VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
    425 	VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
    426 	(VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
    427 	EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
    428 	EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
    429 	EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
    430 	EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
    431 	EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
    432 	EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
    433 	(prefix_table): Add entries for new instructions.
    434 	(vex_table) : Ditto.
    435 	(vex_len_table): Ditto.
    436 	(vex_w_table): Ditto.
    437 	(intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
    438 	mask_bd_mode handling.
    439 	(OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
    440 	handling.
    441 	(OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
    442 	handling.
    443 	(OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
    444 	(OP_EX): Add dqw_swap_mode handling.
    445 	(OP_VEX): Add mask_bd_mode handling.
    446 	(OP_Mask): Add mask_bd_mode handling.
    447 	* i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
    448 	(cpu_flags): Add CpuAVX512BW.
    449 	* i386-init.h: Regenerated.
    450 	* i386-opc.h (CpuAVX512BW): New.
    451 	(i386_cpu_flags): Add cpuavx512bw.
    452 	* i386-opc.tbl: Add AVX512BW instructions.
    453 	* i386-tbl.h: Regenerate.
    454 
    455 2014-07-22  Sergey Guriev  <sergey.s.guriev (a] intel.com>
    456 	    Alexander Ivchenko  <alexander.ivchenko (a] intel.com>
    457 	    Maxim Kuznetsov  <maxim.kuznetsov (a] intel.com>
    458 	    Sergey Lega  <sergey.s.lega (a] intel.com>
    459 	    Anna Tikhonova  <anna.tikhonova (a] intel.com>
    460 	    Ilya Tocar  <ilya.tocar (a] intel.com>
    461 	    Andrey Turetskiy  <andrey.turetskiy (a] intel.com>
    462 	    Ilya Verbin  <ilya.verbin (a] intel.com>
    463 	    Kirill Yukhin  <kirill.yukhin (a] intel.com>
    464 	    Michael Zolotukhin  <michael.v.zolotukhin (a] intel.com>
    465 
    466 	* i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
    467 	* i386-tbl.h: Regenerate.
    468 
    469 2014-07-22  Sergey Guriev  <sergey.s.guriev (a] intel.com>
    470 	    Alexander Ivchenko  <alexander.ivchenko (a] intel.com>
    471 	    Maxim Kuznetsov  <maxim.kuznetsov (a] intel.com>
    472 	    Sergey Lega  <sergey.s.lega (a] intel.com>
    473 	    Anna Tikhonova  <anna.tikhonova (a] intel.com>
    474 	    Ilya Tocar  <ilya.tocar (a] intel.com>
    475 	    Andrey Turetskiy  <andrey.turetskiy (a] intel.com>
    476 	    Ilya Verbin  <ilya.verbin (a] intel.com>
    477 	    Kirill Yukhin  <kirill.yukhin (a] intel.com>
    478 	    Michael Zolotukhin  <michael.v.zolotukhin (a] intel.com>
    479 
    480 	* i386-dis.c (intel_operand_size): Support 128/256 length in
    481 	vex_vsib_q_w_dq_mode.
    482 	(OP_E_memory): Add ymmq_mode handling, handle new broadcast.
    483 	* i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
    484 	(cpu_flags): Add CpuAVX512VL.
    485 	* i386-init.h: Regenerated.
    486 	* i386-opc.h (CpuAVX512VL): New.
    487 	(i386_cpu_flags): Add cpuavx512vl.
    488 	(BROADCAST_1TO4, BROADCAST_1TO2): Define.
    489 	* i386-opc.tbl: Add AVX512VL instructions.
    490 	* i386-tbl.h: Regenerate.
    491 
    492 2014-07-20  Stefan Kristiansson  <stefan.kristiansson (a] saunalahti.fi>
    493 
    494 	* or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
    495 	* or1k-opinst.c: Regenerate.
    496 
    497 2014-07-08  Ilya Tocar  <ilya.tocar (a] intel.com>
    498 
    499 	* i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
    500 	(EVEX_W_0F10_P_3_M_1): Fix vmovsd.
    501 
    502 2014-07-04  Alan Modra  <amodra (a] gmail.com>
    503 
    504 	* configure.ac: Rename from configure.in.
    505 	* Makefile.in: Regenerate.
    506 	* config.in: Regenerate.
    507 
    508 2014-07-04  Alan Modra  <amodra (a] gmail.com>
    509 
    510 	* configure.in: Include bfd/version.m4.
    511 	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
    512 	(BFD_VERSION): Delete.
    513 	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
    514 	* configure: Regenerate.
    515 	* Makefile.in: Regenerate.
    516 
    517 2014-07-01  Barney Stratford   <barney_stratford (a] fastmail.fm>
    518             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj (a] atmel.com>
    519             Pitchumani Sivanupandi  <pitchumani.s (a] atmel.com>
    520             Soundararajan  <Sounderarajan.D (a] atmel.com>
    521 
    522 	* avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
    523 	(print_insn_avr): Do not select opcode if insn ISA is avrtiny and
    524 	machine is not avrtiny.
    525 
    526 2014-06-26  Philippe De Muyter <phdm (a] macqel.be>
    527 
    528 	* or1k-desc.h (spr_field_masks): Add U suffix to the end of long
    529 	constants.
    530 
    531 2014-06-12  Alan Modra  <amodra (a] gmail.com>
    532 
    533 	* or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
    534 	* or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
    535 
    536 2014-06-10  H.J. Lu  <hongjiu.lu (a] intel.com>
    537 
    538 	* i386-dis.c (fwait_prefix): New.
    539 	(ckprefix): Set fwait_prefix.
    540 	(print_insn): Properly print prefixes before fwait.
    541 
    542 2014-06-07  Alan Modra  <amodra (a] gmail.com>
    543 
    544 	* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
    545 
    546 2014-06-05  Joel Brobecker  <brobecker (a] adacore.com>
    547 
    548 	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
    549 	bfd's development.sh.
    550 	* Makefile.in, configure: Regenerate.
    551 
    552 2014-06-03  Nick Clifton  <nickc (a] redhat.com>
    553 
    554 	* msp430-dis.c (msp430_doubleoperand): Use extension_word to
    555 	decide when extended addressing is being used.
    556 
    557 2014-06-02  Eric Botcazou  <ebotcazou (a] adacore.com>
    558 
    559 	* sparc-opc.c (cas): Disable for LEON.
    560 	(casl): Likewise.
    561 
    562 2014-05-20  Alan Modra  <amodra (a] gmail.com>
    563 
    564 	* m68k-dis.c: Don't include setjmp.h.
    565 
    566 2014-05-09  H.J. Lu  <hongjiu.lu (a] intel.com>
    567 
    568 	* i386-dis.c (ADDR16_PREFIX): Removed.
    569 	(ADDR32_PREFIX): Likewise.
    570 	(DATA16_PREFIX): Likewise.
    571 	(DATA32_PREFIX): Likewise.
    572 	(prefix_name): Updated.
    573 	(print_insn): Simplify data and address size prefixes processing.
    574 
    575 2014-05-08  Stefan Kristiansson  <stefan.kristiansson (a] saunalahti.fi>
    576 
    577 	* or1k-desc.c: Regenerated.
    578 	* or1k-desc.h: Likewise.
    579 	* or1k-opc.c: Likewise.
    580 	* or1k-opc.h: Likewise.
    581 	* or1k-opinst.c: Likewise.
    582 
    583 2014-05-07  Andrew Bennett  <andrew.bennett (a] imgtec.com>
    584 
    585 	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
    586 	(I34): New define.
    587 	(I36): New define.
    588 	(I66): New define.
    589 	(I68): New define.
    590 	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
    591 	mips64r5.
    592 	(parse_mips_dis_option): Update MSA and virtualization support to
    593 	allow mips64r3 and mips64r5.
    594 
    595 2014-05-07  Andrew Bennett  <andrew.bennett (a] imgtec.com>
    596 
    597 	* mips-opc.c (G3): Remove I4.
    598 
    599 2014-05-05  H.J. Lu  <hongjiu.lu (a] intel.com>
    600 
    601 	PR binutils/16893
    602 	* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
    603 	(end_codep): Likewise.
    604 	(mandatory_prefix): Likewise.
    605 	(active_seg_prefix): Likewise.
    606 	(ckprefix): Set active_seg_prefix to the active segment register
    607 	prefix.
    608 	(seg_prefix): Removed.
    609 	(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
    610 	for prefix index.  Ignore the index if it is invalid and the
    611 	mandatory prefix isn't required.
    612 	(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
    613 	mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
    614 	in used_prefixes here.  Don't print unused prefixes.  Check
    615 	active_seg_prefix for the active segment register prefix.
    616 	Restore the DFLAG bit in sizeflag if the data size prefix is
    617 	unused.  Check the unused mandatory PREFIX_XXX prefixes
    618 	(append_seg): Only print the segment register which gets used.
    619 	(OP_E_memory): Check active_seg_prefix for the segment register
    620 	prefix.
    621 	(OP_OFF): Likewise.
    622 	(OP_OFF64): Likewise.
    623 	(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
    624 
    625 2014-05-02  H.J. Lu  <hongjiu.lu (a] intel.com>
    626 
    627 	PR binutils/16886
    628 	* config.in: Regenerated.
    629 	* configure: Likewise.
    630 	* configure.in: Check if sigsetjmp is available.
    631 	* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
    632 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    633 	(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
    634 	* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
    635 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    636 	(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
    637 	* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
    638 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    639 	(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
    640 	* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
    641 	(OPCODES_SIGSETJMP): Likewise.
    642 	(OPCODES_SIGLONGJMP): Likewise.
    643 	* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
    644 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    645 	(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
    646 	* xtensa-dis.c (dis_private): Replace jmp_buf with
    647 	OPCODES_SIGJMP_BUF.
    648 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    649 	(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
    650 	* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
    651 	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
    652 	(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
    653 
    654 2014-05-01  H.J. Lu  <hongjiu.lu (a] intel.com>
    655 
    656 	PR binutils/16891
    657 	* i386-dis.c (print_insn): Handle prefixes before fwait.
    658 
    659 2014-04-26  Alan Modra  <amodra (a] gmail.com>
    660 
    661 	* po/POTFILES.in: Regenerate.
    662 
    663 2014-04-23  Andrew Bennett  <andrew.bennett (a] imgtec.com>
    664 
    665 	* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
    666 	to allow the MIPS XPA ASE.
    667 	(parse_mips_dis_option): Process the -Mxpa option.
    668 	* mips-opc.c (XPA): New define.
    669 	(mips_builtin_opcodes): Add MIPS XPA instructions and move the
    670 	locations of the ctc0 and cfc0 instructions.
    671 
    672 2014-04-22  Christian Svensson  <blue (a] cmd.nu>
    673 
    674 	* Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
    675 	* configure.in: Likewise.
    676 	* disassemble.c: Likewise.
    677 	* or1k-asm.c: New file.
    678 	* or1k-desc.c: New file.
    679 	* or1k-desc.h: New file.
    680 	* or1k-dis.c: New file.
    681 	* or1k-ibld.c: New file.
    682 	* or1k-opc.c: New file.
    683 	* or1k-opc.h: New file.
    684 	* or1k-opinst.c: New file.
    685 	* Makefile.in: Regenerate.
    686 	* configure: Regenerate.
    687 	* openrisc-asm.c: Delete.
    688 	* openrisc-desc.c: Delete.
    689 	* openrisc-desc.h: Delete.
    690 	* openrisc-dis.c: Delete.
    691 	* openrisc-ibld.c: Delete.
    692 	* openrisc-opc.c: Delete.
    693 	* openrisc-opc.h: Delete.
    694 	* or32-dis.c: Delete.
    695 	* or32-opc.c: Delete.
    696 
    697 2014-04-04  Ilya Tocar  <ilya.tocar (a] intel.com>
    698 
    699 	* i386-dis.c (rm_table): Add encls, enclu.
    700 	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
    701 	(cpu_flags): Add CpuSE1.
    702 	* i386-opc.h (enum): Add CpuSE1.
    703 	(i386_cpu_flags): Add cpuse1.
    704 	* i386-opc.tbl: Add encls, enclu.
    705 	* i386-init.h: Regenerated.
    706 	* i386-tbl.h: Likewise.
    707 
    708 2014-04-02  Anthony Green  <green (a] moxielogic.com>
    709 
    710 	* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
    711 	instructions, sex.b and sex.s.
    712 
    713 2014-03-26  Jiong Wang  <jiong.wang (a] arm.com>
    714 
    715 	* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
    716 	instructions.
    717 
    718 2014-03-20  Ilya Tocar  <ilya.tocar (a] intel.com>
    719 
    720 	* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
    721 	vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
    722 	vscatterqps.
    723 	* i386-tbl.h: Regenerate.
    724 
    725 2014-03-19  Jose E. Marchesi  <jose.marchesi (a] oracle.com>
    726 
    727 	* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
    728 	%hstick_enable added.
    729 
    730 2014-03-19  Nick Clifton  <nickc (a] redhat.com>
    731 
    732 	* rx-decode.opc (bwl): Allow for bogus instructions with a size
    733 	field of 3.
    734 	(sbwl, ubwl, SCALE): Likewise.
    735 	* rx-decode.c: Regenerate.
    736 
    737 2014-03-12  Alan Modra  <amodra (a] gmail.com>
    738 
    739 	* Makefile.in: Regenerate.
    740 
    741 2014-03-05  Alan Modra  <amodra (a] gmail.com>
    742 
    743 	Update copyright years.
    744 
    745 2014-03-04  Heiher  <r (a] hev.cc>
    746 
    747 	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
    748 
    749 2014-03-04  Richard Sandiford  <rdsandiford (a] googlemail.com>
    750 
    751 	* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
    752 	so that they come after the Loongson extensions.
    753 
    754 2014-03-03  Alan Modra  <amodra (a] gmail.com>
    755 
    756 	* i386-gen.c (process_copyright): Emit copyright notice on one line.
    757 
    758 2014-02-28  Alan Modra  <amodra (a] gmail.com>
    759 
    760 	* msp430-decode.c: Regenerate.
    761 
    762 2014-02-27  Jiong Wang  <jiong.wang (a] arm.com>
    763 
    764 	* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
    765 	FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
    766 
    767 2014-02-27  Yufeng Zhang  <yufeng.zhang (a] arm.com>
    768 
    769 	* aarch64-opc.c (print_register_offset_address): Call
    770 	get_int_reg_name to prepare the register name.
    771 
    772 2014-02-25  Ilya Tocar  <ilya.tocar (a] intel.com>
    773 
    774 	* i386-opc.tbl: Remove wrong variant of vcvtps2ph
    775 	* i386-tbl.h: Regenerate.
    776 
    777 2014-02-20  Ilya Tocar  <ilya.tocar (a] intel.com>
    778 
    779 	* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
    780 	(cpu_flags): Add CpuPREFETCHWT1.
    781 	* i386-init.h: Regenerate.
    782 	* i386-opc.h (CpuPREFETCHWT1): New.
    783 	(i386_cpu_flags): Add cpuprefetchwt1.
    784 	* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
    785 	* i386-tbl.h: Regenerate.
    786 
    787 2014-02-20  Ilya Tocar  <ilya.tocar (a] intel.com>
    788 
    789 	* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
    790 	to CpuAVX512F.
    791 	* i386-tbl.h: Regenerate.
    792 
    793 2014-02-19  H.J. Lu  <hongjiu.lu (a] intel.com>
    794 
    795 	* i386-gen.c (output_cpu_flags): Don't output trailing space.
    796 	(output_opcode_modifier): Likewise.
    797 	(output_operand_type): Likewise.
    798 	* i386-init.h: Regenerated.
    799 	* i386-tbl.h: Likewise.
    800 
    801 2014-02-12  Ilya Tocar  <ilya.tocar (a] intel.com>
    802 
    803 	* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
    804 	MOD_0FC7_REG_5.
    805 	(PREFIX enum): Add PREFIX_0FAE_REG_7.
    806 	(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
    807 	(prefix_table): Add clflusopt.
    808 	(mod_table): Add xrstors, xsavec, xsaves.
    809 	* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
    810 	CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
    811 	(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
    812 	* i386-init.h: Regenerate.
    813 	* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
    814 	xsaves64, xsavec, xsavec64.
    815 	* i386-tbl.h: Regenerate.
    816 
    817 2014-02-10  Alan Modra  <amodra (a] gmail.com>
    818 
    819 	* po/POTFILES.in: Regenerate.
    820 	* po/opcodes.pot: Regenerate.
    821 
    822 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin (a] gmail.com>
    823 	    Jan Beulich  <jbeulich (a] suse.com>
    824 
    825 	PR binutils/16490
    826 	* i386-dis.c (OP_E_memory): Fix shift computation for
    827 	vex_vsib_q_w_dq_mode.
    828 
    829 2014-01-09  Bradley Nelson  <bradnelson (a] google.com>
    830 	    Roland McGrath  <mcgrathr (a] google.com>
    831 
    832 	* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
    833 	last_rex_prefix is -1.
    834 
    835 2014-01-08  H.J. Lu  <hongjiu.lu (a] intel.com>
    836 
    837 	* i386-gen.c (process_copyright): Update copyright year to 2014.
    838 
    839 2014-01-03  Maciej W. Rozycki  <macro (a] codesourcery.com>
    840 
    841 	* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
    842 
    843 For older changes see ChangeLog-2013
    844 
    846 Copyright (C) 2014 Free Software Foundation, Inc.
    847 
    848 Copying and distribution of this file, with or without modification,
    849 are permitted in any medium without royalty provided the copyright
    850 notice and this notice are preserved.
    851 
    852 Local Variables:
    853 mode: change-log
    854 left-margin: 8
    855 fill-column: 74
    856 version-control: never
    857 End:
    858