1 /* Instruction building/extraction support for fr30. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2014 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "fr30-desc.h" 34 #include "fr30-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift; 212 213 if (CGEN_INSN_LSB0_P) 214 shift = (word_offset + start + 1) - length; 215 else 216 shift = total_length - (word_offset + start + length); 217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 218 } 219 220 #else /* ! CGEN_INT_INSN_P */ 221 222 { 223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 224 225 insert_1 (cd, value, start, length, word_length, bufp); 226 } 227 228 #endif /* ! CGEN_INT_INSN_P */ 229 230 return NULL; 231 } 232 233 /* Default insn builder (insert handler). 234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 236 recorded in host byte order, otherwise BUFFER is an array of bytes 237 and the value is recorded in target byte order). 238 The result is an error message or NULL if success. */ 239 240 static const char * 241 insert_insn_normal (CGEN_CPU_DESC cd, 242 const CGEN_INSN * insn, 243 CGEN_FIELDS * fields, 244 CGEN_INSN_BYTES_PTR buffer, 245 bfd_vma pc) 246 { 247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 248 unsigned long value; 249 const CGEN_SYNTAX_CHAR_TYPE * syn; 250 251 CGEN_INIT_INSERT (cd); 252 value = CGEN_INSN_BASE_VALUE (insn); 253 254 /* If we're recording insns as numbers (rather than a string of bytes), 255 target byte order handling is deferred until later. */ 256 257 #if CGEN_INT_INSN_P 258 259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 260 CGEN_FIELDS_BITSIZE (fields), value); 261 262 #else 263 264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 265 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 266 value); 267 268 #endif /* ! CGEN_INT_INSN_P */ 269 270 /* ??? It would be better to scan the format's fields. 271 Still need to be able to insert a value based on the operand though; 272 e.g. storing a branch displacement that got resolved later. 273 Needs more thought first. */ 274 275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 276 { 277 const char *errmsg; 278 279 if (CGEN_SYNTAX_CHAR_P (* syn)) 280 continue; 281 282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 283 fields, buffer, pc); 284 if (errmsg) 285 return errmsg; 286 } 287 288 return NULL; 289 } 290 291 #if CGEN_INT_INSN_P 292 /* Cover function to store an insn value into an integral insn. Must go here 293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 294 295 static void 296 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 297 CGEN_INSN_BYTES_PTR buf, 298 int length, 299 int insn_length, 300 CGEN_INSN_INT value) 301 { 302 /* For architectures with insns smaller than the base-insn-bitsize, 303 length may be too big. */ 304 if (length > insn_length) 305 *buf = value; 306 else 307 { 308 int shift = insn_length - length; 309 /* Written this way to avoid undefined behaviour. */ 310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 311 312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 313 } 314 } 315 #endif 316 317 /* Operand extraction. */ 319 320 #if ! CGEN_INT_INSN_P 321 322 /* Subroutine of extract_normal. 323 Ensure sufficient bytes are cached in EX_INFO. 324 OFFSET is the offset in bytes from the start of the insn of the value. 325 BYTES is the length of the needed value. 326 Returns 1 for success, 0 for failure. */ 327 328 static CGEN_INLINE int 329 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 330 CGEN_EXTRACT_INFO *ex_info, 331 int offset, 332 int bytes, 333 bfd_vma pc) 334 { 335 /* It's doubtful that the middle part has already been fetched so 336 we don't optimize that case. kiss. */ 337 unsigned int mask; 338 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 339 340 /* First do a quick check. */ 341 mask = (1 << bytes) - 1; 342 if (((ex_info->valid >> offset) & mask) == mask) 343 return 1; 344 345 /* Search for the first byte we need to read. */ 346 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 347 if (! (mask & ex_info->valid)) 348 break; 349 350 if (bytes) 351 { 352 int status; 353 354 pc += offset; 355 status = (*info->read_memory_func) 356 (pc, ex_info->insn_bytes + offset, bytes, info); 357 358 if (status != 0) 359 { 360 (*info->memory_error_func) (status, pc, info); 361 return 0; 362 } 363 364 ex_info->valid |= ((1 << bytes) - 1) << offset; 365 } 366 367 return 1; 368 } 369 370 /* Subroutine of extract_normal. */ 371 372 static CGEN_INLINE long 373 extract_1 (CGEN_CPU_DESC cd, 374 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 375 int start, 376 int length, 377 int word_length, 378 unsigned char *bufp, 379 bfd_vma pc ATTRIBUTE_UNUSED) 380 { 381 unsigned long x; 382 int shift; 383 384 x = cgen_get_insn_value (cd, bufp, word_length); 385 386 if (CGEN_INSN_LSB0_P) 387 shift = (start + 1) - length; 388 else 389 shift = (word_length - (start + length)); 390 return x >> shift; 391 } 392 393 #endif /* ! CGEN_INT_INSN_P */ 394 395 /* Default extraction routine. 396 397 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 398 or sometimes less for cases like the m32r where the base insn size is 32 399 but some insns are 16 bits. 400 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 401 but for generality we take a bitmask of all of them. 402 WORD_OFFSET is the offset in bits from the start of the insn of the value. 403 WORD_LENGTH is the length of the word in bits in which the value resides. 404 START is the starting bit number in the word, architecture origin. 405 LENGTH is the length of VALUE in bits. 406 TOTAL_LENGTH is the total length of the insn in bits. 407 408 Returns 1 for success, 0 for failure. */ 409 410 /* ??? The return code isn't properly used. wip. */ 411 412 /* ??? This doesn't handle bfd_vma's. Create another function when 413 necessary. */ 414 415 static int 416 extract_normal (CGEN_CPU_DESC cd, 417 #if ! CGEN_INT_INSN_P 418 CGEN_EXTRACT_INFO *ex_info, 419 #else 420 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 421 #endif 422 CGEN_INSN_INT insn_value, 423 unsigned int attrs, 424 unsigned int word_offset, 425 unsigned int start, 426 unsigned int length, 427 unsigned int word_length, 428 unsigned int total_length, 429 #if ! CGEN_INT_INSN_P 430 bfd_vma pc, 431 #else 432 bfd_vma pc ATTRIBUTE_UNUSED, 433 #endif 434 long *valuep) 435 { 436 long value, mask; 437 438 /* If LENGTH is zero, this operand doesn't contribute to the value 439 so give it a standard value of zero. */ 440 if (length == 0) 441 { 442 *valuep = 0; 443 return 1; 444 } 445 446 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 447 abort (); 448 449 /* For architectures with insns smaller than the insn-base-bitsize, 450 word_length may be too big. */ 451 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 452 { 453 if (word_offset + word_length > total_length) 454 word_length = total_length - word_offset; 455 } 456 457 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 458 459 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 460 { 461 if (CGEN_INSN_LSB0_P) 462 value = insn_value >> ((word_offset + start + 1) - length); 463 else 464 value = insn_value >> (total_length - ( word_offset + start + length)); 465 } 466 467 #if ! CGEN_INT_INSN_P 468 469 else 470 { 471 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 472 473 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 474 abort (); 475 476 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 477 return 0; 478 479 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 480 } 481 482 #endif /* ! CGEN_INT_INSN_P */ 483 484 /* Written this way to avoid undefined behaviour. */ 485 mask = (((1L << (length - 1)) - 1) << 1) | 1; 486 487 value &= mask; 488 /* sign extend? */ 489 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 490 && (value & (1L << (length - 1)))) 491 value |= ~mask; 492 493 *valuep = value; 494 495 return 1; 496 } 497 498 /* Default insn extractor. 499 500 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 501 The extracted fields are stored in FIELDS. 502 EX_INFO is used to handle reading variable length insns. 503 Return the length of the insn in bits, or 0 if no match, 504 or -1 if an error occurs fetching data (memory_error_func will have 505 been called). */ 506 507 static int 508 extract_insn_normal (CGEN_CPU_DESC cd, 509 const CGEN_INSN *insn, 510 CGEN_EXTRACT_INFO *ex_info, 511 CGEN_INSN_INT insn_value, 512 CGEN_FIELDS *fields, 513 bfd_vma pc) 514 { 515 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 516 const CGEN_SYNTAX_CHAR_TYPE *syn; 517 518 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 519 520 CGEN_INIT_EXTRACT (cd); 521 522 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 523 { 524 int length; 525 526 if (CGEN_SYNTAX_CHAR_P (*syn)) 527 continue; 528 529 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 530 ex_info, insn_value, fields, pc); 531 if (length <= 0) 532 return length; 533 } 534 535 /* We recognized and successfully extracted this insn. */ 536 return CGEN_INSN_BITSIZE (insn); 537 } 538 539 /* Machine generated code added here. */ 541 542 const char * fr30_cgen_insert_operand 543 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 544 545 /* Main entry point for operand insertion. 546 547 This function is basically just a big switch statement. Earlier versions 548 used tables to look up the function to use, but 549 - if the table contains both assembler and disassembler functions then 550 the disassembler contains much of the assembler and vice-versa, 551 - there's a lot of inlining possibilities as things grow, 552 - using a switch statement avoids the function call overhead. 553 554 This function could be moved into `parse_insn_normal', but keeping it 555 separate makes clear the interface between `parse_insn_normal' and each of 556 the handlers. It's also needed by GAS to insert operands that couldn't be 557 resolved during parsing. */ 558 559 const char * 560 fr30_cgen_insert_operand (CGEN_CPU_DESC cd, 561 int opindex, 562 CGEN_FIELDS * fields, 563 CGEN_INSN_BYTES_PTR buffer, 564 bfd_vma pc ATTRIBUTE_UNUSED) 565 { 566 const char * errmsg = NULL; 567 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 568 569 switch (opindex) 570 { 571 case FR30_OPERAND_CRI : 572 errmsg = insert_normal (cd, fields->f_CRi, 0, 16, 12, 4, 16, total_length, buffer); 573 break; 574 case FR30_OPERAND_CRJ : 575 errmsg = insert_normal (cd, fields->f_CRj, 0, 16, 8, 4, 16, total_length, buffer); 576 break; 577 case FR30_OPERAND_R13 : 578 break; 579 case FR30_OPERAND_R14 : 580 break; 581 case FR30_OPERAND_R15 : 582 break; 583 case FR30_OPERAND_RI : 584 errmsg = insert_normal (cd, fields->f_Ri, 0, 0, 12, 4, 16, total_length, buffer); 585 break; 586 case FR30_OPERAND_RIC : 587 errmsg = insert_normal (cd, fields->f_Ric, 0, 16, 12, 4, 16, total_length, buffer); 588 break; 589 case FR30_OPERAND_RJ : 590 errmsg = insert_normal (cd, fields->f_Rj, 0, 0, 8, 4, 16, total_length, buffer); 591 break; 592 case FR30_OPERAND_RJC : 593 errmsg = insert_normal (cd, fields->f_Rjc, 0, 16, 8, 4, 16, total_length, buffer); 594 break; 595 case FR30_OPERAND_RS1 : 596 errmsg = insert_normal (cd, fields->f_Rs1, 0, 0, 8, 4, 16, total_length, buffer); 597 break; 598 case FR30_OPERAND_RS2 : 599 errmsg = insert_normal (cd, fields->f_Rs2, 0, 0, 12, 4, 16, total_length, buffer); 600 break; 601 case FR30_OPERAND_CC : 602 errmsg = insert_normal (cd, fields->f_cc, 0, 0, 4, 4, 16, total_length, buffer); 603 break; 604 case FR30_OPERAND_CCC : 605 errmsg = insert_normal (cd, fields->f_ccc, 0, 16, 0, 8, 16, total_length, buffer); 606 break; 607 case FR30_OPERAND_DIR10 : 608 { 609 long value = fields->f_dir10; 610 value = ((USI) (value) >> (2)); 611 errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); 612 } 613 break; 614 case FR30_OPERAND_DIR8 : 615 errmsg = insert_normal (cd, fields->f_dir8, 0, 0, 8, 8, 16, total_length, buffer); 616 break; 617 case FR30_OPERAND_DIR9 : 618 { 619 long value = fields->f_dir9; 620 value = ((USI) (value) >> (1)); 621 errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); 622 } 623 break; 624 case FR30_OPERAND_DISP10 : 625 { 626 long value = fields->f_disp10; 627 value = ((SI) (value) >> (2)); 628 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer); 629 } 630 break; 631 case FR30_OPERAND_DISP8 : 632 errmsg = insert_normal (cd, fields->f_disp8, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer); 633 break; 634 case FR30_OPERAND_DISP9 : 635 { 636 long value = fields->f_disp9; 637 value = ((SI) (value) >> (1)); 638 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer); 639 } 640 break; 641 case FR30_OPERAND_I20 : 642 { 643 { 644 FLD (f_i20_4) = ((UINT) (FLD (f_i20)) >> (16)); 645 FLD (f_i20_16) = ((FLD (f_i20)) & (65535)); 646 } 647 errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer); 648 if (errmsg) 649 break; 650 errmsg = insert_normal (cd, fields->f_i20_16, 0, 16, 0, 16, 16, total_length, buffer); 651 if (errmsg) 652 break; 653 } 654 break; 655 case FR30_OPERAND_I32 : 656 errmsg = insert_normal (cd, fields->f_i32, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, buffer); 657 break; 658 case FR30_OPERAND_I8 : 659 errmsg = insert_normal (cd, fields->f_i8, 0, 0, 4, 8, 16, total_length, buffer); 660 break; 661 case FR30_OPERAND_LABEL12 : 662 { 663 long value = fields->f_rel12; 664 value = ((SI) (((value) - (((pc) + (2))))) >> (1)); 665 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, buffer); 666 } 667 break; 668 case FR30_OPERAND_LABEL9 : 669 { 670 long value = fields->f_rel9; 671 value = ((SI) (((value) - (((pc) + (2))))) >> (1)); 672 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, buffer); 673 } 674 break; 675 case FR30_OPERAND_M4 : 676 { 677 long value = fields->f_m4; 678 value = ((value) & (15)); 679 errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer); 680 } 681 break; 682 case FR30_OPERAND_PS : 683 break; 684 case FR30_OPERAND_REGLIST_HI_LD : 685 errmsg = insert_normal (cd, fields->f_reglist_hi_ld, 0, 0, 8, 8, 16, total_length, buffer); 686 break; 687 case FR30_OPERAND_REGLIST_HI_ST : 688 errmsg = insert_normal (cd, fields->f_reglist_hi_st, 0, 0, 8, 8, 16, total_length, buffer); 689 break; 690 case FR30_OPERAND_REGLIST_LOW_LD : 691 errmsg = insert_normal (cd, fields->f_reglist_low_ld, 0, 0, 8, 8, 16, total_length, buffer); 692 break; 693 case FR30_OPERAND_REGLIST_LOW_ST : 694 errmsg = insert_normal (cd, fields->f_reglist_low_st, 0, 0, 8, 8, 16, total_length, buffer); 695 break; 696 case FR30_OPERAND_S10 : 697 { 698 long value = fields->f_s10; 699 value = ((SI) (value) >> (2)); 700 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, buffer); 701 } 702 break; 703 case FR30_OPERAND_U10 : 704 { 705 long value = fields->f_u10; 706 value = ((USI) (value) >> (2)); 707 errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); 708 } 709 break; 710 case FR30_OPERAND_U4 : 711 errmsg = insert_normal (cd, fields->f_u4, 0, 0, 8, 4, 16, total_length, buffer); 712 break; 713 case FR30_OPERAND_U4C : 714 errmsg = insert_normal (cd, fields->f_u4c, 0, 0, 12, 4, 16, total_length, buffer); 715 break; 716 case FR30_OPERAND_U8 : 717 errmsg = insert_normal (cd, fields->f_u8, 0, 0, 8, 8, 16, total_length, buffer); 718 break; 719 case FR30_OPERAND_UDISP6 : 720 { 721 long value = fields->f_udisp6; 722 value = ((USI) (value) >> (2)); 723 errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer); 724 } 725 break; 726 727 default : 728 /* xgettext:c-format */ 729 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 730 opindex); 731 abort (); 732 } 733 734 return errmsg; 735 } 736 737 int fr30_cgen_extract_operand 738 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 739 740 /* Main entry point for operand extraction. 741 The result is <= 0 for error, >0 for success. 742 ??? Actual values aren't well defined right now. 743 744 This function is basically just a big switch statement. Earlier versions 745 used tables to look up the function to use, but 746 - if the table contains both assembler and disassembler functions then 747 the disassembler contains much of the assembler and vice-versa, 748 - there's a lot of inlining possibilities as things grow, 749 - using a switch statement avoids the function call overhead. 750 751 This function could be moved into `print_insn_normal', but keeping it 752 separate makes clear the interface between `print_insn_normal' and each of 753 the handlers. */ 754 755 int 756 fr30_cgen_extract_operand (CGEN_CPU_DESC cd, 757 int opindex, 758 CGEN_EXTRACT_INFO *ex_info, 759 CGEN_INSN_INT insn_value, 760 CGEN_FIELDS * fields, 761 bfd_vma pc) 762 { 763 /* Assume success (for those operands that are nops). */ 764 int length = 1; 765 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 766 767 switch (opindex) 768 { 769 case FR30_OPERAND_CRI : 770 length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_CRi); 771 break; 772 case FR30_OPERAND_CRJ : 773 length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_CRj); 774 break; 775 case FR30_OPERAND_R13 : 776 break; 777 case FR30_OPERAND_R14 : 778 break; 779 case FR30_OPERAND_R15 : 780 break; 781 case FR30_OPERAND_RI : 782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Ri); 783 break; 784 case FR30_OPERAND_RIC : 785 length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_Ric); 786 break; 787 case FR30_OPERAND_RJ : 788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rj); 789 break; 790 case FR30_OPERAND_RJC : 791 length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_Rjc); 792 break; 793 case FR30_OPERAND_RS1 : 794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rs1); 795 break; 796 case FR30_OPERAND_RS2 : 797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Rs2); 798 break; 799 case FR30_OPERAND_CC : 800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 16, total_length, pc, & fields->f_cc); 801 break; 802 case FR30_OPERAND_CCC : 803 length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 8, 16, total_length, pc, & fields->f_ccc); 804 break; 805 case FR30_OPERAND_DIR10 : 806 { 807 long value; 808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); 809 value = ((value) << (2)); 810 fields->f_dir10 = value; 811 } 812 break; 813 case FR30_OPERAND_DIR8 : 814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_dir8); 815 break; 816 case FR30_OPERAND_DIR9 : 817 { 818 long value; 819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); 820 value = ((value) << (1)); 821 fields->f_dir9 = value; 822 } 823 break; 824 case FR30_OPERAND_DISP10 : 825 { 826 long value; 827 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value); 828 value = ((value) << (2)); 829 fields->f_disp10 = value; 830 } 831 break; 832 case FR30_OPERAND_DISP8 : 833 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & fields->f_disp8); 834 break; 835 case FR30_OPERAND_DISP9 : 836 { 837 long value; 838 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value); 839 value = ((value) << (1)); 840 fields->f_disp9 = value; 841 } 842 break; 843 case FR30_OPERAND_I20 : 844 { 845 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_i20_4); 846 if (length <= 0) break; 847 length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 16, 16, total_length, pc, & fields->f_i20_16); 848 if (length <= 0) break; 849 { 850 FLD (f_i20) = ((((FLD (f_i20_4)) << (16))) | (FLD (f_i20_16))); 851 } 852 } 853 break; 854 case FR30_OPERAND_I32 : 855 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, pc, & fields->f_i32); 856 break; 857 case FR30_OPERAND_I8 : 858 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 16, total_length, pc, & fields->f_i8); 859 break; 860 case FR30_OPERAND_LABEL12 : 861 { 862 long value; 863 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value); 864 value = ((((value) << (1))) + (((pc) + (2)))); 865 fields->f_rel12 = value; 866 } 867 break; 868 case FR30_OPERAND_LABEL9 : 869 { 870 long value; 871 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value); 872 value = ((((value) << (1))) + (((pc) + (2)))); 873 fields->f_rel9 = value; 874 } 875 break; 876 case FR30_OPERAND_M4 : 877 { 878 long value; 879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value); 880 value = ((value) | (((-1) << (4)))); 881 fields->f_m4 = value; 882 } 883 break; 884 case FR30_OPERAND_PS : 885 break; 886 case FR30_OPERAND_REGLIST_HI_LD : 887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_ld); 888 break; 889 case FR30_OPERAND_REGLIST_HI_ST : 890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_st); 891 break; 892 case FR30_OPERAND_REGLIST_LOW_LD : 893 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_ld); 894 break; 895 case FR30_OPERAND_REGLIST_LOW_ST : 896 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_st); 897 break; 898 case FR30_OPERAND_S10 : 899 { 900 long value; 901 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value); 902 value = ((value) << (2)); 903 fields->f_s10 = value; 904 } 905 break; 906 case FR30_OPERAND_U10 : 907 { 908 long value; 909 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); 910 value = ((value) << (2)); 911 fields->f_u10 = value; 912 } 913 break; 914 case FR30_OPERAND_U4 : 915 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_u4); 916 break; 917 case FR30_OPERAND_U4C : 918 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_u4c); 919 break; 920 case FR30_OPERAND_U8 : 921 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_u8); 922 break; 923 case FR30_OPERAND_UDISP6 : 924 { 925 long value; 926 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value); 927 value = ((value) << (2)); 928 fields->f_udisp6 = value; 929 } 930 break; 931 932 default : 933 /* xgettext:c-format */ 934 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 935 opindex); 936 abort (); 937 } 938 939 return length; 940 } 941 942 cgen_insert_fn * const fr30_cgen_insert_handlers[] = 943 { 944 insert_insn_normal, 945 }; 946 947 cgen_extract_fn * const fr30_cgen_extract_handlers[] = 948 { 949 extract_insn_normal, 950 }; 951 952 int fr30_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 953 bfd_vma fr30_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 954 955 /* Getting values from cgen_fields is handled by a collection of functions. 956 They are distinguished by the type of the VALUE argument they return. 957 TODO: floating point, inlining support, remove cases where result type 958 not appropriate. */ 959 960 int 961 fr30_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 962 int opindex, 963 const CGEN_FIELDS * fields) 964 { 965 int value; 966 967 switch (opindex) 968 { 969 case FR30_OPERAND_CRI : 970 value = fields->f_CRi; 971 break; 972 case FR30_OPERAND_CRJ : 973 value = fields->f_CRj; 974 break; 975 case FR30_OPERAND_R13 : 976 value = 0; 977 break; 978 case FR30_OPERAND_R14 : 979 value = 0; 980 break; 981 case FR30_OPERAND_R15 : 982 value = 0; 983 break; 984 case FR30_OPERAND_RI : 985 value = fields->f_Ri; 986 break; 987 case FR30_OPERAND_RIC : 988 value = fields->f_Ric; 989 break; 990 case FR30_OPERAND_RJ : 991 value = fields->f_Rj; 992 break; 993 case FR30_OPERAND_RJC : 994 value = fields->f_Rjc; 995 break; 996 case FR30_OPERAND_RS1 : 997 value = fields->f_Rs1; 998 break; 999 case FR30_OPERAND_RS2 : 1000 value = fields->f_Rs2; 1001 break; 1002 case FR30_OPERAND_CC : 1003 value = fields->f_cc; 1004 break; 1005 case FR30_OPERAND_CCC : 1006 value = fields->f_ccc; 1007 break; 1008 case FR30_OPERAND_DIR10 : 1009 value = fields->f_dir10; 1010 break; 1011 case FR30_OPERAND_DIR8 : 1012 value = fields->f_dir8; 1013 break; 1014 case FR30_OPERAND_DIR9 : 1015 value = fields->f_dir9; 1016 break; 1017 case FR30_OPERAND_DISP10 : 1018 value = fields->f_disp10; 1019 break; 1020 case FR30_OPERAND_DISP8 : 1021 value = fields->f_disp8; 1022 break; 1023 case FR30_OPERAND_DISP9 : 1024 value = fields->f_disp9; 1025 break; 1026 case FR30_OPERAND_I20 : 1027 value = fields->f_i20; 1028 break; 1029 case FR30_OPERAND_I32 : 1030 value = fields->f_i32; 1031 break; 1032 case FR30_OPERAND_I8 : 1033 value = fields->f_i8; 1034 break; 1035 case FR30_OPERAND_LABEL12 : 1036 value = fields->f_rel12; 1037 break; 1038 case FR30_OPERAND_LABEL9 : 1039 value = fields->f_rel9; 1040 break; 1041 case FR30_OPERAND_M4 : 1042 value = fields->f_m4; 1043 break; 1044 case FR30_OPERAND_PS : 1045 value = 0; 1046 break; 1047 case FR30_OPERAND_REGLIST_HI_LD : 1048 value = fields->f_reglist_hi_ld; 1049 break; 1050 case FR30_OPERAND_REGLIST_HI_ST : 1051 value = fields->f_reglist_hi_st; 1052 break; 1053 case FR30_OPERAND_REGLIST_LOW_LD : 1054 value = fields->f_reglist_low_ld; 1055 break; 1056 case FR30_OPERAND_REGLIST_LOW_ST : 1057 value = fields->f_reglist_low_st; 1058 break; 1059 case FR30_OPERAND_S10 : 1060 value = fields->f_s10; 1061 break; 1062 case FR30_OPERAND_U10 : 1063 value = fields->f_u10; 1064 break; 1065 case FR30_OPERAND_U4 : 1066 value = fields->f_u4; 1067 break; 1068 case FR30_OPERAND_U4C : 1069 value = fields->f_u4c; 1070 break; 1071 case FR30_OPERAND_U8 : 1072 value = fields->f_u8; 1073 break; 1074 case FR30_OPERAND_UDISP6 : 1075 value = fields->f_udisp6; 1076 break; 1077 1078 default : 1079 /* xgettext:c-format */ 1080 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1081 opindex); 1082 abort (); 1083 } 1084 1085 return value; 1086 } 1087 1088 bfd_vma 1089 fr30_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1090 int opindex, 1091 const CGEN_FIELDS * fields) 1092 { 1093 bfd_vma value; 1094 1095 switch (opindex) 1096 { 1097 case FR30_OPERAND_CRI : 1098 value = fields->f_CRi; 1099 break; 1100 case FR30_OPERAND_CRJ : 1101 value = fields->f_CRj; 1102 break; 1103 case FR30_OPERAND_R13 : 1104 value = 0; 1105 break; 1106 case FR30_OPERAND_R14 : 1107 value = 0; 1108 break; 1109 case FR30_OPERAND_R15 : 1110 value = 0; 1111 break; 1112 case FR30_OPERAND_RI : 1113 value = fields->f_Ri; 1114 break; 1115 case FR30_OPERAND_RIC : 1116 value = fields->f_Ric; 1117 break; 1118 case FR30_OPERAND_RJ : 1119 value = fields->f_Rj; 1120 break; 1121 case FR30_OPERAND_RJC : 1122 value = fields->f_Rjc; 1123 break; 1124 case FR30_OPERAND_RS1 : 1125 value = fields->f_Rs1; 1126 break; 1127 case FR30_OPERAND_RS2 : 1128 value = fields->f_Rs2; 1129 break; 1130 case FR30_OPERAND_CC : 1131 value = fields->f_cc; 1132 break; 1133 case FR30_OPERAND_CCC : 1134 value = fields->f_ccc; 1135 break; 1136 case FR30_OPERAND_DIR10 : 1137 value = fields->f_dir10; 1138 break; 1139 case FR30_OPERAND_DIR8 : 1140 value = fields->f_dir8; 1141 break; 1142 case FR30_OPERAND_DIR9 : 1143 value = fields->f_dir9; 1144 break; 1145 case FR30_OPERAND_DISP10 : 1146 value = fields->f_disp10; 1147 break; 1148 case FR30_OPERAND_DISP8 : 1149 value = fields->f_disp8; 1150 break; 1151 case FR30_OPERAND_DISP9 : 1152 value = fields->f_disp9; 1153 break; 1154 case FR30_OPERAND_I20 : 1155 value = fields->f_i20; 1156 break; 1157 case FR30_OPERAND_I32 : 1158 value = fields->f_i32; 1159 break; 1160 case FR30_OPERAND_I8 : 1161 value = fields->f_i8; 1162 break; 1163 case FR30_OPERAND_LABEL12 : 1164 value = fields->f_rel12; 1165 break; 1166 case FR30_OPERAND_LABEL9 : 1167 value = fields->f_rel9; 1168 break; 1169 case FR30_OPERAND_M4 : 1170 value = fields->f_m4; 1171 break; 1172 case FR30_OPERAND_PS : 1173 value = 0; 1174 break; 1175 case FR30_OPERAND_REGLIST_HI_LD : 1176 value = fields->f_reglist_hi_ld; 1177 break; 1178 case FR30_OPERAND_REGLIST_HI_ST : 1179 value = fields->f_reglist_hi_st; 1180 break; 1181 case FR30_OPERAND_REGLIST_LOW_LD : 1182 value = fields->f_reglist_low_ld; 1183 break; 1184 case FR30_OPERAND_REGLIST_LOW_ST : 1185 value = fields->f_reglist_low_st; 1186 break; 1187 case FR30_OPERAND_S10 : 1188 value = fields->f_s10; 1189 break; 1190 case FR30_OPERAND_U10 : 1191 value = fields->f_u10; 1192 break; 1193 case FR30_OPERAND_U4 : 1194 value = fields->f_u4; 1195 break; 1196 case FR30_OPERAND_U4C : 1197 value = fields->f_u4c; 1198 break; 1199 case FR30_OPERAND_U8 : 1200 value = fields->f_u8; 1201 break; 1202 case FR30_OPERAND_UDISP6 : 1203 value = fields->f_udisp6; 1204 break; 1205 1206 default : 1207 /* xgettext:c-format */ 1208 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1209 opindex); 1210 abort (); 1211 } 1212 1213 return value; 1214 } 1215 1216 void fr30_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1217 void fr30_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1218 1219 /* Stuffing values in cgen_fields is handled by a collection of functions. 1220 They are distinguished by the type of the VALUE argument they accept. 1221 TODO: floating point, inlining support, remove cases where argument type 1222 not appropriate. */ 1223 1224 void 1225 fr30_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1226 int opindex, 1227 CGEN_FIELDS * fields, 1228 int value) 1229 { 1230 switch (opindex) 1231 { 1232 case FR30_OPERAND_CRI : 1233 fields->f_CRi = value; 1234 break; 1235 case FR30_OPERAND_CRJ : 1236 fields->f_CRj = value; 1237 break; 1238 case FR30_OPERAND_R13 : 1239 break; 1240 case FR30_OPERAND_R14 : 1241 break; 1242 case FR30_OPERAND_R15 : 1243 break; 1244 case FR30_OPERAND_RI : 1245 fields->f_Ri = value; 1246 break; 1247 case FR30_OPERAND_RIC : 1248 fields->f_Ric = value; 1249 break; 1250 case FR30_OPERAND_RJ : 1251 fields->f_Rj = value; 1252 break; 1253 case FR30_OPERAND_RJC : 1254 fields->f_Rjc = value; 1255 break; 1256 case FR30_OPERAND_RS1 : 1257 fields->f_Rs1 = value; 1258 break; 1259 case FR30_OPERAND_RS2 : 1260 fields->f_Rs2 = value; 1261 break; 1262 case FR30_OPERAND_CC : 1263 fields->f_cc = value; 1264 break; 1265 case FR30_OPERAND_CCC : 1266 fields->f_ccc = value; 1267 break; 1268 case FR30_OPERAND_DIR10 : 1269 fields->f_dir10 = value; 1270 break; 1271 case FR30_OPERAND_DIR8 : 1272 fields->f_dir8 = value; 1273 break; 1274 case FR30_OPERAND_DIR9 : 1275 fields->f_dir9 = value; 1276 break; 1277 case FR30_OPERAND_DISP10 : 1278 fields->f_disp10 = value; 1279 break; 1280 case FR30_OPERAND_DISP8 : 1281 fields->f_disp8 = value; 1282 break; 1283 case FR30_OPERAND_DISP9 : 1284 fields->f_disp9 = value; 1285 break; 1286 case FR30_OPERAND_I20 : 1287 fields->f_i20 = value; 1288 break; 1289 case FR30_OPERAND_I32 : 1290 fields->f_i32 = value; 1291 break; 1292 case FR30_OPERAND_I8 : 1293 fields->f_i8 = value; 1294 break; 1295 case FR30_OPERAND_LABEL12 : 1296 fields->f_rel12 = value; 1297 break; 1298 case FR30_OPERAND_LABEL9 : 1299 fields->f_rel9 = value; 1300 break; 1301 case FR30_OPERAND_M4 : 1302 fields->f_m4 = value; 1303 break; 1304 case FR30_OPERAND_PS : 1305 break; 1306 case FR30_OPERAND_REGLIST_HI_LD : 1307 fields->f_reglist_hi_ld = value; 1308 break; 1309 case FR30_OPERAND_REGLIST_HI_ST : 1310 fields->f_reglist_hi_st = value; 1311 break; 1312 case FR30_OPERAND_REGLIST_LOW_LD : 1313 fields->f_reglist_low_ld = value; 1314 break; 1315 case FR30_OPERAND_REGLIST_LOW_ST : 1316 fields->f_reglist_low_st = value; 1317 break; 1318 case FR30_OPERAND_S10 : 1319 fields->f_s10 = value; 1320 break; 1321 case FR30_OPERAND_U10 : 1322 fields->f_u10 = value; 1323 break; 1324 case FR30_OPERAND_U4 : 1325 fields->f_u4 = value; 1326 break; 1327 case FR30_OPERAND_U4C : 1328 fields->f_u4c = value; 1329 break; 1330 case FR30_OPERAND_U8 : 1331 fields->f_u8 = value; 1332 break; 1333 case FR30_OPERAND_UDISP6 : 1334 fields->f_udisp6 = value; 1335 break; 1336 1337 default : 1338 /* xgettext:c-format */ 1339 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1340 opindex); 1341 abort (); 1342 } 1343 } 1344 1345 void 1346 fr30_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1347 int opindex, 1348 CGEN_FIELDS * fields, 1349 bfd_vma value) 1350 { 1351 switch (opindex) 1352 { 1353 case FR30_OPERAND_CRI : 1354 fields->f_CRi = value; 1355 break; 1356 case FR30_OPERAND_CRJ : 1357 fields->f_CRj = value; 1358 break; 1359 case FR30_OPERAND_R13 : 1360 break; 1361 case FR30_OPERAND_R14 : 1362 break; 1363 case FR30_OPERAND_R15 : 1364 break; 1365 case FR30_OPERAND_RI : 1366 fields->f_Ri = value; 1367 break; 1368 case FR30_OPERAND_RIC : 1369 fields->f_Ric = value; 1370 break; 1371 case FR30_OPERAND_RJ : 1372 fields->f_Rj = value; 1373 break; 1374 case FR30_OPERAND_RJC : 1375 fields->f_Rjc = value; 1376 break; 1377 case FR30_OPERAND_RS1 : 1378 fields->f_Rs1 = value; 1379 break; 1380 case FR30_OPERAND_RS2 : 1381 fields->f_Rs2 = value; 1382 break; 1383 case FR30_OPERAND_CC : 1384 fields->f_cc = value; 1385 break; 1386 case FR30_OPERAND_CCC : 1387 fields->f_ccc = value; 1388 break; 1389 case FR30_OPERAND_DIR10 : 1390 fields->f_dir10 = value; 1391 break; 1392 case FR30_OPERAND_DIR8 : 1393 fields->f_dir8 = value; 1394 break; 1395 case FR30_OPERAND_DIR9 : 1396 fields->f_dir9 = value; 1397 break; 1398 case FR30_OPERAND_DISP10 : 1399 fields->f_disp10 = value; 1400 break; 1401 case FR30_OPERAND_DISP8 : 1402 fields->f_disp8 = value; 1403 break; 1404 case FR30_OPERAND_DISP9 : 1405 fields->f_disp9 = value; 1406 break; 1407 case FR30_OPERAND_I20 : 1408 fields->f_i20 = value; 1409 break; 1410 case FR30_OPERAND_I32 : 1411 fields->f_i32 = value; 1412 break; 1413 case FR30_OPERAND_I8 : 1414 fields->f_i8 = value; 1415 break; 1416 case FR30_OPERAND_LABEL12 : 1417 fields->f_rel12 = value; 1418 break; 1419 case FR30_OPERAND_LABEL9 : 1420 fields->f_rel9 = value; 1421 break; 1422 case FR30_OPERAND_M4 : 1423 fields->f_m4 = value; 1424 break; 1425 case FR30_OPERAND_PS : 1426 break; 1427 case FR30_OPERAND_REGLIST_HI_LD : 1428 fields->f_reglist_hi_ld = value; 1429 break; 1430 case FR30_OPERAND_REGLIST_HI_ST : 1431 fields->f_reglist_hi_st = value; 1432 break; 1433 case FR30_OPERAND_REGLIST_LOW_LD : 1434 fields->f_reglist_low_ld = value; 1435 break; 1436 case FR30_OPERAND_REGLIST_LOW_ST : 1437 fields->f_reglist_low_st = value; 1438 break; 1439 case FR30_OPERAND_S10 : 1440 fields->f_s10 = value; 1441 break; 1442 case FR30_OPERAND_U10 : 1443 fields->f_u10 = value; 1444 break; 1445 case FR30_OPERAND_U4 : 1446 fields->f_u4 = value; 1447 break; 1448 case FR30_OPERAND_U4C : 1449 fields->f_u4c = value; 1450 break; 1451 case FR30_OPERAND_U8 : 1452 fields->f_u8 = value; 1453 break; 1454 case FR30_OPERAND_UDISP6 : 1455 fields->f_udisp6 = value; 1456 break; 1457 1458 default : 1459 /* xgettext:c-format */ 1460 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1461 opindex); 1462 abort (); 1463 } 1464 } 1465 1466 /* Function to call before using the instruction builder tables. */ 1467 1468 void 1469 fr30_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1470 { 1471 cd->insert_handlers = & fr30_cgen_insert_handlers[0]; 1472 cd->extract_handlers = & fr30_cgen_extract_handlers[0]; 1473 1474 cd->insert_operand = fr30_cgen_insert_operand; 1475 cd->extract_operand = fr30_cgen_extract_operand; 1476 1477 cd->get_int_operand = fr30_cgen_get_int_operand; 1478 cd->set_int_operand = fr30_cgen_set_int_operand; 1479 cd->get_vma_operand = fr30_cgen_get_vma_operand; 1480 cd->set_vma_operand = fr30_cgen_set_vma_operand; 1481 } 1482
