1 /* Instruction building/extraction support for lm32. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2014 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "lm32-desc.h" 34 #include "lm32-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift; 212 213 if (CGEN_INSN_LSB0_P) 214 shift = (word_offset + start + 1) - length; 215 else 216 shift = total_length - (word_offset + start + length); 217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 218 } 219 220 #else /* ! CGEN_INT_INSN_P */ 221 222 { 223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 224 225 insert_1 (cd, value, start, length, word_length, bufp); 226 } 227 228 #endif /* ! CGEN_INT_INSN_P */ 229 230 return NULL; 231 } 232 233 /* Default insn builder (insert handler). 234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 236 recorded in host byte order, otherwise BUFFER is an array of bytes 237 and the value is recorded in target byte order). 238 The result is an error message or NULL if success. */ 239 240 static const char * 241 insert_insn_normal (CGEN_CPU_DESC cd, 242 const CGEN_INSN * insn, 243 CGEN_FIELDS * fields, 244 CGEN_INSN_BYTES_PTR buffer, 245 bfd_vma pc) 246 { 247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 248 unsigned long value; 249 const CGEN_SYNTAX_CHAR_TYPE * syn; 250 251 CGEN_INIT_INSERT (cd); 252 value = CGEN_INSN_BASE_VALUE (insn); 253 254 /* If we're recording insns as numbers (rather than a string of bytes), 255 target byte order handling is deferred until later. */ 256 257 #if CGEN_INT_INSN_P 258 259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 260 CGEN_FIELDS_BITSIZE (fields), value); 261 262 #else 263 264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 265 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 266 value); 267 268 #endif /* ! CGEN_INT_INSN_P */ 269 270 /* ??? It would be better to scan the format's fields. 271 Still need to be able to insert a value based on the operand though; 272 e.g. storing a branch displacement that got resolved later. 273 Needs more thought first. */ 274 275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 276 { 277 const char *errmsg; 278 279 if (CGEN_SYNTAX_CHAR_P (* syn)) 280 continue; 281 282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 283 fields, buffer, pc); 284 if (errmsg) 285 return errmsg; 286 } 287 288 return NULL; 289 } 290 291 #if CGEN_INT_INSN_P 292 /* Cover function to store an insn value into an integral insn. Must go here 293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 294 295 static void 296 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 297 CGEN_INSN_BYTES_PTR buf, 298 int length, 299 int insn_length, 300 CGEN_INSN_INT value) 301 { 302 /* For architectures with insns smaller than the base-insn-bitsize, 303 length may be too big. */ 304 if (length > insn_length) 305 *buf = value; 306 else 307 { 308 int shift = insn_length - length; 309 /* Written this way to avoid undefined behaviour. */ 310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 311 312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 313 } 314 } 315 #endif 316 317 /* Operand extraction. */ 319 320 #if ! CGEN_INT_INSN_P 321 322 /* Subroutine of extract_normal. 323 Ensure sufficient bytes are cached in EX_INFO. 324 OFFSET is the offset in bytes from the start of the insn of the value. 325 BYTES is the length of the needed value. 326 Returns 1 for success, 0 for failure. */ 327 328 static CGEN_INLINE int 329 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 330 CGEN_EXTRACT_INFO *ex_info, 331 int offset, 332 int bytes, 333 bfd_vma pc) 334 { 335 /* It's doubtful that the middle part has already been fetched so 336 we don't optimize that case. kiss. */ 337 unsigned int mask; 338 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 339 340 /* First do a quick check. */ 341 mask = (1 << bytes) - 1; 342 if (((ex_info->valid >> offset) & mask) == mask) 343 return 1; 344 345 /* Search for the first byte we need to read. */ 346 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 347 if (! (mask & ex_info->valid)) 348 break; 349 350 if (bytes) 351 { 352 int status; 353 354 pc += offset; 355 status = (*info->read_memory_func) 356 (pc, ex_info->insn_bytes + offset, bytes, info); 357 358 if (status != 0) 359 { 360 (*info->memory_error_func) (status, pc, info); 361 return 0; 362 } 363 364 ex_info->valid |= ((1 << bytes) - 1) << offset; 365 } 366 367 return 1; 368 } 369 370 /* Subroutine of extract_normal. */ 371 372 static CGEN_INLINE long 373 extract_1 (CGEN_CPU_DESC cd, 374 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 375 int start, 376 int length, 377 int word_length, 378 unsigned char *bufp, 379 bfd_vma pc ATTRIBUTE_UNUSED) 380 { 381 unsigned long x; 382 int shift; 383 384 x = cgen_get_insn_value (cd, bufp, word_length); 385 386 if (CGEN_INSN_LSB0_P) 387 shift = (start + 1) - length; 388 else 389 shift = (word_length - (start + length)); 390 return x >> shift; 391 } 392 393 #endif /* ! CGEN_INT_INSN_P */ 394 395 /* Default extraction routine. 396 397 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 398 or sometimes less for cases like the m32r where the base insn size is 32 399 but some insns are 16 bits. 400 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 401 but for generality we take a bitmask of all of them. 402 WORD_OFFSET is the offset in bits from the start of the insn of the value. 403 WORD_LENGTH is the length of the word in bits in which the value resides. 404 START is the starting bit number in the word, architecture origin. 405 LENGTH is the length of VALUE in bits. 406 TOTAL_LENGTH is the total length of the insn in bits. 407 408 Returns 1 for success, 0 for failure. */ 409 410 /* ??? The return code isn't properly used. wip. */ 411 412 /* ??? This doesn't handle bfd_vma's. Create another function when 413 necessary. */ 414 415 static int 416 extract_normal (CGEN_CPU_DESC cd, 417 #if ! CGEN_INT_INSN_P 418 CGEN_EXTRACT_INFO *ex_info, 419 #else 420 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 421 #endif 422 CGEN_INSN_INT insn_value, 423 unsigned int attrs, 424 unsigned int word_offset, 425 unsigned int start, 426 unsigned int length, 427 unsigned int word_length, 428 unsigned int total_length, 429 #if ! CGEN_INT_INSN_P 430 bfd_vma pc, 431 #else 432 bfd_vma pc ATTRIBUTE_UNUSED, 433 #endif 434 long *valuep) 435 { 436 long value, mask; 437 438 /* If LENGTH is zero, this operand doesn't contribute to the value 439 so give it a standard value of zero. */ 440 if (length == 0) 441 { 442 *valuep = 0; 443 return 1; 444 } 445 446 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 447 abort (); 448 449 /* For architectures with insns smaller than the insn-base-bitsize, 450 word_length may be too big. */ 451 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 452 { 453 if (word_offset + word_length > total_length) 454 word_length = total_length - word_offset; 455 } 456 457 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 458 459 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 460 { 461 if (CGEN_INSN_LSB0_P) 462 value = insn_value >> ((word_offset + start + 1) - length); 463 else 464 value = insn_value >> (total_length - ( word_offset + start + length)); 465 } 466 467 #if ! CGEN_INT_INSN_P 468 469 else 470 { 471 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 472 473 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 474 abort (); 475 476 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 477 return 0; 478 479 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 480 } 481 482 #endif /* ! CGEN_INT_INSN_P */ 483 484 /* Written this way to avoid undefined behaviour. */ 485 mask = (((1L << (length - 1)) - 1) << 1) | 1; 486 487 value &= mask; 488 /* sign extend? */ 489 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 490 && (value & (1L << (length - 1)))) 491 value |= ~mask; 492 493 *valuep = value; 494 495 return 1; 496 } 497 498 /* Default insn extractor. 499 500 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 501 The extracted fields are stored in FIELDS. 502 EX_INFO is used to handle reading variable length insns. 503 Return the length of the insn in bits, or 0 if no match, 504 or -1 if an error occurs fetching data (memory_error_func will have 505 been called). */ 506 507 static int 508 extract_insn_normal (CGEN_CPU_DESC cd, 509 const CGEN_INSN *insn, 510 CGEN_EXTRACT_INFO *ex_info, 511 CGEN_INSN_INT insn_value, 512 CGEN_FIELDS *fields, 513 bfd_vma pc) 514 { 515 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 516 const CGEN_SYNTAX_CHAR_TYPE *syn; 517 518 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 519 520 CGEN_INIT_EXTRACT (cd); 521 522 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 523 { 524 int length; 525 526 if (CGEN_SYNTAX_CHAR_P (*syn)) 527 continue; 528 529 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 530 ex_info, insn_value, fields, pc); 531 if (length <= 0) 532 return length; 533 } 534 535 /* We recognized and successfully extracted this insn. */ 536 return CGEN_INSN_BITSIZE (insn); 537 } 538 539 /* Machine generated code added here. */ 541 542 const char * lm32_cgen_insert_operand 543 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 544 545 /* Main entry point for operand insertion. 546 547 This function is basically just a big switch statement. Earlier versions 548 used tables to look up the function to use, but 549 - if the table contains both assembler and disassembler functions then 550 the disassembler contains much of the assembler and vice-versa, 551 - there's a lot of inlining possibilities as things grow, 552 - using a switch statement avoids the function call overhead. 553 554 This function could be moved into `parse_insn_normal', but keeping it 555 separate makes clear the interface between `parse_insn_normal' and each of 556 the handlers. It's also needed by GAS to insert operands that couldn't be 557 resolved during parsing. */ 558 559 const char * 560 lm32_cgen_insert_operand (CGEN_CPU_DESC cd, 561 int opindex, 562 CGEN_FIELDS * fields, 563 CGEN_INSN_BYTES_PTR buffer, 564 bfd_vma pc ATTRIBUTE_UNUSED) 565 { 566 const char * errmsg = NULL; 567 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 568 569 switch (opindex) 570 { 571 case LM32_OPERAND_BRANCH : 572 { 573 long value = fields->f_branch; 574 value = ((SI) (((value) - (pc))) >> (2)); 575 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer); 576 } 577 break; 578 case LM32_OPERAND_CALL : 579 { 580 long value = fields->f_call; 581 value = ((SI) (((value) - (pc))) >> (2)); 582 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer); 583 } 584 break; 585 case LM32_OPERAND_CSR : 586 errmsg = insert_normal (cd, fields->f_csr, 0, 0, 25, 5, 32, total_length, buffer); 587 break; 588 case LM32_OPERAND_EXCEPTION : 589 errmsg = insert_normal (cd, fields->f_exception, 0, 0, 25, 26, 32, total_length, buffer); 590 break; 591 case LM32_OPERAND_GOT16 : 592 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 593 break; 594 case LM32_OPERAND_GOTOFFHI16 : 595 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 596 break; 597 case LM32_OPERAND_GOTOFFLO16 : 598 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 599 break; 600 case LM32_OPERAND_GP16 : 601 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 602 break; 603 case LM32_OPERAND_HI16 : 604 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 605 break; 606 case LM32_OPERAND_IMM : 607 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 608 break; 609 case LM32_OPERAND_LO16 : 610 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 611 break; 612 case LM32_OPERAND_R0 : 613 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 25, 5, 32, total_length, buffer); 614 break; 615 case LM32_OPERAND_R1 : 616 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 20, 5, 32, total_length, buffer); 617 break; 618 case LM32_OPERAND_R2 : 619 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 15, 5, 32, total_length, buffer); 620 break; 621 case LM32_OPERAND_SHIFT : 622 errmsg = insert_normal (cd, fields->f_shift, 0, 0, 4, 5, 32, total_length, buffer); 623 break; 624 case LM32_OPERAND_UIMM : 625 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 626 break; 627 case LM32_OPERAND_USER : 628 errmsg = insert_normal (cd, fields->f_user, 0, 0, 10, 11, 32, total_length, buffer); 629 break; 630 631 default : 632 /* xgettext:c-format */ 633 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 634 opindex); 635 abort (); 636 } 637 638 return errmsg; 639 } 640 641 int lm32_cgen_extract_operand 642 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 643 644 /* Main entry point for operand extraction. 645 The result is <= 0 for error, >0 for success. 646 ??? Actual values aren't well defined right now. 647 648 This function is basically just a big switch statement. Earlier versions 649 used tables to look up the function to use, but 650 - if the table contains both assembler and disassembler functions then 651 the disassembler contains much of the assembler and vice-versa, 652 - there's a lot of inlining possibilities as things grow, 653 - using a switch statement avoids the function call overhead. 654 655 This function could be moved into `print_insn_normal', but keeping it 656 separate makes clear the interface between `print_insn_normal' and each of 657 the handlers. */ 658 659 int 660 lm32_cgen_extract_operand (CGEN_CPU_DESC cd, 661 int opindex, 662 CGEN_EXTRACT_INFO *ex_info, 663 CGEN_INSN_INT insn_value, 664 CGEN_FIELDS * fields, 665 bfd_vma pc) 666 { 667 /* Assume success (for those operands that are nops). */ 668 int length = 1; 669 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 670 671 switch (opindex) 672 { 673 case LM32_OPERAND_BRANCH : 674 { 675 long value; 676 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value); 677 value = ((pc) + (((SI) (((value) << (16))) >> (14)))); 678 fields->f_branch = value; 679 } 680 break; 681 case LM32_OPERAND_CALL : 682 { 683 long value; 684 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value); 685 value = ((pc) + (((SI) (((value) << (6))) >> (4)))); 686 fields->f_call = value; 687 } 688 break; 689 case LM32_OPERAND_CSR : 690 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_csr); 691 break; 692 case LM32_OPERAND_EXCEPTION : 693 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 26, 32, total_length, pc, & fields->f_exception); 694 break; 695 case LM32_OPERAND_GOT16 : 696 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 697 break; 698 case LM32_OPERAND_GOTOFFHI16 : 699 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 700 break; 701 case LM32_OPERAND_GOTOFFLO16 : 702 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 703 break; 704 case LM32_OPERAND_GP16 : 705 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 706 break; 707 case LM32_OPERAND_HI16 : 708 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 709 break; 710 case LM32_OPERAND_IMM : 711 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 712 break; 713 case LM32_OPERAND_LO16 : 714 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 715 break; 716 case LM32_OPERAND_R0 : 717 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r0); 718 break; 719 case LM32_OPERAND_R1 : 720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r1); 721 break; 722 case LM32_OPERAND_R2 : 723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r2); 724 break; 725 case LM32_OPERAND_SHIFT : 726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_shift); 727 break; 728 case LM32_OPERAND_UIMM : 729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 730 break; 731 case LM32_OPERAND_USER : 732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_user); 733 break; 734 735 default : 736 /* xgettext:c-format */ 737 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 738 opindex); 739 abort (); 740 } 741 742 return length; 743 } 744 745 cgen_insert_fn * const lm32_cgen_insert_handlers[] = 746 { 747 insert_insn_normal, 748 }; 749 750 cgen_extract_fn * const lm32_cgen_extract_handlers[] = 751 { 752 extract_insn_normal, 753 }; 754 755 int lm32_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 756 bfd_vma lm32_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 757 758 /* Getting values from cgen_fields is handled by a collection of functions. 759 They are distinguished by the type of the VALUE argument they return. 760 TODO: floating point, inlining support, remove cases where result type 761 not appropriate. */ 762 763 int 764 lm32_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 765 int opindex, 766 const CGEN_FIELDS * fields) 767 { 768 int value; 769 770 switch (opindex) 771 { 772 case LM32_OPERAND_BRANCH : 773 value = fields->f_branch; 774 break; 775 case LM32_OPERAND_CALL : 776 value = fields->f_call; 777 break; 778 case LM32_OPERAND_CSR : 779 value = fields->f_csr; 780 break; 781 case LM32_OPERAND_EXCEPTION : 782 value = fields->f_exception; 783 break; 784 case LM32_OPERAND_GOT16 : 785 value = fields->f_imm; 786 break; 787 case LM32_OPERAND_GOTOFFHI16 : 788 value = fields->f_imm; 789 break; 790 case LM32_OPERAND_GOTOFFLO16 : 791 value = fields->f_imm; 792 break; 793 case LM32_OPERAND_GP16 : 794 value = fields->f_imm; 795 break; 796 case LM32_OPERAND_HI16 : 797 value = fields->f_uimm; 798 break; 799 case LM32_OPERAND_IMM : 800 value = fields->f_imm; 801 break; 802 case LM32_OPERAND_LO16 : 803 value = fields->f_uimm; 804 break; 805 case LM32_OPERAND_R0 : 806 value = fields->f_r0; 807 break; 808 case LM32_OPERAND_R1 : 809 value = fields->f_r1; 810 break; 811 case LM32_OPERAND_R2 : 812 value = fields->f_r2; 813 break; 814 case LM32_OPERAND_SHIFT : 815 value = fields->f_shift; 816 break; 817 case LM32_OPERAND_UIMM : 818 value = fields->f_uimm; 819 break; 820 case LM32_OPERAND_USER : 821 value = fields->f_user; 822 break; 823 824 default : 825 /* xgettext:c-format */ 826 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 827 opindex); 828 abort (); 829 } 830 831 return value; 832 } 833 834 bfd_vma 835 lm32_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 836 int opindex, 837 const CGEN_FIELDS * fields) 838 { 839 bfd_vma value; 840 841 switch (opindex) 842 { 843 case LM32_OPERAND_BRANCH : 844 value = fields->f_branch; 845 break; 846 case LM32_OPERAND_CALL : 847 value = fields->f_call; 848 break; 849 case LM32_OPERAND_CSR : 850 value = fields->f_csr; 851 break; 852 case LM32_OPERAND_EXCEPTION : 853 value = fields->f_exception; 854 break; 855 case LM32_OPERAND_GOT16 : 856 value = fields->f_imm; 857 break; 858 case LM32_OPERAND_GOTOFFHI16 : 859 value = fields->f_imm; 860 break; 861 case LM32_OPERAND_GOTOFFLO16 : 862 value = fields->f_imm; 863 break; 864 case LM32_OPERAND_GP16 : 865 value = fields->f_imm; 866 break; 867 case LM32_OPERAND_HI16 : 868 value = fields->f_uimm; 869 break; 870 case LM32_OPERAND_IMM : 871 value = fields->f_imm; 872 break; 873 case LM32_OPERAND_LO16 : 874 value = fields->f_uimm; 875 break; 876 case LM32_OPERAND_R0 : 877 value = fields->f_r0; 878 break; 879 case LM32_OPERAND_R1 : 880 value = fields->f_r1; 881 break; 882 case LM32_OPERAND_R2 : 883 value = fields->f_r2; 884 break; 885 case LM32_OPERAND_SHIFT : 886 value = fields->f_shift; 887 break; 888 case LM32_OPERAND_UIMM : 889 value = fields->f_uimm; 890 break; 891 case LM32_OPERAND_USER : 892 value = fields->f_user; 893 break; 894 895 default : 896 /* xgettext:c-format */ 897 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 898 opindex); 899 abort (); 900 } 901 902 return value; 903 } 904 905 void lm32_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 906 void lm32_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 907 908 /* Stuffing values in cgen_fields is handled by a collection of functions. 909 They are distinguished by the type of the VALUE argument they accept. 910 TODO: floating point, inlining support, remove cases where argument type 911 not appropriate. */ 912 913 void 914 lm32_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 915 int opindex, 916 CGEN_FIELDS * fields, 917 int value) 918 { 919 switch (opindex) 920 { 921 case LM32_OPERAND_BRANCH : 922 fields->f_branch = value; 923 break; 924 case LM32_OPERAND_CALL : 925 fields->f_call = value; 926 break; 927 case LM32_OPERAND_CSR : 928 fields->f_csr = value; 929 break; 930 case LM32_OPERAND_EXCEPTION : 931 fields->f_exception = value; 932 break; 933 case LM32_OPERAND_GOT16 : 934 fields->f_imm = value; 935 break; 936 case LM32_OPERAND_GOTOFFHI16 : 937 fields->f_imm = value; 938 break; 939 case LM32_OPERAND_GOTOFFLO16 : 940 fields->f_imm = value; 941 break; 942 case LM32_OPERAND_GP16 : 943 fields->f_imm = value; 944 break; 945 case LM32_OPERAND_HI16 : 946 fields->f_uimm = value; 947 break; 948 case LM32_OPERAND_IMM : 949 fields->f_imm = value; 950 break; 951 case LM32_OPERAND_LO16 : 952 fields->f_uimm = value; 953 break; 954 case LM32_OPERAND_R0 : 955 fields->f_r0 = value; 956 break; 957 case LM32_OPERAND_R1 : 958 fields->f_r1 = value; 959 break; 960 case LM32_OPERAND_R2 : 961 fields->f_r2 = value; 962 break; 963 case LM32_OPERAND_SHIFT : 964 fields->f_shift = value; 965 break; 966 case LM32_OPERAND_UIMM : 967 fields->f_uimm = value; 968 break; 969 case LM32_OPERAND_USER : 970 fields->f_user = value; 971 break; 972 973 default : 974 /* xgettext:c-format */ 975 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 976 opindex); 977 abort (); 978 } 979 } 980 981 void 982 lm32_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 983 int opindex, 984 CGEN_FIELDS * fields, 985 bfd_vma value) 986 { 987 switch (opindex) 988 { 989 case LM32_OPERAND_BRANCH : 990 fields->f_branch = value; 991 break; 992 case LM32_OPERAND_CALL : 993 fields->f_call = value; 994 break; 995 case LM32_OPERAND_CSR : 996 fields->f_csr = value; 997 break; 998 case LM32_OPERAND_EXCEPTION : 999 fields->f_exception = value; 1000 break; 1001 case LM32_OPERAND_GOT16 : 1002 fields->f_imm = value; 1003 break; 1004 case LM32_OPERAND_GOTOFFHI16 : 1005 fields->f_imm = value; 1006 break; 1007 case LM32_OPERAND_GOTOFFLO16 : 1008 fields->f_imm = value; 1009 break; 1010 case LM32_OPERAND_GP16 : 1011 fields->f_imm = value; 1012 break; 1013 case LM32_OPERAND_HI16 : 1014 fields->f_uimm = value; 1015 break; 1016 case LM32_OPERAND_IMM : 1017 fields->f_imm = value; 1018 break; 1019 case LM32_OPERAND_LO16 : 1020 fields->f_uimm = value; 1021 break; 1022 case LM32_OPERAND_R0 : 1023 fields->f_r0 = value; 1024 break; 1025 case LM32_OPERAND_R1 : 1026 fields->f_r1 = value; 1027 break; 1028 case LM32_OPERAND_R2 : 1029 fields->f_r2 = value; 1030 break; 1031 case LM32_OPERAND_SHIFT : 1032 fields->f_shift = value; 1033 break; 1034 case LM32_OPERAND_UIMM : 1035 fields->f_uimm = value; 1036 break; 1037 case LM32_OPERAND_USER : 1038 fields->f_user = value; 1039 break; 1040 1041 default : 1042 /* xgettext:c-format */ 1043 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1044 opindex); 1045 abort (); 1046 } 1047 } 1048 1049 /* Function to call before using the instruction builder tables. */ 1050 1051 void 1052 lm32_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1053 { 1054 cd->insert_handlers = & lm32_cgen_insert_handlers[0]; 1055 cd->extract_handlers = & lm32_cgen_extract_handlers[0]; 1056 1057 cd->insert_operand = lm32_cgen_insert_operand; 1058 cd->extract_operand = lm32_cgen_extract_operand; 1059 1060 cd->get_int_operand = lm32_cgen_get_int_operand; 1061 cd->set_int_operand = lm32_cgen_set_int_operand; 1062 cd->get_vma_operand = lm32_cgen_get_vma_operand; 1063 cd->set_vma_operand = lm32_cgen_set_vma_operand; 1064 } 1065
