1 /* Instruction building/extraction support for m32c. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2014 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "m32c-desc.h" 34 #include "m32c-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift; 212 213 if (CGEN_INSN_LSB0_P) 214 shift = (word_offset + start + 1) - length; 215 else 216 shift = total_length - (word_offset + start + length); 217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 218 } 219 220 #else /* ! CGEN_INT_INSN_P */ 221 222 { 223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 224 225 insert_1 (cd, value, start, length, word_length, bufp); 226 } 227 228 #endif /* ! CGEN_INT_INSN_P */ 229 230 return NULL; 231 } 232 233 /* Default insn builder (insert handler). 234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 236 recorded in host byte order, otherwise BUFFER is an array of bytes 237 and the value is recorded in target byte order). 238 The result is an error message or NULL if success. */ 239 240 static const char * 241 insert_insn_normal (CGEN_CPU_DESC cd, 242 const CGEN_INSN * insn, 243 CGEN_FIELDS * fields, 244 CGEN_INSN_BYTES_PTR buffer, 245 bfd_vma pc) 246 { 247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 248 unsigned long value; 249 const CGEN_SYNTAX_CHAR_TYPE * syn; 250 251 CGEN_INIT_INSERT (cd); 252 value = CGEN_INSN_BASE_VALUE (insn); 253 254 /* If we're recording insns as numbers (rather than a string of bytes), 255 target byte order handling is deferred until later. */ 256 257 #if CGEN_INT_INSN_P 258 259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 260 CGEN_FIELDS_BITSIZE (fields), value); 261 262 #else 263 264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 265 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 266 value); 267 268 #endif /* ! CGEN_INT_INSN_P */ 269 270 /* ??? It would be better to scan the format's fields. 271 Still need to be able to insert a value based on the operand though; 272 e.g. storing a branch displacement that got resolved later. 273 Needs more thought first. */ 274 275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 276 { 277 const char *errmsg; 278 279 if (CGEN_SYNTAX_CHAR_P (* syn)) 280 continue; 281 282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 283 fields, buffer, pc); 284 if (errmsg) 285 return errmsg; 286 } 287 288 return NULL; 289 } 290 291 #if CGEN_INT_INSN_P 292 /* Cover function to store an insn value into an integral insn. Must go here 293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 294 295 static void 296 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 297 CGEN_INSN_BYTES_PTR buf, 298 int length, 299 int insn_length, 300 CGEN_INSN_INT value) 301 { 302 /* For architectures with insns smaller than the base-insn-bitsize, 303 length may be too big. */ 304 if (length > insn_length) 305 *buf = value; 306 else 307 { 308 int shift = insn_length - length; 309 /* Written this way to avoid undefined behaviour. */ 310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 311 312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 313 } 314 } 315 #endif 316 317 /* Operand extraction. */ 319 320 #if ! CGEN_INT_INSN_P 321 322 /* Subroutine of extract_normal. 323 Ensure sufficient bytes are cached in EX_INFO. 324 OFFSET is the offset in bytes from the start of the insn of the value. 325 BYTES is the length of the needed value. 326 Returns 1 for success, 0 for failure. */ 327 328 static CGEN_INLINE int 329 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 330 CGEN_EXTRACT_INFO *ex_info, 331 int offset, 332 int bytes, 333 bfd_vma pc) 334 { 335 /* It's doubtful that the middle part has already been fetched so 336 we don't optimize that case. kiss. */ 337 unsigned int mask; 338 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 339 340 /* First do a quick check. */ 341 mask = (1 << bytes) - 1; 342 if (((ex_info->valid >> offset) & mask) == mask) 343 return 1; 344 345 /* Search for the first byte we need to read. */ 346 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 347 if (! (mask & ex_info->valid)) 348 break; 349 350 if (bytes) 351 { 352 int status; 353 354 pc += offset; 355 status = (*info->read_memory_func) 356 (pc, ex_info->insn_bytes + offset, bytes, info); 357 358 if (status != 0) 359 { 360 (*info->memory_error_func) (status, pc, info); 361 return 0; 362 } 363 364 ex_info->valid |= ((1 << bytes) - 1) << offset; 365 } 366 367 return 1; 368 } 369 370 /* Subroutine of extract_normal. */ 371 372 static CGEN_INLINE long 373 extract_1 (CGEN_CPU_DESC cd, 374 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 375 int start, 376 int length, 377 int word_length, 378 unsigned char *bufp, 379 bfd_vma pc ATTRIBUTE_UNUSED) 380 { 381 unsigned long x; 382 int shift; 383 384 x = cgen_get_insn_value (cd, bufp, word_length); 385 386 if (CGEN_INSN_LSB0_P) 387 shift = (start + 1) - length; 388 else 389 shift = (word_length - (start + length)); 390 return x >> shift; 391 } 392 393 #endif /* ! CGEN_INT_INSN_P */ 394 395 /* Default extraction routine. 396 397 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 398 or sometimes less for cases like the m32r where the base insn size is 32 399 but some insns are 16 bits. 400 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 401 but for generality we take a bitmask of all of them. 402 WORD_OFFSET is the offset in bits from the start of the insn of the value. 403 WORD_LENGTH is the length of the word in bits in which the value resides. 404 START is the starting bit number in the word, architecture origin. 405 LENGTH is the length of VALUE in bits. 406 TOTAL_LENGTH is the total length of the insn in bits. 407 408 Returns 1 for success, 0 for failure. */ 409 410 /* ??? The return code isn't properly used. wip. */ 411 412 /* ??? This doesn't handle bfd_vma's. Create another function when 413 necessary. */ 414 415 static int 416 extract_normal (CGEN_CPU_DESC cd, 417 #if ! CGEN_INT_INSN_P 418 CGEN_EXTRACT_INFO *ex_info, 419 #else 420 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 421 #endif 422 CGEN_INSN_INT insn_value, 423 unsigned int attrs, 424 unsigned int word_offset, 425 unsigned int start, 426 unsigned int length, 427 unsigned int word_length, 428 unsigned int total_length, 429 #if ! CGEN_INT_INSN_P 430 bfd_vma pc, 431 #else 432 bfd_vma pc ATTRIBUTE_UNUSED, 433 #endif 434 long *valuep) 435 { 436 long value, mask; 437 438 /* If LENGTH is zero, this operand doesn't contribute to the value 439 so give it a standard value of zero. */ 440 if (length == 0) 441 { 442 *valuep = 0; 443 return 1; 444 } 445 446 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 447 abort (); 448 449 /* For architectures with insns smaller than the insn-base-bitsize, 450 word_length may be too big. */ 451 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 452 { 453 if (word_offset + word_length > total_length) 454 word_length = total_length - word_offset; 455 } 456 457 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 458 459 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 460 { 461 if (CGEN_INSN_LSB0_P) 462 value = insn_value >> ((word_offset + start + 1) - length); 463 else 464 value = insn_value >> (total_length - ( word_offset + start + length)); 465 } 466 467 #if ! CGEN_INT_INSN_P 468 469 else 470 { 471 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 472 473 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 474 abort (); 475 476 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 477 return 0; 478 479 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 480 } 481 482 #endif /* ! CGEN_INT_INSN_P */ 483 484 /* Written this way to avoid undefined behaviour. */ 485 mask = (((1L << (length - 1)) - 1) << 1) | 1; 486 487 value &= mask; 488 /* sign extend? */ 489 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 490 && (value & (1L << (length - 1)))) 491 value |= ~mask; 492 493 *valuep = value; 494 495 return 1; 496 } 497 498 /* Default insn extractor. 499 500 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 501 The extracted fields are stored in FIELDS. 502 EX_INFO is used to handle reading variable length insns. 503 Return the length of the insn in bits, or 0 if no match, 504 or -1 if an error occurs fetching data (memory_error_func will have 505 been called). */ 506 507 static int 508 extract_insn_normal (CGEN_CPU_DESC cd, 509 const CGEN_INSN *insn, 510 CGEN_EXTRACT_INFO *ex_info, 511 CGEN_INSN_INT insn_value, 512 CGEN_FIELDS *fields, 513 bfd_vma pc) 514 { 515 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 516 const CGEN_SYNTAX_CHAR_TYPE *syn; 517 518 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 519 520 CGEN_INIT_EXTRACT (cd); 521 522 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 523 { 524 int length; 525 526 if (CGEN_SYNTAX_CHAR_P (*syn)) 527 continue; 528 529 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 530 ex_info, insn_value, fields, pc); 531 if (length <= 0) 532 return length; 533 } 534 535 /* We recognized and successfully extracted this insn. */ 536 return CGEN_INSN_BITSIZE (insn); 537 } 538 539 /* Machine generated code added here. */ 541 542 const char * m32c_cgen_insert_operand 543 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 544 545 /* Main entry point for operand insertion. 546 547 This function is basically just a big switch statement. Earlier versions 548 used tables to look up the function to use, but 549 - if the table contains both assembler and disassembler functions then 550 the disassembler contains much of the assembler and vice-versa, 551 - there's a lot of inlining possibilities as things grow, 552 - using a switch statement avoids the function call overhead. 553 554 This function could be moved into `parse_insn_normal', but keeping it 555 separate makes clear the interface between `parse_insn_normal' and each of 556 the handlers. It's also needed by GAS to insert operands that couldn't be 557 resolved during parsing. */ 558 559 const char * 560 m32c_cgen_insert_operand (CGEN_CPU_DESC cd, 561 int opindex, 562 CGEN_FIELDS * fields, 563 CGEN_INSN_BYTES_PTR buffer, 564 bfd_vma pc ATTRIBUTE_UNUSED) 565 { 566 const char * errmsg = NULL; 567 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 568 569 switch (opindex) 570 { 571 case M32C_OPERAND_A0 : 572 break; 573 case M32C_OPERAND_A1 : 574 break; 575 case M32C_OPERAND_AN16_PUSH_S : 576 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); 577 break; 578 case M32C_OPERAND_BIT16AN : 579 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 580 break; 581 case M32C_OPERAND_BIT16RN : 582 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 583 break; 584 case M32C_OPERAND_BIT3_S : 585 { 586 { 587 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); 588 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); 589 } 590 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 591 if (errmsg) 592 break; 593 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 594 if (errmsg) 595 break; 596 } 597 break; 598 case M32C_OPERAND_BIT32ANPREFIXED : 599 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 600 break; 601 case M32C_OPERAND_BIT32ANUNPREFIXED : 602 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 603 break; 604 case M32C_OPERAND_BIT32RNPREFIXED : 605 { 606 long value = fields->f_dst32_rn_prefixed_QI; 607 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 608 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 609 } 610 break; 611 case M32C_OPERAND_BIT32RNUNPREFIXED : 612 { 613 long value = fields->f_dst32_rn_unprefixed_QI; 614 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 615 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 616 } 617 break; 618 case M32C_OPERAND_BITBASE16_16_S8 : 619 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 620 break; 621 case M32C_OPERAND_BITBASE16_16_U16 : 622 { 623 long value = fields->f_dsp_16_u16; 624 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 625 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 626 } 627 break; 628 case M32C_OPERAND_BITBASE16_16_U8 : 629 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 630 break; 631 case M32C_OPERAND_BITBASE16_8_U11_S : 632 { 633 { 634 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); 635 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); 636 } 637 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); 638 if (errmsg) 639 break; 640 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); 641 if (errmsg) 642 break; 643 } 644 break; 645 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 646 { 647 { 648 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); 649 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); 650 } 651 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 652 if (errmsg) 653 break; 654 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 655 if (errmsg) 656 break; 657 } 658 break; 659 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 660 { 661 { 662 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); 663 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); 664 } 665 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 666 if (errmsg) 667 break; 668 { 669 long value = fields->f_dsp_16_s16; 670 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 671 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 672 } 673 if (errmsg) 674 break; 675 } 676 break; 677 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 678 { 679 { 680 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7)); 681 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); 682 } 683 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 684 if (errmsg) 685 break; 686 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 687 if (errmsg) 688 break; 689 } 690 break; 691 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 692 { 693 { 694 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); 695 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); 696 } 697 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 698 if (errmsg) 699 break; 700 { 701 long value = fields->f_dsp_16_u16; 702 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 703 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 704 } 705 if (errmsg) 706 break; 707 } 708 break; 709 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 710 { 711 { 712 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); 713 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); 714 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); 715 } 716 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 717 if (errmsg) 718 break; 719 { 720 long value = fields->f_dsp_16_u16; 721 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 722 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 723 } 724 if (errmsg) 725 break; 726 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 727 if (errmsg) 728 break; 729 } 730 break; 731 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 732 { 733 { 734 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); 735 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); 736 } 737 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 738 if (errmsg) 739 break; 740 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 741 if (errmsg) 742 break; 743 } 744 break; 745 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 746 { 747 { 748 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); 749 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); 750 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); 751 } 752 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 753 if (errmsg) 754 break; 755 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 756 if (errmsg) 757 break; 758 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 759 if (errmsg) 760 break; 761 } 762 break; 763 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 764 { 765 { 766 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); 767 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); 768 } 769 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 770 if (errmsg) 771 break; 772 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 773 if (errmsg) 774 break; 775 } 776 break; 777 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 778 { 779 { 780 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); 781 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); 782 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); 783 } 784 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 785 if (errmsg) 786 break; 787 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 788 if (errmsg) 789 break; 790 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 791 if (errmsg) 792 break; 793 } 794 break; 795 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 796 { 797 { 798 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); 799 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); 800 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); 801 } 802 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 803 if (errmsg) 804 break; 805 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 806 if (errmsg) 807 break; 808 { 809 long value = fields->f_dsp_32_u16; 810 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 811 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 812 } 813 if (errmsg) 814 break; 815 } 816 break; 817 case M32C_OPERAND_BITNO16R : 818 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 819 break; 820 case M32C_OPERAND_BITNO32PREFIXED : 821 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 822 break; 823 case M32C_OPERAND_BITNO32UNPREFIXED : 824 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 825 break; 826 case M32C_OPERAND_DSP_10_U6 : 827 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer); 828 break; 829 case M32C_OPERAND_DSP_16_S16 : 830 { 831 long value = fields->f_dsp_16_s16; 832 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 833 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 834 } 835 break; 836 case M32C_OPERAND_DSP_16_S8 : 837 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 838 break; 839 case M32C_OPERAND_DSP_16_U16 : 840 { 841 long value = fields->f_dsp_16_u16; 842 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 843 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 844 } 845 break; 846 case M32C_OPERAND_DSP_16_U20 : 847 { 848 { 849 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); 850 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); 851 } 852 { 853 long value = fields->f_dsp_16_u16; 854 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 855 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 856 } 857 if (errmsg) 858 break; 859 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 860 if (errmsg) 861 break; 862 } 863 break; 864 case M32C_OPERAND_DSP_16_U24 : 865 { 866 { 867 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); 868 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); 869 } 870 { 871 long value = fields->f_dsp_16_u16; 872 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 873 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 874 } 875 if (errmsg) 876 break; 877 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 878 if (errmsg) 879 break; 880 } 881 break; 882 case M32C_OPERAND_DSP_16_U8 : 883 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 884 break; 885 case M32C_OPERAND_DSP_24_S16 : 886 { 887 { 888 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); 889 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); 890 } 891 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 892 if (errmsg) 893 break; 894 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 895 if (errmsg) 896 break; 897 } 898 break; 899 case M32C_OPERAND_DSP_24_S8 : 900 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 901 break; 902 case M32C_OPERAND_DSP_24_U16 : 903 { 904 { 905 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); 906 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255)); 907 } 908 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 909 if (errmsg) 910 break; 911 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 912 if (errmsg) 913 break; 914 } 915 break; 916 case M32C_OPERAND_DSP_24_U20 : 917 { 918 { 919 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); 920 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); 921 } 922 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 923 if (errmsg) 924 break; 925 { 926 long value = fields->f_dsp_32_u16; 927 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 928 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 929 } 930 if (errmsg) 931 break; 932 } 933 break; 934 case M32C_OPERAND_DSP_24_U24 : 935 { 936 { 937 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); 938 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); 939 } 940 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 941 if (errmsg) 942 break; 943 { 944 long value = fields->f_dsp_32_u16; 945 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 946 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 947 } 948 if (errmsg) 949 break; 950 } 951 break; 952 case M32C_OPERAND_DSP_24_U8 : 953 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 954 break; 955 case M32C_OPERAND_DSP_32_S16 : 956 { 957 long value = fields->f_dsp_32_s16; 958 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 959 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); 960 } 961 break; 962 case M32C_OPERAND_DSP_32_S8 : 963 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 964 break; 965 case M32C_OPERAND_DSP_32_U16 : 966 { 967 long value = fields->f_dsp_32_u16; 968 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 969 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 970 } 971 break; 972 case M32C_OPERAND_DSP_32_U20 : 973 { 974 long value = fields->f_dsp_32_u24; 975 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 976 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 977 } 978 break; 979 case M32C_OPERAND_DSP_32_U24 : 980 { 981 long value = fields->f_dsp_32_u24; 982 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 983 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 984 } 985 break; 986 case M32C_OPERAND_DSP_32_U8 : 987 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 988 break; 989 case M32C_OPERAND_DSP_40_S16 : 990 { 991 long value = fields->f_dsp_40_s16; 992 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 993 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); 994 } 995 break; 996 case M32C_OPERAND_DSP_40_S8 : 997 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); 998 break; 999 case M32C_OPERAND_DSP_40_U16 : 1000 { 1001 long value = fields->f_dsp_40_u16; 1002 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1003 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); 1004 } 1005 break; 1006 case M32C_OPERAND_DSP_40_U20 : 1007 { 1008 long value = fields->f_dsp_40_u20; 1009 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); 1010 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer); 1011 } 1012 break; 1013 case M32C_OPERAND_DSP_40_U24 : 1014 { 1015 long value = fields->f_dsp_40_u24; 1016 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1017 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); 1018 } 1019 break; 1020 case M32C_OPERAND_DSP_40_U8 : 1021 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); 1022 break; 1023 case M32C_OPERAND_DSP_48_S16 : 1024 { 1025 long value = fields->f_dsp_48_s16; 1026 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1027 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); 1028 } 1029 break; 1030 case M32C_OPERAND_DSP_48_S8 : 1031 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); 1032 break; 1033 case M32C_OPERAND_DSP_48_U16 : 1034 { 1035 long value = fields->f_dsp_48_u16; 1036 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1037 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1038 } 1039 break; 1040 case M32C_OPERAND_DSP_48_U20 : 1041 { 1042 { 1043 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15)); 1044 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535)); 1045 } 1046 { 1047 long value = fields->f_dsp_48_u16; 1048 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1049 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1050 } 1051 if (errmsg) 1052 break; 1053 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1054 if (errmsg) 1055 break; 1056 } 1057 break; 1058 case M32C_OPERAND_DSP_48_U24 : 1059 { 1060 { 1061 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255)); 1062 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); 1063 } 1064 { 1065 long value = fields->f_dsp_48_u16; 1066 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1067 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1068 } 1069 if (errmsg) 1070 break; 1071 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1072 if (errmsg) 1073 break; 1074 } 1075 break; 1076 case M32C_OPERAND_DSP_48_U8 : 1077 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); 1078 break; 1079 case M32C_OPERAND_DSP_8_S24 : 1080 { 1081 long value = fields->f_dsp_8_s24; 1082 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); 1083 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer); 1084 } 1085 break; 1086 case M32C_OPERAND_DSP_8_S8 : 1087 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); 1088 break; 1089 case M32C_OPERAND_DSP_8_U16 : 1090 { 1091 long value = fields->f_dsp_8_u16; 1092 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1093 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); 1094 } 1095 break; 1096 case M32C_OPERAND_DSP_8_U24 : 1097 { 1098 long value = fields->f_dsp_8_u24; 1099 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 1100 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer); 1101 } 1102 break; 1103 case M32C_OPERAND_DSP_8_U6 : 1104 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer); 1105 break; 1106 case M32C_OPERAND_DSP_8_U8 : 1107 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); 1108 break; 1109 case M32C_OPERAND_DST16AN : 1110 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1111 break; 1112 case M32C_OPERAND_DST16AN_S : 1113 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer); 1114 break; 1115 case M32C_OPERAND_DST16ANHI : 1116 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1117 break; 1118 case M32C_OPERAND_DST16ANQI : 1119 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1120 break; 1121 case M32C_OPERAND_DST16ANQI_S : 1122 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); 1123 break; 1124 case M32C_OPERAND_DST16ANSI : 1125 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1126 break; 1127 case M32C_OPERAND_DST16RNEXTQI : 1128 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer); 1129 break; 1130 case M32C_OPERAND_DST16RNHI : 1131 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1132 break; 1133 case M32C_OPERAND_DST16RNQI : 1134 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1135 break; 1136 case M32C_OPERAND_DST16RNQI_S : 1137 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); 1138 break; 1139 case M32C_OPERAND_DST16RNSI : 1140 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1141 break; 1142 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1143 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1144 break; 1145 case M32C_OPERAND_DST32ANPREFIXED : 1146 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1147 break; 1148 case M32C_OPERAND_DST32ANPREFIXEDHI : 1149 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1150 break; 1151 case M32C_OPERAND_DST32ANPREFIXEDQI : 1152 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1153 break; 1154 case M32C_OPERAND_DST32ANPREFIXEDSI : 1155 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1156 break; 1157 case M32C_OPERAND_DST32ANUNPREFIXED : 1158 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1159 break; 1160 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1161 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1162 break; 1163 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1164 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1165 break; 1166 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1167 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1168 break; 1169 case M32C_OPERAND_DST32R0HI_S : 1170 break; 1171 case M32C_OPERAND_DST32R0QI_S : 1172 break; 1173 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1174 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1175 break; 1176 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1177 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1178 break; 1179 case M32C_OPERAND_DST32RNPREFIXEDHI : 1180 { 1181 long value = fields->f_dst32_rn_prefixed_HI; 1182 value = ((((value) + (2))) % (4)); 1183 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1184 } 1185 break; 1186 case M32C_OPERAND_DST32RNPREFIXEDQI : 1187 { 1188 long value = fields->f_dst32_rn_prefixed_QI; 1189 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1190 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1191 } 1192 break; 1193 case M32C_OPERAND_DST32RNPREFIXEDSI : 1194 { 1195 long value = fields->f_dst32_rn_prefixed_SI; 1196 value = ((value) + (2)); 1197 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1198 } 1199 break; 1200 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1201 { 1202 long value = fields->f_dst32_rn_unprefixed_HI; 1203 value = ((((value) + (2))) % (4)); 1204 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1205 } 1206 break; 1207 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1208 { 1209 long value = fields->f_dst32_rn_unprefixed_QI; 1210 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1211 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1212 } 1213 break; 1214 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1215 { 1216 long value = fields->f_dst32_rn_unprefixed_SI; 1217 value = ((value) + (2)); 1218 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1219 } 1220 break; 1221 case M32C_OPERAND_G : 1222 break; 1223 case M32C_OPERAND_IMM_12_S4 : 1224 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1225 break; 1226 case M32C_OPERAND_IMM_12_S4N : 1227 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1228 break; 1229 case M32C_OPERAND_IMM_13_U3 : 1230 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); 1231 break; 1232 case M32C_OPERAND_IMM_16_HI : 1233 { 1234 long value = fields->f_dsp_16_s16; 1235 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1236 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 1237 } 1238 break; 1239 case M32C_OPERAND_IMM_16_QI : 1240 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 1241 break; 1242 case M32C_OPERAND_IMM_16_SI : 1243 { 1244 { 1245 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); 1246 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); 1247 } 1248 { 1249 long value = fields->f_dsp_16_u16; 1250 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1251 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 1252 } 1253 if (errmsg) 1254 break; 1255 { 1256 long value = fields->f_dsp_32_u16; 1257 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1258 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 1259 } 1260 if (errmsg) 1261 break; 1262 } 1263 break; 1264 case M32C_OPERAND_IMM_20_S4 : 1265 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); 1266 break; 1267 case M32C_OPERAND_IMM_24_HI : 1268 { 1269 { 1270 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); 1271 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); 1272 } 1273 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1274 if (errmsg) 1275 break; 1276 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1277 if (errmsg) 1278 break; 1279 } 1280 break; 1281 case M32C_OPERAND_IMM_24_QI : 1282 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 1283 break; 1284 case M32C_OPERAND_IMM_24_SI : 1285 { 1286 { 1287 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); 1288 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); 1289 } 1290 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1291 if (errmsg) 1292 break; 1293 { 1294 long value = fields->f_dsp_32_u24; 1295 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1296 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 1297 } 1298 if (errmsg) 1299 break; 1300 } 1301 break; 1302 case M32C_OPERAND_IMM_32_HI : 1303 { 1304 long value = fields->f_dsp_32_s16; 1305 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1306 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); 1307 } 1308 break; 1309 case M32C_OPERAND_IMM_32_QI : 1310 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 1311 break; 1312 case M32C_OPERAND_IMM_32_SI : 1313 { 1314 long value = fields->f_dsp_32_s32; 1315 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); 1316 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer); 1317 } 1318 break; 1319 case M32C_OPERAND_IMM_40_HI : 1320 { 1321 long value = fields->f_dsp_40_s16; 1322 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1323 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); 1324 } 1325 break; 1326 case M32C_OPERAND_IMM_40_QI : 1327 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); 1328 break; 1329 case M32C_OPERAND_IMM_40_SI : 1330 { 1331 { 1332 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255)); 1333 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); 1334 } 1335 { 1336 long value = fields->f_dsp_40_u24; 1337 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1338 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); 1339 } 1340 if (errmsg) 1341 break; 1342 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1343 if (errmsg) 1344 break; 1345 } 1346 break; 1347 case M32C_OPERAND_IMM_48_HI : 1348 { 1349 long value = fields->f_dsp_48_s16; 1350 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1351 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); 1352 } 1353 break; 1354 case M32C_OPERAND_IMM_48_QI : 1355 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); 1356 break; 1357 case M32C_OPERAND_IMM_48_SI : 1358 { 1359 { 1360 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); 1361 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); 1362 } 1363 { 1364 long value = fields->f_dsp_48_u16; 1365 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1366 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1367 } 1368 if (errmsg) 1369 break; 1370 { 1371 long value = fields->f_dsp_64_u16; 1372 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1373 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); 1374 } 1375 if (errmsg) 1376 break; 1377 } 1378 break; 1379 case M32C_OPERAND_IMM_56_HI : 1380 { 1381 { 1382 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); 1383 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255)); 1384 } 1385 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); 1386 if (errmsg) 1387 break; 1388 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1389 if (errmsg) 1390 break; 1391 } 1392 break; 1393 case M32C_OPERAND_IMM_56_QI : 1394 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer); 1395 break; 1396 case M32C_OPERAND_IMM_64_HI : 1397 { 1398 long value = fields->f_dsp_64_s16; 1399 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1400 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); 1401 } 1402 break; 1403 case M32C_OPERAND_IMM_8_HI : 1404 { 1405 long value = fields->f_dsp_8_s16; 1406 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1407 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer); 1408 } 1409 break; 1410 case M32C_OPERAND_IMM_8_QI : 1411 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); 1412 break; 1413 case M32C_OPERAND_IMM_8_S4 : 1414 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1415 break; 1416 case M32C_OPERAND_IMM_8_S4N : 1417 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1418 break; 1419 case M32C_OPERAND_IMM_SH_12_S4 : 1420 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1421 break; 1422 case M32C_OPERAND_IMM_SH_20_S4 : 1423 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); 1424 break; 1425 case M32C_OPERAND_IMM_SH_8_S4 : 1426 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1427 break; 1428 case M32C_OPERAND_IMM1_S : 1429 { 1430 long value = fields->f_imm1_S; 1431 value = ((value) - (1)); 1432 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer); 1433 } 1434 break; 1435 case M32C_OPERAND_IMM3_S : 1436 { 1437 { 1438 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); 1439 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); 1440 } 1441 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 1442 if (errmsg) 1443 break; 1444 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1445 if (errmsg) 1446 break; 1447 } 1448 break; 1449 case M32C_OPERAND_LAB_16_8 : 1450 { 1451 long value = fields->f_lab_16_8; 1452 value = ((value) - (((pc) + (2)))); 1453 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer); 1454 } 1455 break; 1456 case M32C_OPERAND_LAB_24_8 : 1457 { 1458 long value = fields->f_lab_24_8; 1459 value = ((value) - (((pc) + (2)))); 1460 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer); 1461 } 1462 break; 1463 case M32C_OPERAND_LAB_32_8 : 1464 { 1465 long value = fields->f_lab_32_8; 1466 value = ((value) - (((pc) + (2)))); 1467 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer); 1468 } 1469 break; 1470 case M32C_OPERAND_LAB_40_8 : 1471 { 1472 long value = fields->f_lab_40_8; 1473 value = ((value) - (((pc) + (2)))); 1474 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer); 1475 } 1476 break; 1477 case M32C_OPERAND_LAB_5_3 : 1478 { 1479 long value = fields->f_lab_5_3; 1480 value = ((value) - (((pc) + (2)))); 1481 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer); 1482 } 1483 break; 1484 case M32C_OPERAND_LAB_8_16 : 1485 { 1486 long value = fields->f_lab_8_16; 1487 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); 1488 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); 1489 } 1490 break; 1491 case M32C_OPERAND_LAB_8_24 : 1492 { 1493 long value = fields->f_lab_8_24; 1494 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 1495 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); 1496 } 1497 break; 1498 case M32C_OPERAND_LAB_8_8 : 1499 { 1500 long value = fields->f_lab_8_8; 1501 value = ((value) - (((pc) + (1)))); 1502 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer); 1503 } 1504 break; 1505 case M32C_OPERAND_LAB32_JMP_S : 1506 { 1507 { 1508 SI tmp_val; 1509 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2)); 1510 FLD (f_7_1) = ((tmp_val) & (1)); 1511 FLD (f_2_2) = ((USI) (tmp_val) >> (1)); 1512 } 1513 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 1514 if (errmsg) 1515 break; 1516 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1517 if (errmsg) 1518 break; 1519 } 1520 break; 1521 case M32C_OPERAND_Q : 1522 break; 1523 case M32C_OPERAND_R0 : 1524 break; 1525 case M32C_OPERAND_R0H : 1526 break; 1527 case M32C_OPERAND_R0L : 1528 break; 1529 case M32C_OPERAND_R1 : 1530 break; 1531 case M32C_OPERAND_R1R2R0 : 1532 break; 1533 case M32C_OPERAND_R2 : 1534 break; 1535 case M32C_OPERAND_R2R0 : 1536 break; 1537 case M32C_OPERAND_R3 : 1538 break; 1539 case M32C_OPERAND_R3R1 : 1540 break; 1541 case M32C_OPERAND_REGSETPOP : 1542 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); 1543 break; 1544 case M32C_OPERAND_REGSETPUSH : 1545 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); 1546 break; 1547 case M32C_OPERAND_RN16_PUSH_S : 1548 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); 1549 break; 1550 case M32C_OPERAND_S : 1551 break; 1552 case M32C_OPERAND_SRC16AN : 1553 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1554 break; 1555 case M32C_OPERAND_SRC16ANHI : 1556 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1557 break; 1558 case M32C_OPERAND_SRC16ANQI : 1559 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1560 break; 1561 case M32C_OPERAND_SRC16RNHI : 1562 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); 1563 break; 1564 case M32C_OPERAND_SRC16RNQI : 1565 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); 1566 break; 1567 case M32C_OPERAND_SRC32ANPREFIXED : 1568 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1569 break; 1570 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1571 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1572 break; 1573 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1574 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1575 break; 1576 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1577 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1578 break; 1579 case M32C_OPERAND_SRC32ANUNPREFIXED : 1580 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1581 break; 1582 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1583 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1584 break; 1585 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1586 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1587 break; 1588 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1589 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1590 break; 1591 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1592 { 1593 long value = fields->f_src32_rn_prefixed_HI; 1594 value = ((((value) + (2))) % (4)); 1595 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1596 } 1597 break; 1598 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1599 { 1600 long value = fields->f_src32_rn_prefixed_QI; 1601 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1602 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1603 } 1604 break; 1605 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1606 { 1607 long value = fields->f_src32_rn_prefixed_SI; 1608 value = ((value) + (2)); 1609 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1610 } 1611 break; 1612 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1613 { 1614 long value = fields->f_src32_rn_unprefixed_HI; 1615 value = ((((value) + (2))) % (4)); 1616 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1617 } 1618 break; 1619 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1620 { 1621 long value = fields->f_src32_rn_unprefixed_QI; 1622 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1623 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1624 } 1625 break; 1626 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1627 { 1628 long value = fields->f_src32_rn_unprefixed_SI; 1629 value = ((value) + (2)); 1630 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1631 } 1632 break; 1633 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1634 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer); 1635 break; 1636 case M32C_OPERAND_X : 1637 break; 1638 case M32C_OPERAND_Z : 1639 break; 1640 case M32C_OPERAND_COND16_16 : 1641 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 1642 break; 1643 case M32C_OPERAND_COND16_24 : 1644 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1645 break; 1646 case M32C_OPERAND_COND16_32 : 1647 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1648 break; 1649 case M32C_OPERAND_COND16C : 1650 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1651 break; 1652 case M32C_OPERAND_COND16J : 1653 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1654 break; 1655 case M32C_OPERAND_COND16J5 : 1656 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer); 1657 break; 1658 case M32C_OPERAND_COND32 : 1659 { 1660 { 1661 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1)); 1662 FLD (f_13_3) = ((FLD (f_cond32)) & (7)); 1663 } 1664 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); 1665 if (errmsg) 1666 break; 1667 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1668 if (errmsg) 1669 break; 1670 } 1671 break; 1672 case M32C_OPERAND_COND32_16 : 1673 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 1674 break; 1675 case M32C_OPERAND_COND32_24 : 1676 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1677 break; 1678 case M32C_OPERAND_COND32_32 : 1679 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1680 break; 1681 case M32C_OPERAND_COND32_40 : 1682 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); 1683 break; 1684 case M32C_OPERAND_COND32J : 1685 { 1686 { 1687 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7)); 1688 FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); 1689 } 1690 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); 1691 if (errmsg) 1692 break; 1693 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1694 if (errmsg) 1695 break; 1696 } 1697 break; 1698 case M32C_OPERAND_CR1_PREFIXED_32 : 1699 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); 1700 break; 1701 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1702 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1703 break; 1704 case M32C_OPERAND_CR16 : 1705 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); 1706 break; 1707 case M32C_OPERAND_CR2_32 : 1708 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1709 break; 1710 case M32C_OPERAND_CR3_PREFIXED_32 : 1711 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); 1712 break; 1713 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1714 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1715 break; 1716 case M32C_OPERAND_FLAGS16 : 1717 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); 1718 break; 1719 case M32C_OPERAND_FLAGS32 : 1720 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1721 break; 1722 case M32C_OPERAND_SCCOND32 : 1723 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1724 break; 1725 case M32C_OPERAND_SIZE : 1726 break; 1727 1728 default : 1729 /* xgettext:c-format */ 1730 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 1731 opindex); 1732 abort (); 1733 } 1734 1735 return errmsg; 1736 } 1737 1738 int m32c_cgen_extract_operand 1739 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 1740 1741 /* Main entry point for operand extraction. 1742 The result is <= 0 for error, >0 for success. 1743 ??? Actual values aren't well defined right now. 1744 1745 This function is basically just a big switch statement. Earlier versions 1746 used tables to look up the function to use, but 1747 - if the table contains both assembler and disassembler functions then 1748 the disassembler contains much of the assembler and vice-versa, 1749 - there's a lot of inlining possibilities as things grow, 1750 - using a switch statement avoids the function call overhead. 1751 1752 This function could be moved into `print_insn_normal', but keeping it 1753 separate makes clear the interface between `print_insn_normal' and each of 1754 the handlers. */ 1755 1756 int 1757 m32c_cgen_extract_operand (CGEN_CPU_DESC cd, 1758 int opindex, 1759 CGEN_EXTRACT_INFO *ex_info, 1760 CGEN_INSN_INT insn_value, 1761 CGEN_FIELDS * fields, 1762 bfd_vma pc) 1763 { 1764 /* Assume success (for those operands that are nops). */ 1765 int length = 1; 1766 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 1767 1768 switch (opindex) 1769 { 1770 case M32C_OPERAND_A0 : 1771 break; 1772 case M32C_OPERAND_A1 : 1773 break; 1774 case M32C_OPERAND_AN16_PUSH_S : 1775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); 1776 break; 1777 case M32C_OPERAND_BIT16AN : 1778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 1779 break; 1780 case M32C_OPERAND_BIT16RN : 1781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 1782 break; 1783 case M32C_OPERAND_BIT3_S : 1784 { 1785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 1786 if (length <= 0) break; 1787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 1788 if (length <= 0) break; 1789 { 1790 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); 1791 } 1792 } 1793 break; 1794 case M32C_OPERAND_BIT32ANPREFIXED : 1795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 1796 break; 1797 case M32C_OPERAND_BIT32ANUNPREFIXED : 1798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 1799 break; 1800 case M32C_OPERAND_BIT32RNPREFIXED : 1801 { 1802 long value; 1803 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 1804 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 1805 fields->f_dst32_rn_prefixed_QI = value; 1806 } 1807 break; 1808 case M32C_OPERAND_BIT32RNUNPREFIXED : 1809 { 1810 long value; 1811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 1812 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 1813 fields->f_dst32_rn_unprefixed_QI = value; 1814 } 1815 break; 1816 case M32C_OPERAND_BITBASE16_16_S8 : 1817 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 1818 break; 1819 case M32C_OPERAND_BITBASE16_16_U16 : 1820 { 1821 long value; 1822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1823 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1824 fields->f_dsp_16_u16 = value; 1825 } 1826 break; 1827 case M32C_OPERAND_BITBASE16_16_U8 : 1828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1829 break; 1830 case M32C_OPERAND_BITBASE16_8_U11_S : 1831 { 1832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S); 1833 if (length <= 0) break; 1834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); 1835 if (length <= 0) break; 1836 { 1837 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S))); 1838 } 1839 } 1840 break; 1841 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1842 { 1843 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1844 if (length <= 0) break; 1845 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 1846 if (length <= 0) break; 1847 { 1848 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed))); 1849 } 1850 } 1851 break; 1852 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1853 { 1854 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1855 if (length <= 0) break; 1856 { 1857 long value; 1858 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 1859 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1860 fields->f_dsp_16_s16 = value; 1861 } 1862 if (length <= 0) break; 1863 { 1864 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed))); 1865 } 1866 } 1867 break; 1868 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1869 { 1870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1871 if (length <= 0) break; 1872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1873 if (length <= 0) break; 1874 { 1875 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed))); 1876 } 1877 } 1878 break; 1879 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1880 { 1881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1882 if (length <= 0) break; 1883 { 1884 long value; 1885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1886 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1887 fields->f_dsp_16_u16 = value; 1888 } 1889 if (length <= 0) break; 1890 { 1891 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed))); 1892 } 1893 } 1894 break; 1895 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1896 { 1897 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1898 if (length <= 0) break; 1899 { 1900 long value; 1901 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1902 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1903 fields->f_dsp_16_u16 = value; 1904 } 1905 if (length <= 0) break; 1906 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 1907 if (length <= 0) break; 1908 { 1909 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed))))); 1910 } 1911 } 1912 break; 1913 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1914 { 1915 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1916 if (length <= 0) break; 1917 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 1918 if (length <= 0) break; 1919 { 1920 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed))); 1921 } 1922 } 1923 break; 1924 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1925 { 1926 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1927 if (length <= 0) break; 1928 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1929 if (length <= 0) break; 1930 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 1931 if (length <= 0) break; 1932 { 1933 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed))))); 1934 } 1935 } 1936 break; 1937 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1938 { 1939 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1940 if (length <= 0) break; 1941 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1942 if (length <= 0) break; 1943 { 1944 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed))); 1945 } 1946 } 1947 break; 1948 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1949 { 1950 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1951 if (length <= 0) break; 1952 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1953 if (length <= 0) break; 1954 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 1955 if (length <= 0) break; 1956 { 1957 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed))))); 1958 } 1959 } 1960 break; 1961 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1962 { 1963 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1964 if (length <= 0) break; 1965 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1966 if (length <= 0) break; 1967 { 1968 long value; 1969 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 1970 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1971 fields->f_dsp_32_u16 = value; 1972 } 1973 if (length <= 0) break; 1974 { 1975 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed))))); 1976 } 1977 } 1978 break; 1979 case M32C_OPERAND_BITNO16R : 1980 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1981 break; 1982 case M32C_OPERAND_BITNO32PREFIXED : 1983 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1984 break; 1985 case M32C_OPERAND_BITNO32UNPREFIXED : 1986 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1987 break; 1988 case M32C_OPERAND_DSP_10_U6 : 1989 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6); 1990 break; 1991 case M32C_OPERAND_DSP_16_S16 : 1992 { 1993 long value; 1994 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 1995 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1996 fields->f_dsp_16_s16 = value; 1997 } 1998 break; 1999 case M32C_OPERAND_DSP_16_S8 : 2000 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 2001 break; 2002 case M32C_OPERAND_DSP_16_U16 : 2003 { 2004 long value; 2005 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2006 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2007 fields->f_dsp_16_u16 = value; 2008 } 2009 break; 2010 case M32C_OPERAND_DSP_16_U20 : 2011 { 2012 { 2013 long value; 2014 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2015 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2016 fields->f_dsp_16_u16 = value; 2017 } 2018 if (length <= 0) break; 2019 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2020 if (length <= 0) break; 2021 { 2022 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); 2023 } 2024 } 2025 break; 2026 case M32C_OPERAND_DSP_16_U24 : 2027 { 2028 { 2029 long value; 2030 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2031 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2032 fields->f_dsp_16_u16 = value; 2033 } 2034 if (length <= 0) break; 2035 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2036 if (length <= 0) break; 2037 { 2038 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); 2039 } 2040 } 2041 break; 2042 case M32C_OPERAND_DSP_16_U8 : 2043 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2044 break; 2045 case M32C_OPERAND_DSP_24_S16 : 2046 { 2047 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2048 if (length <= 0) break; 2049 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2050 if (length <= 0) break; 2051 { 2052 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); 2053 } 2054 } 2055 break; 2056 case M32C_OPERAND_DSP_24_S8 : 2057 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 2058 break; 2059 case M32C_OPERAND_DSP_24_U16 : 2060 { 2061 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2062 if (length <= 0) break; 2063 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2064 if (length <= 0) break; 2065 { 2066 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))); 2067 } 2068 } 2069 break; 2070 case M32C_OPERAND_DSP_24_U20 : 2071 { 2072 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2073 if (length <= 0) break; 2074 { 2075 long value; 2076 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2077 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2078 fields->f_dsp_32_u16 = value; 2079 } 2080 if (length <= 0) break; 2081 { 2082 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); 2083 } 2084 } 2085 break; 2086 case M32C_OPERAND_DSP_24_U24 : 2087 { 2088 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2089 if (length <= 0) break; 2090 { 2091 long value; 2092 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2093 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2094 fields->f_dsp_32_u16 = value; 2095 } 2096 if (length <= 0) break; 2097 { 2098 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); 2099 } 2100 } 2101 break; 2102 case M32C_OPERAND_DSP_24_U8 : 2103 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2104 break; 2105 case M32C_OPERAND_DSP_32_S16 : 2106 { 2107 long value; 2108 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); 2109 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2110 fields->f_dsp_32_s16 = value; 2111 } 2112 break; 2113 case M32C_OPERAND_DSP_32_S8 : 2114 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 2115 break; 2116 case M32C_OPERAND_DSP_32_U16 : 2117 { 2118 long value; 2119 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2120 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2121 fields->f_dsp_32_u16 = value; 2122 } 2123 break; 2124 case M32C_OPERAND_DSP_32_U20 : 2125 { 2126 long value; 2127 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2128 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2129 fields->f_dsp_32_u24 = value; 2130 } 2131 break; 2132 case M32C_OPERAND_DSP_32_U24 : 2133 { 2134 long value; 2135 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2136 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2137 fields->f_dsp_32_u24 = value; 2138 } 2139 break; 2140 case M32C_OPERAND_DSP_32_U8 : 2141 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2142 break; 2143 case M32C_OPERAND_DSP_40_S16 : 2144 { 2145 long value; 2146 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); 2147 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2148 fields->f_dsp_40_s16 = value; 2149 } 2150 break; 2151 case M32C_OPERAND_DSP_40_S8 : 2152 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); 2153 break; 2154 case M32C_OPERAND_DSP_40_U16 : 2155 { 2156 long value; 2157 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); 2158 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2159 fields->f_dsp_40_u16 = value; 2160 } 2161 break; 2162 case M32C_OPERAND_DSP_40_U20 : 2163 { 2164 long value; 2165 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value); 2166 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); 2167 fields->f_dsp_40_u20 = value; 2168 } 2169 break; 2170 case M32C_OPERAND_DSP_40_U24 : 2171 { 2172 long value; 2173 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); 2174 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2175 fields->f_dsp_40_u24 = value; 2176 } 2177 break; 2178 case M32C_OPERAND_DSP_40_U8 : 2179 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); 2180 break; 2181 case M32C_OPERAND_DSP_48_S16 : 2182 { 2183 long value; 2184 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); 2185 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2186 fields->f_dsp_48_s16 = value; 2187 } 2188 break; 2189 case M32C_OPERAND_DSP_48_S8 : 2190 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); 2191 break; 2192 case M32C_OPERAND_DSP_48_U16 : 2193 { 2194 long value; 2195 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2196 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2197 fields->f_dsp_48_u16 = value; 2198 } 2199 break; 2200 case M32C_OPERAND_DSP_48_U20 : 2201 { 2202 { 2203 long value; 2204 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2205 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2206 fields->f_dsp_48_u16 = value; 2207 } 2208 if (length <= 0) break; 2209 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2210 if (length <= 0) break; 2211 { 2212 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040)))); 2213 } 2214 } 2215 break; 2216 case M32C_OPERAND_DSP_48_U24 : 2217 { 2218 { 2219 long value; 2220 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2221 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2222 fields->f_dsp_48_u16 = value; 2223 } 2224 if (length <= 0) break; 2225 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2226 if (length <= 0) break; 2227 { 2228 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680)))); 2229 } 2230 } 2231 break; 2232 case M32C_OPERAND_DSP_48_U8 : 2233 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8); 2234 break; 2235 case M32C_OPERAND_DSP_8_S24 : 2236 { 2237 long value; 2238 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value); 2239 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); 2240 fields->f_dsp_8_s24 = value; 2241 } 2242 break; 2243 case M32C_OPERAND_DSP_8_S8 : 2244 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); 2245 break; 2246 case M32C_OPERAND_DSP_8_U16 : 2247 { 2248 long value; 2249 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); 2250 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2251 fields->f_dsp_8_u16 = value; 2252 } 2253 break; 2254 case M32C_OPERAND_DSP_8_U24 : 2255 { 2256 long value; 2257 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); 2258 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 2259 fields->f_dsp_8_u24 = value; 2260 } 2261 break; 2262 case M32C_OPERAND_DSP_8_U6 : 2263 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6); 2264 break; 2265 case M32C_OPERAND_DSP_8_U8 : 2266 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); 2267 break; 2268 case M32C_OPERAND_DST16AN : 2269 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2270 break; 2271 case M32C_OPERAND_DST16AN_S : 2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s); 2273 break; 2274 case M32C_OPERAND_DST16ANHI : 2275 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2276 break; 2277 case M32C_OPERAND_DST16ANQI : 2278 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2279 break; 2280 case M32C_OPERAND_DST16ANQI_S : 2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); 2282 break; 2283 case M32C_OPERAND_DST16ANSI : 2284 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2285 break; 2286 case M32C_OPERAND_DST16RNEXTQI : 2287 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext); 2288 break; 2289 case M32C_OPERAND_DST16RNHI : 2290 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2291 break; 2292 case M32C_OPERAND_DST16RNQI : 2293 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2294 break; 2295 case M32C_OPERAND_DST16RNQI_S : 2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); 2297 break; 2298 case M32C_OPERAND_DST16RNSI : 2299 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2300 break; 2301 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 2302 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2303 break; 2304 case M32C_OPERAND_DST32ANPREFIXED : 2305 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2306 break; 2307 case M32C_OPERAND_DST32ANPREFIXEDHI : 2308 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2309 break; 2310 case M32C_OPERAND_DST32ANPREFIXEDQI : 2311 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2312 break; 2313 case M32C_OPERAND_DST32ANPREFIXEDSI : 2314 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2315 break; 2316 case M32C_OPERAND_DST32ANUNPREFIXED : 2317 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2318 break; 2319 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 2320 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2321 break; 2322 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 2323 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2324 break; 2325 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 2326 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2327 break; 2328 case M32C_OPERAND_DST32R0HI_S : 2329 break; 2330 case M32C_OPERAND_DST32R0QI_S : 2331 break; 2332 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 2333 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); 2334 break; 2335 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 2336 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); 2337 break; 2338 case M32C_OPERAND_DST32RNPREFIXEDHI : 2339 { 2340 long value; 2341 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2342 value = ((((value) + (2))) % (4)); 2343 fields->f_dst32_rn_prefixed_HI = value; 2344 } 2345 break; 2346 case M32C_OPERAND_DST32RNPREFIXEDQI : 2347 { 2348 long value; 2349 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2350 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2351 fields->f_dst32_rn_prefixed_QI = value; 2352 } 2353 break; 2354 case M32C_OPERAND_DST32RNPREFIXEDSI : 2355 { 2356 long value; 2357 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2358 value = ((value) - (2)); 2359 fields->f_dst32_rn_prefixed_SI = value; 2360 } 2361 break; 2362 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 2363 { 2364 long value; 2365 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2366 value = ((((value) + (2))) % (4)); 2367 fields->f_dst32_rn_unprefixed_HI = value; 2368 } 2369 break; 2370 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 2371 { 2372 long value; 2373 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2374 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2375 fields->f_dst32_rn_unprefixed_QI = value; 2376 } 2377 break; 2378 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 2379 { 2380 long value; 2381 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2382 value = ((value) - (2)); 2383 fields->f_dst32_rn_unprefixed_SI = value; 2384 } 2385 break; 2386 case M32C_OPERAND_G : 2387 break; 2388 case M32C_OPERAND_IMM_12_S4 : 2389 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2390 break; 2391 case M32C_OPERAND_IMM_12_S4N : 2392 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2393 break; 2394 case M32C_OPERAND_IMM_13_U3 : 2395 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); 2396 break; 2397 case M32C_OPERAND_IMM_16_HI : 2398 { 2399 long value; 2400 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 2401 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2402 fields->f_dsp_16_s16 = value; 2403 } 2404 break; 2405 case M32C_OPERAND_IMM_16_QI : 2406 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 2407 break; 2408 case M32C_OPERAND_IMM_16_SI : 2409 { 2410 { 2411 long value; 2412 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2413 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2414 fields->f_dsp_16_u16 = value; 2415 } 2416 if (length <= 0) break; 2417 { 2418 long value; 2419 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2420 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2421 fields->f_dsp_32_u16 = value; 2422 } 2423 if (length <= 0) break; 2424 { 2425 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000)))); 2426 } 2427 } 2428 break; 2429 case M32C_OPERAND_IMM_20_S4 : 2430 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); 2431 break; 2432 case M32C_OPERAND_IMM_24_HI : 2433 { 2434 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2435 if (length <= 0) break; 2436 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2437 if (length <= 0) break; 2438 { 2439 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); 2440 } 2441 } 2442 break; 2443 case M32C_OPERAND_IMM_24_QI : 2444 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 2445 break; 2446 case M32C_OPERAND_IMM_24_SI : 2447 { 2448 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2449 if (length <= 0) break; 2450 { 2451 long value; 2452 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2453 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2454 fields->f_dsp_32_u24 = value; 2455 } 2456 if (length <= 0) break; 2457 { 2458 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00)))); 2459 } 2460 } 2461 break; 2462 case M32C_OPERAND_IMM_32_HI : 2463 { 2464 long value; 2465 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); 2466 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2467 fields->f_dsp_32_s16 = value; 2468 } 2469 break; 2470 case M32C_OPERAND_IMM_32_QI : 2471 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 2472 break; 2473 case M32C_OPERAND_IMM_32_SI : 2474 { 2475 long value; 2476 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value); 2477 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); 2478 fields->f_dsp_32_s32 = value; 2479 } 2480 break; 2481 case M32C_OPERAND_IMM_40_HI : 2482 { 2483 long value; 2484 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); 2485 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2486 fields->f_dsp_40_s16 = value; 2487 } 2488 break; 2489 case M32C_OPERAND_IMM_40_QI : 2490 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); 2491 break; 2492 case M32C_OPERAND_IMM_40_SI : 2493 { 2494 { 2495 long value; 2496 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); 2497 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2498 fields->f_dsp_40_u24 = value; 2499 } 2500 if (length <= 0) break; 2501 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2502 if (length <= 0) break; 2503 { 2504 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000)))); 2505 } 2506 } 2507 break; 2508 case M32C_OPERAND_IMM_48_HI : 2509 { 2510 long value; 2511 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); 2512 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2513 fields->f_dsp_48_s16 = value; 2514 } 2515 break; 2516 case M32C_OPERAND_IMM_48_QI : 2517 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); 2518 break; 2519 case M32C_OPERAND_IMM_48_SI : 2520 { 2521 { 2522 long value; 2523 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2524 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2525 fields->f_dsp_48_u16 = value; 2526 } 2527 if (length <= 0) break; 2528 { 2529 long value; 2530 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); 2531 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2532 fields->f_dsp_64_u16 = value; 2533 } 2534 if (length <= 0) break; 2535 { 2536 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000)))); 2537 } 2538 } 2539 break; 2540 case M32C_OPERAND_IMM_56_HI : 2541 { 2542 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8); 2543 if (length <= 0) break; 2544 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2545 if (length <= 0) break; 2546 { 2547 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8)))))); 2548 } 2549 } 2550 break; 2551 case M32C_OPERAND_IMM_56_QI : 2552 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8); 2553 break; 2554 case M32C_OPERAND_IMM_64_HI : 2555 { 2556 long value; 2557 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); 2558 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2559 fields->f_dsp_64_s16 = value; 2560 } 2561 break; 2562 case M32C_OPERAND_IMM_8_HI : 2563 { 2564 long value; 2565 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value); 2566 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2567 fields->f_dsp_8_s16 = value; 2568 } 2569 break; 2570 case M32C_OPERAND_IMM_8_QI : 2571 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); 2572 break; 2573 case M32C_OPERAND_IMM_8_S4 : 2574 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2575 break; 2576 case M32C_OPERAND_IMM_8_S4N : 2577 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2578 break; 2579 case M32C_OPERAND_IMM_SH_12_S4 : 2580 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2581 break; 2582 case M32C_OPERAND_IMM_SH_20_S4 : 2583 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); 2584 break; 2585 case M32C_OPERAND_IMM_SH_8_S4 : 2586 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2587 break; 2588 case M32C_OPERAND_IMM1_S : 2589 { 2590 long value; 2591 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); 2592 value = ((value) + (1)); 2593 fields->f_imm1_S = value; 2594 } 2595 break; 2596 case M32C_OPERAND_IMM3_S : 2597 { 2598 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 2599 if (length <= 0) break; 2600 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2601 if (length <= 0) break; 2602 { 2603 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); 2604 } 2605 } 2606 break; 2607 case M32C_OPERAND_LAB_16_8 : 2608 { 2609 long value; 2610 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value); 2611 value = ((value) + (((pc) + (2)))); 2612 fields->f_lab_16_8 = value; 2613 } 2614 break; 2615 case M32C_OPERAND_LAB_24_8 : 2616 { 2617 long value; 2618 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value); 2619 value = ((value) + (((pc) + (2)))); 2620 fields->f_lab_24_8 = value; 2621 } 2622 break; 2623 case M32C_OPERAND_LAB_32_8 : 2624 { 2625 long value; 2626 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value); 2627 value = ((value) + (((pc) + (2)))); 2628 fields->f_lab_32_8 = value; 2629 } 2630 break; 2631 case M32C_OPERAND_LAB_40_8 : 2632 { 2633 long value; 2634 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value); 2635 value = ((value) + (((pc) + (2)))); 2636 fields->f_lab_40_8 = value; 2637 } 2638 break; 2639 case M32C_OPERAND_LAB_5_3 : 2640 { 2641 long value; 2642 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value); 2643 value = ((value) + (((pc) + (2)))); 2644 fields->f_lab_5_3 = value; 2645 } 2646 break; 2647 case M32C_OPERAND_LAB_8_16 : 2648 { 2649 long value; 2650 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); 2651 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); 2652 fields->f_lab_8_16 = value; 2653 } 2654 break; 2655 case M32C_OPERAND_LAB_8_24 : 2656 { 2657 long value; 2658 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value); 2659 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 2660 fields->f_lab_8_24 = value; 2661 } 2662 break; 2663 case M32C_OPERAND_LAB_8_8 : 2664 { 2665 long value; 2666 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); 2667 value = ((value) + (((pc) + (1)))); 2668 fields->f_lab_8_8 = value; 2669 } 2670 break; 2671 case M32C_OPERAND_LAB32_JMP_S : 2672 { 2673 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 2674 if (length <= 0) break; 2675 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2676 if (length <= 0) break; 2677 { 2678 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2)))); 2679 } 2680 } 2681 break; 2682 case M32C_OPERAND_Q : 2683 break; 2684 case M32C_OPERAND_R0 : 2685 break; 2686 case M32C_OPERAND_R0H : 2687 break; 2688 case M32C_OPERAND_R0L : 2689 break; 2690 case M32C_OPERAND_R1 : 2691 break; 2692 case M32C_OPERAND_R1R2R0 : 2693 break; 2694 case M32C_OPERAND_R2 : 2695 break; 2696 case M32C_OPERAND_R2R0 : 2697 break; 2698 case M32C_OPERAND_R3 : 2699 break; 2700 case M32C_OPERAND_R3R1 : 2701 break; 2702 case M32C_OPERAND_REGSETPOP : 2703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); 2704 break; 2705 case M32C_OPERAND_REGSETPUSH : 2706 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); 2707 break; 2708 case M32C_OPERAND_RN16_PUSH_S : 2709 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); 2710 break; 2711 case M32C_OPERAND_S : 2712 break; 2713 case M32C_OPERAND_SRC16AN : 2714 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2715 break; 2716 case M32C_OPERAND_SRC16ANHI : 2717 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2718 break; 2719 case M32C_OPERAND_SRC16ANQI : 2720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2721 break; 2722 case M32C_OPERAND_SRC16RNHI : 2723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); 2724 break; 2725 case M32C_OPERAND_SRC16RNQI : 2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); 2727 break; 2728 case M32C_OPERAND_SRC32ANPREFIXED : 2729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2730 break; 2731 case M32C_OPERAND_SRC32ANPREFIXEDHI : 2732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2733 break; 2734 case M32C_OPERAND_SRC32ANPREFIXEDQI : 2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2736 break; 2737 case M32C_OPERAND_SRC32ANPREFIXEDSI : 2738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2739 break; 2740 case M32C_OPERAND_SRC32ANUNPREFIXED : 2741 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2742 break; 2743 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 2744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2745 break; 2746 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 2747 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2748 break; 2749 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 2750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2751 break; 2752 case M32C_OPERAND_SRC32RNPREFIXEDHI : 2753 { 2754 long value; 2755 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2756 value = ((((value) + (2))) % (4)); 2757 fields->f_src32_rn_prefixed_HI = value; 2758 } 2759 break; 2760 case M32C_OPERAND_SRC32RNPREFIXEDQI : 2761 { 2762 long value; 2763 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2764 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2765 fields->f_src32_rn_prefixed_QI = value; 2766 } 2767 break; 2768 case M32C_OPERAND_SRC32RNPREFIXEDSI : 2769 { 2770 long value; 2771 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2772 value = ((value) - (2)); 2773 fields->f_src32_rn_prefixed_SI = value; 2774 } 2775 break; 2776 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 2777 { 2778 long value; 2779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2780 value = ((((value) + (2))) % (4)); 2781 fields->f_src32_rn_unprefixed_HI = value; 2782 } 2783 break; 2784 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 2785 { 2786 long value; 2787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2788 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2789 fields->f_src32_rn_unprefixed_QI = value; 2790 } 2791 break; 2792 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 2793 { 2794 long value; 2795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2796 value = ((value) - (2)); 2797 fields->f_src32_rn_unprefixed_SI = value; 2798 } 2799 break; 2800 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 2801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1); 2802 break; 2803 case M32C_OPERAND_X : 2804 break; 2805 case M32C_OPERAND_Z : 2806 break; 2807 case M32C_OPERAND_COND16_16 : 2808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2809 break; 2810 case M32C_OPERAND_COND16_24 : 2811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2812 break; 2813 case M32C_OPERAND_COND16_32 : 2814 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2815 break; 2816 case M32C_OPERAND_COND16C : 2817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2818 break; 2819 case M32C_OPERAND_COND16J : 2820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2821 break; 2822 case M32C_OPERAND_COND16J5 : 2823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5); 2824 break; 2825 case M32C_OPERAND_COND32 : 2826 { 2827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1); 2828 if (length <= 0) break; 2829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2830 if (length <= 0) break; 2831 { 2832 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3))); 2833 } 2834 } 2835 break; 2836 case M32C_OPERAND_COND32_16 : 2837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2838 break; 2839 case M32C_OPERAND_COND32_24 : 2840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2841 break; 2842 case M32C_OPERAND_COND32_32 : 2843 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2844 break; 2845 case M32C_OPERAND_COND32_40 : 2846 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); 2847 break; 2848 case M32C_OPERAND_COND32J : 2849 { 2850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3); 2851 if (length <= 0) break; 2852 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2853 if (length <= 0) break; 2854 { 2855 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1))); 2856 } 2857 } 2858 break; 2859 case M32C_OPERAND_CR1_PREFIXED_32 : 2860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); 2861 break; 2862 case M32C_OPERAND_CR1_UNPREFIXED_32 : 2863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2864 break; 2865 case M32C_OPERAND_CR16 : 2866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); 2867 break; 2868 case M32C_OPERAND_CR2_32 : 2869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2870 break; 2871 case M32C_OPERAND_CR3_PREFIXED_32 : 2872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); 2873 break; 2874 case M32C_OPERAND_CR3_UNPREFIXED_32 : 2875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2876 break; 2877 case M32C_OPERAND_FLAGS16 : 2878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); 2879 break; 2880 case M32C_OPERAND_FLAGS32 : 2881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2882 break; 2883 case M32C_OPERAND_SCCOND32 : 2884 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2885 break; 2886 case M32C_OPERAND_SIZE : 2887 break; 2888 2889 default : 2890 /* xgettext:c-format */ 2891 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 2892 opindex); 2893 abort (); 2894 } 2895 2896 return length; 2897 } 2898 2899 cgen_insert_fn * const m32c_cgen_insert_handlers[] = 2900 { 2901 insert_insn_normal, 2902 }; 2903 2904 cgen_extract_fn * const m32c_cgen_extract_handlers[] = 2905 { 2906 extract_insn_normal, 2907 }; 2908 2909 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 2910 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 2911 2912 /* Getting values from cgen_fields is handled by a collection of functions. 2913 They are distinguished by the type of the VALUE argument they return. 2914 TODO: floating point, inlining support, remove cases where result type 2915 not appropriate. */ 2916 2917 int 2918 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 2919 int opindex, 2920 const CGEN_FIELDS * fields) 2921 { 2922 int value; 2923 2924 switch (opindex) 2925 { 2926 case M32C_OPERAND_A0 : 2927 value = 0; 2928 break; 2929 case M32C_OPERAND_A1 : 2930 value = 0; 2931 break; 2932 case M32C_OPERAND_AN16_PUSH_S : 2933 value = fields->f_4_1; 2934 break; 2935 case M32C_OPERAND_BIT16AN : 2936 value = fields->f_dst16_an; 2937 break; 2938 case M32C_OPERAND_BIT16RN : 2939 value = fields->f_dst16_rn; 2940 break; 2941 case M32C_OPERAND_BIT3_S : 2942 value = fields->f_imm3_S; 2943 break; 2944 case M32C_OPERAND_BIT32ANPREFIXED : 2945 value = fields->f_dst32_an_prefixed; 2946 break; 2947 case M32C_OPERAND_BIT32ANUNPREFIXED : 2948 value = fields->f_dst32_an_unprefixed; 2949 break; 2950 case M32C_OPERAND_BIT32RNPREFIXED : 2951 value = fields->f_dst32_rn_prefixed_QI; 2952 break; 2953 case M32C_OPERAND_BIT32RNUNPREFIXED : 2954 value = fields->f_dst32_rn_unprefixed_QI; 2955 break; 2956 case M32C_OPERAND_BITBASE16_16_S8 : 2957 value = fields->f_dsp_16_s8; 2958 break; 2959 case M32C_OPERAND_BITBASE16_16_U16 : 2960 value = fields->f_dsp_16_u16; 2961 break; 2962 case M32C_OPERAND_BITBASE16_16_U8 : 2963 value = fields->f_dsp_16_u8; 2964 break; 2965 case M32C_OPERAND_BITBASE16_8_U11_S : 2966 value = fields->f_bitbase16_u11_S; 2967 break; 2968 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 2969 value = fields->f_bitbase32_16_s11_unprefixed; 2970 break; 2971 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 2972 value = fields->f_bitbase32_16_s19_unprefixed; 2973 break; 2974 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 2975 value = fields->f_bitbase32_16_u11_unprefixed; 2976 break; 2977 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 2978 value = fields->f_bitbase32_16_u19_unprefixed; 2979 break; 2980 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 2981 value = fields->f_bitbase32_16_u27_unprefixed; 2982 break; 2983 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 2984 value = fields->f_bitbase32_24_s11_prefixed; 2985 break; 2986 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 2987 value = fields->f_bitbase32_24_s19_prefixed; 2988 break; 2989 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 2990 value = fields->f_bitbase32_24_u11_prefixed; 2991 break; 2992 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 2993 value = fields->f_bitbase32_24_u19_prefixed; 2994 break; 2995 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 2996 value = fields->f_bitbase32_24_u27_prefixed; 2997 break; 2998 case M32C_OPERAND_BITNO16R : 2999 value = fields->f_dsp_16_u8; 3000 break; 3001 case M32C_OPERAND_BITNO32PREFIXED : 3002 value = fields->f_bitno32_prefixed; 3003 break; 3004 case M32C_OPERAND_BITNO32UNPREFIXED : 3005 value = fields->f_bitno32_unprefixed; 3006 break; 3007 case M32C_OPERAND_DSP_10_U6 : 3008 value = fields->f_dsp_10_u6; 3009 break; 3010 case M32C_OPERAND_DSP_16_S16 : 3011 value = fields->f_dsp_16_s16; 3012 break; 3013 case M32C_OPERAND_DSP_16_S8 : 3014 value = fields->f_dsp_16_s8; 3015 break; 3016 case M32C_OPERAND_DSP_16_U16 : 3017 value = fields->f_dsp_16_u16; 3018 break; 3019 case M32C_OPERAND_DSP_16_U20 : 3020 value = fields->f_dsp_16_u24; 3021 break; 3022 case M32C_OPERAND_DSP_16_U24 : 3023 value = fields->f_dsp_16_u24; 3024 break; 3025 case M32C_OPERAND_DSP_16_U8 : 3026 value = fields->f_dsp_16_u8; 3027 break; 3028 case M32C_OPERAND_DSP_24_S16 : 3029 value = fields->f_dsp_24_s16; 3030 break; 3031 case M32C_OPERAND_DSP_24_S8 : 3032 value = fields->f_dsp_24_s8; 3033 break; 3034 case M32C_OPERAND_DSP_24_U16 : 3035 value = fields->f_dsp_24_u16; 3036 break; 3037 case M32C_OPERAND_DSP_24_U20 : 3038 value = fields->f_dsp_24_u24; 3039 break; 3040 case M32C_OPERAND_DSP_24_U24 : 3041 value = fields->f_dsp_24_u24; 3042 break; 3043 case M32C_OPERAND_DSP_24_U8 : 3044 value = fields->f_dsp_24_u8; 3045 break; 3046 case M32C_OPERAND_DSP_32_S16 : 3047 value = fields->f_dsp_32_s16; 3048 break; 3049 case M32C_OPERAND_DSP_32_S8 : 3050 value = fields->f_dsp_32_s8; 3051 break; 3052 case M32C_OPERAND_DSP_32_U16 : 3053 value = fields->f_dsp_32_u16; 3054 break; 3055 case M32C_OPERAND_DSP_32_U20 : 3056 value = fields->f_dsp_32_u24; 3057 break; 3058 case M32C_OPERAND_DSP_32_U24 : 3059 value = fields->f_dsp_32_u24; 3060 break; 3061 case M32C_OPERAND_DSP_32_U8 : 3062 value = fields->f_dsp_32_u8; 3063 break; 3064 case M32C_OPERAND_DSP_40_S16 : 3065 value = fields->f_dsp_40_s16; 3066 break; 3067 case M32C_OPERAND_DSP_40_S8 : 3068 value = fields->f_dsp_40_s8; 3069 break; 3070 case M32C_OPERAND_DSP_40_U16 : 3071 value = fields->f_dsp_40_u16; 3072 break; 3073 case M32C_OPERAND_DSP_40_U20 : 3074 value = fields->f_dsp_40_u20; 3075 break; 3076 case M32C_OPERAND_DSP_40_U24 : 3077 value = fields->f_dsp_40_u24; 3078 break; 3079 case M32C_OPERAND_DSP_40_U8 : 3080 value = fields->f_dsp_40_u8; 3081 break; 3082 case M32C_OPERAND_DSP_48_S16 : 3083 value = fields->f_dsp_48_s16; 3084 break; 3085 case M32C_OPERAND_DSP_48_S8 : 3086 value = fields->f_dsp_48_s8; 3087 break; 3088 case M32C_OPERAND_DSP_48_U16 : 3089 value = fields->f_dsp_48_u16; 3090 break; 3091 case M32C_OPERAND_DSP_48_U20 : 3092 value = fields->f_dsp_48_u20; 3093 break; 3094 case M32C_OPERAND_DSP_48_U24 : 3095 value = fields->f_dsp_48_u24; 3096 break; 3097 case M32C_OPERAND_DSP_48_U8 : 3098 value = fields->f_dsp_48_u8; 3099 break; 3100 case M32C_OPERAND_DSP_8_S24 : 3101 value = fields->f_dsp_8_s24; 3102 break; 3103 case M32C_OPERAND_DSP_8_S8 : 3104 value = fields->f_dsp_8_s8; 3105 break; 3106 case M32C_OPERAND_DSP_8_U16 : 3107 value = fields->f_dsp_8_u16; 3108 break; 3109 case M32C_OPERAND_DSP_8_U24 : 3110 value = fields->f_dsp_8_u24; 3111 break; 3112 case M32C_OPERAND_DSP_8_U6 : 3113 value = fields->f_dsp_8_u6; 3114 break; 3115 case M32C_OPERAND_DSP_8_U8 : 3116 value = fields->f_dsp_8_u8; 3117 break; 3118 case M32C_OPERAND_DST16AN : 3119 value = fields->f_dst16_an; 3120 break; 3121 case M32C_OPERAND_DST16AN_S : 3122 value = fields->f_dst16_an_s; 3123 break; 3124 case M32C_OPERAND_DST16ANHI : 3125 value = fields->f_dst16_an; 3126 break; 3127 case M32C_OPERAND_DST16ANQI : 3128 value = fields->f_dst16_an; 3129 break; 3130 case M32C_OPERAND_DST16ANQI_S : 3131 value = fields->f_dst16_rn_QI_s; 3132 break; 3133 case M32C_OPERAND_DST16ANSI : 3134 value = fields->f_dst16_an; 3135 break; 3136 case M32C_OPERAND_DST16RNEXTQI : 3137 value = fields->f_dst16_rn_ext; 3138 break; 3139 case M32C_OPERAND_DST16RNHI : 3140 value = fields->f_dst16_rn; 3141 break; 3142 case M32C_OPERAND_DST16RNQI : 3143 value = fields->f_dst16_rn; 3144 break; 3145 case M32C_OPERAND_DST16RNQI_S : 3146 value = fields->f_dst16_rn_QI_s; 3147 break; 3148 case M32C_OPERAND_DST16RNSI : 3149 value = fields->f_dst16_rn; 3150 break; 3151 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 3152 value = fields->f_dst32_an_unprefixed; 3153 break; 3154 case M32C_OPERAND_DST32ANPREFIXED : 3155 value = fields->f_dst32_an_prefixed; 3156 break; 3157 case M32C_OPERAND_DST32ANPREFIXEDHI : 3158 value = fields->f_dst32_an_prefixed; 3159 break; 3160 case M32C_OPERAND_DST32ANPREFIXEDQI : 3161 value = fields->f_dst32_an_prefixed; 3162 break; 3163 case M32C_OPERAND_DST32ANPREFIXEDSI : 3164 value = fields->f_dst32_an_prefixed; 3165 break; 3166 case M32C_OPERAND_DST32ANUNPREFIXED : 3167 value = fields->f_dst32_an_unprefixed; 3168 break; 3169 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 3170 value = fields->f_dst32_an_unprefixed; 3171 break; 3172 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 3173 value = fields->f_dst32_an_unprefixed; 3174 break; 3175 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 3176 value = fields->f_dst32_an_unprefixed; 3177 break; 3178 case M32C_OPERAND_DST32R0HI_S : 3179 value = 0; 3180 break; 3181 case M32C_OPERAND_DST32R0QI_S : 3182 value = 0; 3183 break; 3184 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 3185 value = fields->f_dst32_rn_ext_unprefixed; 3186 break; 3187 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 3188 value = fields->f_dst32_rn_ext_unprefixed; 3189 break; 3190 case M32C_OPERAND_DST32RNPREFIXEDHI : 3191 value = fields->f_dst32_rn_prefixed_HI; 3192 break; 3193 case M32C_OPERAND_DST32RNPREFIXEDQI : 3194 value = fields->f_dst32_rn_prefixed_QI; 3195 break; 3196 case M32C_OPERAND_DST32RNPREFIXEDSI : 3197 value = fields->f_dst32_rn_prefixed_SI; 3198 break; 3199 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 3200 value = fields->f_dst32_rn_unprefixed_HI; 3201 break; 3202 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 3203 value = fields->f_dst32_rn_unprefixed_QI; 3204 break; 3205 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 3206 value = fields->f_dst32_rn_unprefixed_SI; 3207 break; 3208 case M32C_OPERAND_G : 3209 value = 0; 3210 break; 3211 case M32C_OPERAND_IMM_12_S4 : 3212 value = fields->f_imm_12_s4; 3213 break; 3214 case M32C_OPERAND_IMM_12_S4N : 3215 value = fields->f_imm_12_s4; 3216 break; 3217 case M32C_OPERAND_IMM_13_U3 : 3218 value = fields->f_imm_13_u3; 3219 break; 3220 case M32C_OPERAND_IMM_16_HI : 3221 value = fields->f_dsp_16_s16; 3222 break; 3223 case M32C_OPERAND_IMM_16_QI : 3224 value = fields->f_dsp_16_s8; 3225 break; 3226 case M32C_OPERAND_IMM_16_SI : 3227 value = fields->f_dsp_16_s32; 3228 break; 3229 case M32C_OPERAND_IMM_20_S4 : 3230 value = fields->f_imm_20_s4; 3231 break; 3232 case M32C_OPERAND_IMM_24_HI : 3233 value = fields->f_dsp_24_s16; 3234 break; 3235 case M32C_OPERAND_IMM_24_QI : 3236 value = fields->f_dsp_24_s8; 3237 break; 3238 case M32C_OPERAND_IMM_24_SI : 3239 value = fields->f_dsp_24_s32; 3240 break; 3241 case M32C_OPERAND_IMM_32_HI : 3242 value = fields->f_dsp_32_s16; 3243 break; 3244 case M32C_OPERAND_IMM_32_QI : 3245 value = fields->f_dsp_32_s8; 3246 break; 3247 case M32C_OPERAND_IMM_32_SI : 3248 value = fields->f_dsp_32_s32; 3249 break; 3250 case M32C_OPERAND_IMM_40_HI : 3251 value = fields->f_dsp_40_s16; 3252 break; 3253 case M32C_OPERAND_IMM_40_QI : 3254 value = fields->f_dsp_40_s8; 3255 break; 3256 case M32C_OPERAND_IMM_40_SI : 3257 value = fields->f_dsp_40_s32; 3258 break; 3259 case M32C_OPERAND_IMM_48_HI : 3260 value = fields->f_dsp_48_s16; 3261 break; 3262 case M32C_OPERAND_IMM_48_QI : 3263 value = fields->f_dsp_48_s8; 3264 break; 3265 case M32C_OPERAND_IMM_48_SI : 3266 value = fields->f_dsp_48_s32; 3267 break; 3268 case M32C_OPERAND_IMM_56_HI : 3269 value = fields->f_dsp_56_s16; 3270 break; 3271 case M32C_OPERAND_IMM_56_QI : 3272 value = fields->f_dsp_56_s8; 3273 break; 3274 case M32C_OPERAND_IMM_64_HI : 3275 value = fields->f_dsp_64_s16; 3276 break; 3277 case M32C_OPERAND_IMM_8_HI : 3278 value = fields->f_dsp_8_s16; 3279 break; 3280 case M32C_OPERAND_IMM_8_QI : 3281 value = fields->f_dsp_8_s8; 3282 break; 3283 case M32C_OPERAND_IMM_8_S4 : 3284 value = fields->f_imm_8_s4; 3285 break; 3286 case M32C_OPERAND_IMM_8_S4N : 3287 value = fields->f_imm_8_s4; 3288 break; 3289 case M32C_OPERAND_IMM_SH_12_S4 : 3290 value = fields->f_imm_12_s4; 3291 break; 3292 case M32C_OPERAND_IMM_SH_20_S4 : 3293 value = fields->f_imm_20_s4; 3294 break; 3295 case M32C_OPERAND_IMM_SH_8_S4 : 3296 value = fields->f_imm_8_s4; 3297 break; 3298 case M32C_OPERAND_IMM1_S : 3299 value = fields->f_imm1_S; 3300 break; 3301 case M32C_OPERAND_IMM3_S : 3302 value = fields->f_imm3_S; 3303 break; 3304 case M32C_OPERAND_LAB_16_8 : 3305 value = fields->f_lab_16_8; 3306 break; 3307 case M32C_OPERAND_LAB_24_8 : 3308 value = fields->f_lab_24_8; 3309 break; 3310 case M32C_OPERAND_LAB_32_8 : 3311 value = fields->f_lab_32_8; 3312 break; 3313 case M32C_OPERAND_LAB_40_8 : 3314 value = fields->f_lab_40_8; 3315 break; 3316 case M32C_OPERAND_LAB_5_3 : 3317 value = fields->f_lab_5_3; 3318 break; 3319 case M32C_OPERAND_LAB_8_16 : 3320 value = fields->f_lab_8_16; 3321 break; 3322 case M32C_OPERAND_LAB_8_24 : 3323 value = fields->f_lab_8_24; 3324 break; 3325 case M32C_OPERAND_LAB_8_8 : 3326 value = fields->f_lab_8_8; 3327 break; 3328 case M32C_OPERAND_LAB32_JMP_S : 3329 value = fields->f_lab32_jmp_s; 3330 break; 3331 case M32C_OPERAND_Q : 3332 value = 0; 3333 break; 3334 case M32C_OPERAND_R0 : 3335 value = 0; 3336 break; 3337 case M32C_OPERAND_R0H : 3338 value = 0; 3339 break; 3340 case M32C_OPERAND_R0L : 3341 value = 0; 3342 break; 3343 case M32C_OPERAND_R1 : 3344 value = 0; 3345 break; 3346 case M32C_OPERAND_R1R2R0 : 3347 value = 0; 3348 break; 3349 case M32C_OPERAND_R2 : 3350 value = 0; 3351 break; 3352 case M32C_OPERAND_R2R0 : 3353 value = 0; 3354 break; 3355 case M32C_OPERAND_R3 : 3356 value = 0; 3357 break; 3358 case M32C_OPERAND_R3R1 : 3359 value = 0; 3360 break; 3361 case M32C_OPERAND_REGSETPOP : 3362 value = fields->f_8_8; 3363 break; 3364 case M32C_OPERAND_REGSETPUSH : 3365 value = fields->f_8_8; 3366 break; 3367 case M32C_OPERAND_RN16_PUSH_S : 3368 value = fields->f_4_1; 3369 break; 3370 case M32C_OPERAND_S : 3371 value = 0; 3372 break; 3373 case M32C_OPERAND_SRC16AN : 3374 value = fields->f_src16_an; 3375 break; 3376 case M32C_OPERAND_SRC16ANHI : 3377 value = fields->f_src16_an; 3378 break; 3379 case M32C_OPERAND_SRC16ANQI : 3380 value = fields->f_src16_an; 3381 break; 3382 case M32C_OPERAND_SRC16RNHI : 3383 value = fields->f_src16_rn; 3384 break; 3385 case M32C_OPERAND_SRC16RNQI : 3386 value = fields->f_src16_rn; 3387 break; 3388 case M32C_OPERAND_SRC32ANPREFIXED : 3389 value = fields->f_src32_an_prefixed; 3390 break; 3391 case M32C_OPERAND_SRC32ANPREFIXEDHI : 3392 value = fields->f_src32_an_prefixed; 3393 break; 3394 case M32C_OPERAND_SRC32ANPREFIXEDQI : 3395 value = fields->f_src32_an_prefixed; 3396 break; 3397 case M32C_OPERAND_SRC32ANPREFIXEDSI : 3398 value = fields->f_src32_an_prefixed; 3399 break; 3400 case M32C_OPERAND_SRC32ANUNPREFIXED : 3401 value = fields->f_src32_an_unprefixed; 3402 break; 3403 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 3404 value = fields->f_src32_an_unprefixed; 3405 break; 3406 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 3407 value = fields->f_src32_an_unprefixed; 3408 break; 3409 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 3410 value = fields->f_src32_an_unprefixed; 3411 break; 3412 case M32C_OPERAND_SRC32RNPREFIXEDHI : 3413 value = fields->f_src32_rn_prefixed_HI; 3414 break; 3415 case M32C_OPERAND_SRC32RNPREFIXEDQI : 3416 value = fields->f_src32_rn_prefixed_QI; 3417 break; 3418 case M32C_OPERAND_SRC32RNPREFIXEDSI : 3419 value = fields->f_src32_rn_prefixed_SI; 3420 break; 3421 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 3422 value = fields->f_src32_rn_unprefixed_HI; 3423 break; 3424 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 3425 value = fields->f_src32_rn_unprefixed_QI; 3426 break; 3427 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 3428 value = fields->f_src32_rn_unprefixed_SI; 3429 break; 3430 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 3431 value = fields->f_5_1; 3432 break; 3433 case M32C_OPERAND_X : 3434 value = 0; 3435 break; 3436 case M32C_OPERAND_Z : 3437 value = 0; 3438 break; 3439 case M32C_OPERAND_COND16_16 : 3440 value = fields->f_dsp_16_u8; 3441 break; 3442 case M32C_OPERAND_COND16_24 : 3443 value = fields->f_dsp_24_u8; 3444 break; 3445 case M32C_OPERAND_COND16_32 : 3446 value = fields->f_dsp_32_u8; 3447 break; 3448 case M32C_OPERAND_COND16C : 3449 value = fields->f_cond16; 3450 break; 3451 case M32C_OPERAND_COND16J : 3452 value = fields->f_cond16; 3453 break; 3454 case M32C_OPERAND_COND16J5 : 3455 value = fields->f_cond16j_5; 3456 break; 3457 case M32C_OPERAND_COND32 : 3458 value = fields->f_cond32; 3459 break; 3460 case M32C_OPERAND_COND32_16 : 3461 value = fields->f_dsp_16_u8; 3462 break; 3463 case M32C_OPERAND_COND32_24 : 3464 value = fields->f_dsp_24_u8; 3465 break; 3466 case M32C_OPERAND_COND32_32 : 3467 value = fields->f_dsp_32_u8; 3468 break; 3469 case M32C_OPERAND_COND32_40 : 3470 value = fields->f_dsp_40_u8; 3471 break; 3472 case M32C_OPERAND_COND32J : 3473 value = fields->f_cond32j; 3474 break; 3475 case M32C_OPERAND_CR1_PREFIXED_32 : 3476 value = fields->f_21_3; 3477 break; 3478 case M32C_OPERAND_CR1_UNPREFIXED_32 : 3479 value = fields->f_13_3; 3480 break; 3481 case M32C_OPERAND_CR16 : 3482 value = fields->f_9_3; 3483 break; 3484 case M32C_OPERAND_CR2_32 : 3485 value = fields->f_13_3; 3486 break; 3487 case M32C_OPERAND_CR3_PREFIXED_32 : 3488 value = fields->f_21_3; 3489 break; 3490 case M32C_OPERAND_CR3_UNPREFIXED_32 : 3491 value = fields->f_13_3; 3492 break; 3493 case M32C_OPERAND_FLAGS16 : 3494 value = fields->f_9_3; 3495 break; 3496 case M32C_OPERAND_FLAGS32 : 3497 value = fields->f_13_3; 3498 break; 3499 case M32C_OPERAND_SCCOND32 : 3500 value = fields->f_cond16; 3501 break; 3502 case M32C_OPERAND_SIZE : 3503 value = 0; 3504 break; 3505 3506 default : 3507 /* xgettext:c-format */ 3508 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 3509 opindex); 3510 abort (); 3511 } 3512 3513 return value; 3514 } 3515 3516 bfd_vma 3517 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 3518 int opindex, 3519 const CGEN_FIELDS * fields) 3520 { 3521 bfd_vma value; 3522 3523 switch (opindex) 3524 { 3525 case M32C_OPERAND_A0 : 3526 value = 0; 3527 break; 3528 case M32C_OPERAND_A1 : 3529 value = 0; 3530 break; 3531 case M32C_OPERAND_AN16_PUSH_S : 3532 value = fields->f_4_1; 3533 break; 3534 case M32C_OPERAND_BIT16AN : 3535 value = fields->f_dst16_an; 3536 break; 3537 case M32C_OPERAND_BIT16RN : 3538 value = fields->f_dst16_rn; 3539 break; 3540 case M32C_OPERAND_BIT3_S : 3541 value = fields->f_imm3_S; 3542 break; 3543 case M32C_OPERAND_BIT32ANPREFIXED : 3544 value = fields->f_dst32_an_prefixed; 3545 break; 3546 case M32C_OPERAND_BIT32ANUNPREFIXED : 3547 value = fields->f_dst32_an_unprefixed; 3548 break; 3549 case M32C_OPERAND_BIT32RNPREFIXED : 3550 value = fields->f_dst32_rn_prefixed_QI; 3551 break; 3552 case M32C_OPERAND_BIT32RNUNPREFIXED : 3553 value = fields->f_dst32_rn_unprefixed_QI; 3554 break; 3555 case M32C_OPERAND_BITBASE16_16_S8 : 3556 value = fields->f_dsp_16_s8; 3557 break; 3558 case M32C_OPERAND_BITBASE16_16_U16 : 3559 value = fields->f_dsp_16_u16; 3560 break; 3561 case M32C_OPERAND_BITBASE16_16_U8 : 3562 value = fields->f_dsp_16_u8; 3563 break; 3564 case M32C_OPERAND_BITBASE16_8_U11_S : 3565 value = fields->f_bitbase16_u11_S; 3566 break; 3567 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 3568 value = fields->f_bitbase32_16_s11_unprefixed; 3569 break; 3570 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 3571 value = fields->f_bitbase32_16_s19_unprefixed; 3572 break; 3573 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 3574 value = fields->f_bitbase32_16_u11_unprefixed; 3575 break; 3576 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 3577 value = fields->f_bitbase32_16_u19_unprefixed; 3578 break; 3579 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 3580 value = fields->f_bitbase32_16_u27_unprefixed; 3581 break; 3582 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 3583 value = fields->f_bitbase32_24_s11_prefixed; 3584 break; 3585 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 3586 value = fields->f_bitbase32_24_s19_prefixed; 3587 break; 3588 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 3589 value = fields->f_bitbase32_24_u11_prefixed; 3590 break; 3591 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 3592 value = fields->f_bitbase32_24_u19_prefixed; 3593 break; 3594 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 3595 value = fields->f_bitbase32_24_u27_prefixed; 3596 break; 3597 case M32C_OPERAND_BITNO16R : 3598 value = fields->f_dsp_16_u8; 3599 break; 3600 case M32C_OPERAND_BITNO32PREFIXED : 3601 value = fields->f_bitno32_prefixed; 3602 break; 3603 case M32C_OPERAND_BITNO32UNPREFIXED : 3604 value = fields->f_bitno32_unprefixed; 3605 break; 3606 case M32C_OPERAND_DSP_10_U6 : 3607 value = fields->f_dsp_10_u6; 3608 break; 3609 case M32C_OPERAND_DSP_16_S16 : 3610 value = fields->f_dsp_16_s16; 3611 break; 3612 case M32C_OPERAND_DSP_16_S8 : 3613 value = fields->f_dsp_16_s8; 3614 break; 3615 case M32C_OPERAND_DSP_16_U16 : 3616 value = fields->f_dsp_16_u16; 3617 break; 3618 case M32C_OPERAND_DSP_16_U20 : 3619 value = fields->f_dsp_16_u24; 3620 break; 3621 case M32C_OPERAND_DSP_16_U24 : 3622 value = fields->f_dsp_16_u24; 3623 break; 3624 case M32C_OPERAND_DSP_16_U8 : 3625 value = fields->f_dsp_16_u8; 3626 break; 3627 case M32C_OPERAND_DSP_24_S16 : 3628 value = fields->f_dsp_24_s16; 3629 break; 3630 case M32C_OPERAND_DSP_24_S8 : 3631 value = fields->f_dsp_24_s8; 3632 break; 3633 case M32C_OPERAND_DSP_24_U16 : 3634 value = fields->f_dsp_24_u16; 3635 break; 3636 case M32C_OPERAND_DSP_24_U20 : 3637 value = fields->f_dsp_24_u24; 3638 break; 3639 case M32C_OPERAND_DSP_24_U24 : 3640 value = fields->f_dsp_24_u24; 3641 break; 3642 case M32C_OPERAND_DSP_24_U8 : 3643 value = fields->f_dsp_24_u8; 3644 break; 3645 case M32C_OPERAND_DSP_32_S16 : 3646 value = fields->f_dsp_32_s16; 3647 break; 3648 case M32C_OPERAND_DSP_32_S8 : 3649 value = fields->f_dsp_32_s8; 3650 break; 3651 case M32C_OPERAND_DSP_32_U16 : 3652 value = fields->f_dsp_32_u16; 3653 break; 3654 case M32C_OPERAND_DSP_32_U20 : 3655 value = fields->f_dsp_32_u24; 3656 break; 3657 case M32C_OPERAND_DSP_32_U24 : 3658 value = fields->f_dsp_32_u24; 3659 break; 3660 case M32C_OPERAND_DSP_32_U8 : 3661 value = fields->f_dsp_32_u8; 3662 break; 3663 case M32C_OPERAND_DSP_40_S16 : 3664 value = fields->f_dsp_40_s16; 3665 break; 3666 case M32C_OPERAND_DSP_40_S8 : 3667 value = fields->f_dsp_40_s8; 3668 break; 3669 case M32C_OPERAND_DSP_40_U16 : 3670 value = fields->f_dsp_40_u16; 3671 break; 3672 case M32C_OPERAND_DSP_40_U20 : 3673 value = fields->f_dsp_40_u20; 3674 break; 3675 case M32C_OPERAND_DSP_40_U24 : 3676 value = fields->f_dsp_40_u24; 3677 break; 3678 case M32C_OPERAND_DSP_40_U8 : 3679 value = fields->f_dsp_40_u8; 3680 break; 3681 case M32C_OPERAND_DSP_48_S16 : 3682 value = fields->f_dsp_48_s16; 3683 break; 3684 case M32C_OPERAND_DSP_48_S8 : 3685 value = fields->f_dsp_48_s8; 3686 break; 3687 case M32C_OPERAND_DSP_48_U16 : 3688 value = fields->f_dsp_48_u16; 3689 break; 3690 case M32C_OPERAND_DSP_48_U20 : 3691 value = fields->f_dsp_48_u20; 3692 break; 3693 case M32C_OPERAND_DSP_48_U24 : 3694 value = fields->f_dsp_48_u24; 3695 break; 3696 case M32C_OPERAND_DSP_48_U8 : 3697 value = fields->f_dsp_48_u8; 3698 break; 3699 case M32C_OPERAND_DSP_8_S24 : 3700 value = fields->f_dsp_8_s24; 3701 break; 3702 case M32C_OPERAND_DSP_8_S8 : 3703 value = fields->f_dsp_8_s8; 3704 break; 3705 case M32C_OPERAND_DSP_8_U16 : 3706 value = fields->f_dsp_8_u16; 3707 break; 3708 case M32C_OPERAND_DSP_8_U24 : 3709 value = fields->f_dsp_8_u24; 3710 break; 3711 case M32C_OPERAND_DSP_8_U6 : 3712 value = fields->f_dsp_8_u6; 3713 break; 3714 case M32C_OPERAND_DSP_8_U8 : 3715 value = fields->f_dsp_8_u8; 3716 break; 3717 case M32C_OPERAND_DST16AN : 3718 value = fields->f_dst16_an; 3719 break; 3720 case M32C_OPERAND_DST16AN_S : 3721 value = fields->f_dst16_an_s; 3722 break; 3723 case M32C_OPERAND_DST16ANHI : 3724 value = fields->f_dst16_an; 3725 break; 3726 case M32C_OPERAND_DST16ANQI : 3727 value = fields->f_dst16_an; 3728 break; 3729 case M32C_OPERAND_DST16ANQI_S : 3730 value = fields->f_dst16_rn_QI_s; 3731 break; 3732 case M32C_OPERAND_DST16ANSI : 3733 value = fields->f_dst16_an; 3734 break; 3735 case M32C_OPERAND_DST16RNEXTQI : 3736 value = fields->f_dst16_rn_ext; 3737 break; 3738 case M32C_OPERAND_DST16RNHI : 3739 value = fields->f_dst16_rn; 3740 break; 3741 case M32C_OPERAND_DST16RNQI : 3742 value = fields->f_dst16_rn; 3743 break; 3744 case M32C_OPERAND_DST16RNQI_S : 3745 value = fields->f_dst16_rn_QI_s; 3746 break; 3747 case M32C_OPERAND_DST16RNSI : 3748 value = fields->f_dst16_rn; 3749 break; 3750 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 3751 value = fields->f_dst32_an_unprefixed; 3752 break; 3753 case M32C_OPERAND_DST32ANPREFIXED : 3754 value = fields->f_dst32_an_prefixed; 3755 break; 3756 case M32C_OPERAND_DST32ANPREFIXEDHI : 3757 value = fields->f_dst32_an_prefixed; 3758 break; 3759 case M32C_OPERAND_DST32ANPREFIXEDQI : 3760 value = fields->f_dst32_an_prefixed; 3761 break; 3762 case M32C_OPERAND_DST32ANPREFIXEDSI : 3763 value = fields->f_dst32_an_prefixed; 3764 break; 3765 case M32C_OPERAND_DST32ANUNPREFIXED : 3766 value = fields->f_dst32_an_unprefixed; 3767 break; 3768 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 3769 value = fields->f_dst32_an_unprefixed; 3770 break; 3771 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 3772 value = fields->f_dst32_an_unprefixed; 3773 break; 3774 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 3775 value = fields->f_dst32_an_unprefixed; 3776 break; 3777 case M32C_OPERAND_DST32R0HI_S : 3778 value = 0; 3779 break; 3780 case M32C_OPERAND_DST32R0QI_S : 3781 value = 0; 3782 break; 3783 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 3784 value = fields->f_dst32_rn_ext_unprefixed; 3785 break; 3786 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 3787 value = fields->f_dst32_rn_ext_unprefixed; 3788 break; 3789 case M32C_OPERAND_DST32RNPREFIXEDHI : 3790 value = fields->f_dst32_rn_prefixed_HI; 3791 break; 3792 case M32C_OPERAND_DST32RNPREFIXEDQI : 3793 value = fields->f_dst32_rn_prefixed_QI; 3794 break; 3795 case M32C_OPERAND_DST32RNPREFIXEDSI : 3796 value = fields->f_dst32_rn_prefixed_SI; 3797 break; 3798 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 3799 value = fields->f_dst32_rn_unprefixed_HI; 3800 break; 3801 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 3802 value = fields->f_dst32_rn_unprefixed_QI; 3803 break; 3804 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 3805 value = fields->f_dst32_rn_unprefixed_SI; 3806 break; 3807 case M32C_OPERAND_G : 3808 value = 0; 3809 break; 3810 case M32C_OPERAND_IMM_12_S4 : 3811 value = fields->f_imm_12_s4; 3812 break; 3813 case M32C_OPERAND_IMM_12_S4N : 3814 value = fields->f_imm_12_s4; 3815 break; 3816 case M32C_OPERAND_IMM_13_U3 : 3817 value = fields->f_imm_13_u3; 3818 break; 3819 case M32C_OPERAND_IMM_16_HI : 3820 value = fields->f_dsp_16_s16; 3821 break; 3822 case M32C_OPERAND_IMM_16_QI : 3823 value = fields->f_dsp_16_s8; 3824 break; 3825 case M32C_OPERAND_IMM_16_SI : 3826 value = fields->f_dsp_16_s32; 3827 break; 3828 case M32C_OPERAND_IMM_20_S4 : 3829 value = fields->f_imm_20_s4; 3830 break; 3831 case M32C_OPERAND_IMM_24_HI : 3832 value = fields->f_dsp_24_s16; 3833 break; 3834 case M32C_OPERAND_IMM_24_QI : 3835 value = fields->f_dsp_24_s8; 3836 break; 3837 case M32C_OPERAND_IMM_24_SI : 3838 value = fields->f_dsp_24_s32; 3839 break; 3840 case M32C_OPERAND_IMM_32_HI : 3841 value = fields->f_dsp_32_s16; 3842 break; 3843 case M32C_OPERAND_IMM_32_QI : 3844 value = fields->f_dsp_32_s8; 3845 break; 3846 case M32C_OPERAND_IMM_32_SI : 3847 value = fields->f_dsp_32_s32; 3848 break; 3849 case M32C_OPERAND_IMM_40_HI : 3850 value = fields->f_dsp_40_s16; 3851 break; 3852 case M32C_OPERAND_IMM_40_QI : 3853 value = fields->f_dsp_40_s8; 3854 break; 3855 case M32C_OPERAND_IMM_40_SI : 3856 value = fields->f_dsp_40_s32; 3857 break; 3858 case M32C_OPERAND_IMM_48_HI : 3859 value = fields->f_dsp_48_s16; 3860 break; 3861 case M32C_OPERAND_IMM_48_QI : 3862 value = fields->f_dsp_48_s8; 3863 break; 3864 case M32C_OPERAND_IMM_48_SI : 3865 value = fields->f_dsp_48_s32; 3866 break; 3867 case M32C_OPERAND_IMM_56_HI : 3868 value = fields->f_dsp_56_s16; 3869 break; 3870 case M32C_OPERAND_IMM_56_QI : 3871 value = fields->f_dsp_56_s8; 3872 break; 3873 case M32C_OPERAND_IMM_64_HI : 3874 value = fields->f_dsp_64_s16; 3875 break; 3876 case M32C_OPERAND_IMM_8_HI : 3877 value = fields->f_dsp_8_s16; 3878 break; 3879 case M32C_OPERAND_IMM_8_QI : 3880 value = fields->f_dsp_8_s8; 3881 break; 3882 case M32C_OPERAND_IMM_8_S4 : 3883 value = fields->f_imm_8_s4; 3884 break; 3885 case M32C_OPERAND_IMM_8_S4N : 3886 value = fields->f_imm_8_s4; 3887 break; 3888 case M32C_OPERAND_IMM_SH_12_S4 : 3889 value = fields->f_imm_12_s4; 3890 break; 3891 case M32C_OPERAND_IMM_SH_20_S4 : 3892 value = fields->f_imm_20_s4; 3893 break; 3894 case M32C_OPERAND_IMM_SH_8_S4 : 3895 value = fields->f_imm_8_s4; 3896 break; 3897 case M32C_OPERAND_IMM1_S : 3898 value = fields->f_imm1_S; 3899 break; 3900 case M32C_OPERAND_IMM3_S : 3901 value = fields->f_imm3_S; 3902 break; 3903 case M32C_OPERAND_LAB_16_8 : 3904 value = fields->f_lab_16_8; 3905 break; 3906 case M32C_OPERAND_LAB_24_8 : 3907 value = fields->f_lab_24_8; 3908 break; 3909 case M32C_OPERAND_LAB_32_8 : 3910 value = fields->f_lab_32_8; 3911 break; 3912 case M32C_OPERAND_LAB_40_8 : 3913 value = fields->f_lab_40_8; 3914 break; 3915 case M32C_OPERAND_LAB_5_3 : 3916 value = fields->f_lab_5_3; 3917 break; 3918 case M32C_OPERAND_LAB_8_16 : 3919 value = fields->f_lab_8_16; 3920 break; 3921 case M32C_OPERAND_LAB_8_24 : 3922 value = fields->f_lab_8_24; 3923 break; 3924 case M32C_OPERAND_LAB_8_8 : 3925 value = fields->f_lab_8_8; 3926 break; 3927 case M32C_OPERAND_LAB32_JMP_S : 3928 value = fields->f_lab32_jmp_s; 3929 break; 3930 case M32C_OPERAND_Q : 3931 value = 0; 3932 break; 3933 case M32C_OPERAND_R0 : 3934 value = 0; 3935 break; 3936 case M32C_OPERAND_R0H : 3937 value = 0; 3938 break; 3939 case M32C_OPERAND_R0L : 3940 value = 0; 3941 break; 3942 case M32C_OPERAND_R1 : 3943 value = 0; 3944 break; 3945 case M32C_OPERAND_R1R2R0 : 3946 value = 0; 3947 break; 3948 case M32C_OPERAND_R2 : 3949 value = 0; 3950 break; 3951 case M32C_OPERAND_R2R0 : 3952 value = 0; 3953 break; 3954 case M32C_OPERAND_R3 : 3955 value = 0; 3956 break; 3957 case M32C_OPERAND_R3R1 : 3958 value = 0; 3959 break; 3960 case M32C_OPERAND_REGSETPOP : 3961 value = fields->f_8_8; 3962 break; 3963 case M32C_OPERAND_REGSETPUSH : 3964 value = fields->f_8_8; 3965 break; 3966 case M32C_OPERAND_RN16_PUSH_S : 3967 value = fields->f_4_1; 3968 break; 3969 case M32C_OPERAND_S : 3970 value = 0; 3971 break; 3972 case M32C_OPERAND_SRC16AN : 3973 value = fields->f_src16_an; 3974 break; 3975 case M32C_OPERAND_SRC16ANHI : 3976 value = fields->f_src16_an; 3977 break; 3978 case M32C_OPERAND_SRC16ANQI : 3979 value = fields->f_src16_an; 3980 break; 3981 case M32C_OPERAND_SRC16RNHI : 3982 value = fields->f_src16_rn; 3983 break; 3984 case M32C_OPERAND_SRC16RNQI : 3985 value = fields->f_src16_rn; 3986 break; 3987 case M32C_OPERAND_SRC32ANPREFIXED : 3988 value = fields->f_src32_an_prefixed; 3989 break; 3990 case M32C_OPERAND_SRC32ANPREFIXEDHI : 3991 value = fields->f_src32_an_prefixed; 3992 break; 3993 case M32C_OPERAND_SRC32ANPREFIXEDQI : 3994 value = fields->f_src32_an_prefixed; 3995 break; 3996 case M32C_OPERAND_SRC32ANPREFIXEDSI : 3997 value = fields->f_src32_an_prefixed; 3998 break; 3999 case M32C_OPERAND_SRC32ANUNPREFIXED : 4000 value = fields->f_src32_an_unprefixed; 4001 break; 4002 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 4003 value = fields->f_src32_an_unprefixed; 4004 break; 4005 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 4006 value = fields->f_src32_an_unprefixed; 4007 break; 4008 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 4009 value = fields->f_src32_an_unprefixed; 4010 break; 4011 case M32C_OPERAND_SRC32RNPREFIXEDHI : 4012 value = fields->f_src32_rn_prefixed_HI; 4013 break; 4014 case M32C_OPERAND_SRC32RNPREFIXEDQI : 4015 value = fields->f_src32_rn_prefixed_QI; 4016 break; 4017 case M32C_OPERAND_SRC32RNPREFIXEDSI : 4018 value = fields->f_src32_rn_prefixed_SI; 4019 break; 4020 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 4021 value = fields->f_src32_rn_unprefixed_HI; 4022 break; 4023 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 4024 value = fields->f_src32_rn_unprefixed_QI; 4025 break; 4026 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 4027 value = fields->f_src32_rn_unprefixed_SI; 4028 break; 4029 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 4030 value = fields->f_5_1; 4031 break; 4032 case M32C_OPERAND_X : 4033 value = 0; 4034 break; 4035 case M32C_OPERAND_Z : 4036 value = 0; 4037 break; 4038 case M32C_OPERAND_COND16_16 : 4039 value = fields->f_dsp_16_u8; 4040 break; 4041 case M32C_OPERAND_COND16_24 : 4042 value = fields->f_dsp_24_u8; 4043 break; 4044 case M32C_OPERAND_COND16_32 : 4045 value = fields->f_dsp_32_u8; 4046 break; 4047 case M32C_OPERAND_COND16C : 4048 value = fields->f_cond16; 4049 break; 4050 case M32C_OPERAND_COND16J : 4051 value = fields->f_cond16; 4052 break; 4053 case M32C_OPERAND_COND16J5 : 4054 value = fields->f_cond16j_5; 4055 break; 4056 case M32C_OPERAND_COND32 : 4057 value = fields->f_cond32; 4058 break; 4059 case M32C_OPERAND_COND32_16 : 4060 value = fields->f_dsp_16_u8; 4061 break; 4062 case M32C_OPERAND_COND32_24 : 4063 value = fields->f_dsp_24_u8; 4064 break; 4065 case M32C_OPERAND_COND32_32 : 4066 value = fields->f_dsp_32_u8; 4067 break; 4068 case M32C_OPERAND_COND32_40 : 4069 value = fields->f_dsp_40_u8; 4070 break; 4071 case M32C_OPERAND_COND32J : 4072 value = fields->f_cond32j; 4073 break; 4074 case M32C_OPERAND_CR1_PREFIXED_32 : 4075 value = fields->f_21_3; 4076 break; 4077 case M32C_OPERAND_CR1_UNPREFIXED_32 : 4078 value = fields->f_13_3; 4079 break; 4080 case M32C_OPERAND_CR16 : 4081 value = fields->f_9_3; 4082 break; 4083 case M32C_OPERAND_CR2_32 : 4084 value = fields->f_13_3; 4085 break; 4086 case M32C_OPERAND_CR3_PREFIXED_32 : 4087 value = fields->f_21_3; 4088 break; 4089 case M32C_OPERAND_CR3_UNPREFIXED_32 : 4090 value = fields->f_13_3; 4091 break; 4092 case M32C_OPERAND_FLAGS16 : 4093 value = fields->f_9_3; 4094 break; 4095 case M32C_OPERAND_FLAGS32 : 4096 value = fields->f_13_3; 4097 break; 4098 case M32C_OPERAND_SCCOND32 : 4099 value = fields->f_cond16; 4100 break; 4101 case M32C_OPERAND_SIZE : 4102 value = 0; 4103 break; 4104 4105 default : 4106 /* xgettext:c-format */ 4107 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 4108 opindex); 4109 abort (); 4110 } 4111 4112 return value; 4113 } 4114 4115 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 4116 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 4117 4118 /* Stuffing values in cgen_fields is handled by a collection of functions. 4119 They are distinguished by the type of the VALUE argument they accept. 4120 TODO: floating point, inlining support, remove cases where argument type 4121 not appropriate. */ 4122 4123 void 4124 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 4125 int opindex, 4126 CGEN_FIELDS * fields, 4127 int value) 4128 { 4129 switch (opindex) 4130 { 4131 case M32C_OPERAND_A0 : 4132 break; 4133 case M32C_OPERAND_A1 : 4134 break; 4135 case M32C_OPERAND_AN16_PUSH_S : 4136 fields->f_4_1 = value; 4137 break; 4138 case M32C_OPERAND_BIT16AN : 4139 fields->f_dst16_an = value; 4140 break; 4141 case M32C_OPERAND_BIT16RN : 4142 fields->f_dst16_rn = value; 4143 break; 4144 case M32C_OPERAND_BIT3_S : 4145 fields->f_imm3_S = value; 4146 break; 4147 case M32C_OPERAND_BIT32ANPREFIXED : 4148 fields->f_dst32_an_prefixed = value; 4149 break; 4150 case M32C_OPERAND_BIT32ANUNPREFIXED : 4151 fields->f_dst32_an_unprefixed = value; 4152 break; 4153 case M32C_OPERAND_BIT32RNPREFIXED : 4154 fields->f_dst32_rn_prefixed_QI = value; 4155 break; 4156 case M32C_OPERAND_BIT32RNUNPREFIXED : 4157 fields->f_dst32_rn_unprefixed_QI = value; 4158 break; 4159 case M32C_OPERAND_BITBASE16_16_S8 : 4160 fields->f_dsp_16_s8 = value; 4161 break; 4162 case M32C_OPERAND_BITBASE16_16_U16 : 4163 fields->f_dsp_16_u16 = value; 4164 break; 4165 case M32C_OPERAND_BITBASE16_16_U8 : 4166 fields->f_dsp_16_u8 = value; 4167 break; 4168 case M32C_OPERAND_BITBASE16_8_U11_S : 4169 fields->f_bitbase16_u11_S = value; 4170 break; 4171 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 4172 fields->f_bitbase32_16_s11_unprefixed = value; 4173 break; 4174 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 4175 fields->f_bitbase32_16_s19_unprefixed = value; 4176 break; 4177 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 4178 fields->f_bitbase32_16_u11_unprefixed = value; 4179 break; 4180 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 4181 fields->f_bitbase32_16_u19_unprefixed = value; 4182 break; 4183 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 4184 fields->f_bitbase32_16_u27_unprefixed = value; 4185 break; 4186 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 4187 fields->f_bitbase32_24_s11_prefixed = value; 4188 break; 4189 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 4190 fields->f_bitbase32_24_s19_prefixed = value; 4191 break; 4192 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 4193 fields->f_bitbase32_24_u11_prefixed = value; 4194 break; 4195 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 4196 fields->f_bitbase32_24_u19_prefixed = value; 4197 break; 4198 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 4199 fields->f_bitbase32_24_u27_prefixed = value; 4200 break; 4201 case M32C_OPERAND_BITNO16R : 4202 fields->f_dsp_16_u8 = value; 4203 break; 4204 case M32C_OPERAND_BITNO32PREFIXED : 4205 fields->f_bitno32_prefixed = value; 4206 break; 4207 case M32C_OPERAND_BITNO32UNPREFIXED : 4208 fields->f_bitno32_unprefixed = value; 4209 break; 4210 case M32C_OPERAND_DSP_10_U6 : 4211 fields->f_dsp_10_u6 = value; 4212 break; 4213 case M32C_OPERAND_DSP_16_S16 : 4214 fields->f_dsp_16_s16 = value; 4215 break; 4216 case M32C_OPERAND_DSP_16_S8 : 4217 fields->f_dsp_16_s8 = value; 4218 break; 4219 case M32C_OPERAND_DSP_16_U16 : 4220 fields->f_dsp_16_u16 = value; 4221 break; 4222 case M32C_OPERAND_DSP_16_U20 : 4223 fields->f_dsp_16_u24 = value; 4224 break; 4225 case M32C_OPERAND_DSP_16_U24 : 4226 fields->f_dsp_16_u24 = value; 4227 break; 4228 case M32C_OPERAND_DSP_16_U8 : 4229 fields->f_dsp_16_u8 = value; 4230 break; 4231 case M32C_OPERAND_DSP_24_S16 : 4232 fields->f_dsp_24_s16 = value; 4233 break; 4234 case M32C_OPERAND_DSP_24_S8 : 4235 fields->f_dsp_24_s8 = value; 4236 break; 4237 case M32C_OPERAND_DSP_24_U16 : 4238 fields->f_dsp_24_u16 = value; 4239 break; 4240 case M32C_OPERAND_DSP_24_U20 : 4241 fields->f_dsp_24_u24 = value; 4242 break; 4243 case M32C_OPERAND_DSP_24_U24 : 4244 fields->f_dsp_24_u24 = value; 4245 break; 4246 case M32C_OPERAND_DSP_24_U8 : 4247 fields->f_dsp_24_u8 = value; 4248 break; 4249 case M32C_OPERAND_DSP_32_S16 : 4250 fields->f_dsp_32_s16 = value; 4251 break; 4252 case M32C_OPERAND_DSP_32_S8 : 4253 fields->f_dsp_32_s8 = value; 4254 break; 4255 case M32C_OPERAND_DSP_32_U16 : 4256 fields->f_dsp_32_u16 = value; 4257 break; 4258 case M32C_OPERAND_DSP_32_U20 : 4259 fields->f_dsp_32_u24 = value; 4260 break; 4261 case M32C_OPERAND_DSP_32_U24 : 4262 fields->f_dsp_32_u24 = value; 4263 break; 4264 case M32C_OPERAND_DSP_32_U8 : 4265 fields->f_dsp_32_u8 = value; 4266 break; 4267 case M32C_OPERAND_DSP_40_S16 : 4268 fields->f_dsp_40_s16 = value; 4269 break; 4270 case M32C_OPERAND_DSP_40_S8 : 4271 fields->f_dsp_40_s8 = value; 4272 break; 4273 case M32C_OPERAND_DSP_40_U16 : 4274 fields->f_dsp_40_u16 = value; 4275 break; 4276 case M32C_OPERAND_DSP_40_U20 : 4277 fields->f_dsp_40_u20 = value; 4278 break; 4279 case M32C_OPERAND_DSP_40_U24 : 4280 fields->f_dsp_40_u24 = value; 4281 break; 4282 case M32C_OPERAND_DSP_40_U8 : 4283 fields->f_dsp_40_u8 = value; 4284 break; 4285 case M32C_OPERAND_DSP_48_S16 : 4286 fields->f_dsp_48_s16 = value; 4287 break; 4288 case M32C_OPERAND_DSP_48_S8 : 4289 fields->f_dsp_48_s8 = value; 4290 break; 4291 case M32C_OPERAND_DSP_48_U16 : 4292 fields->f_dsp_48_u16 = value; 4293 break; 4294 case M32C_OPERAND_DSP_48_U20 : 4295 fields->f_dsp_48_u20 = value; 4296 break; 4297 case M32C_OPERAND_DSP_48_U24 : 4298 fields->f_dsp_48_u24 = value; 4299 break; 4300 case M32C_OPERAND_DSP_48_U8 : 4301 fields->f_dsp_48_u8 = value; 4302 break; 4303 case M32C_OPERAND_DSP_8_S24 : 4304 fields->f_dsp_8_s24 = value; 4305 break; 4306 case M32C_OPERAND_DSP_8_S8 : 4307 fields->f_dsp_8_s8 = value; 4308 break; 4309 case M32C_OPERAND_DSP_8_U16 : 4310 fields->f_dsp_8_u16 = value; 4311 break; 4312 case M32C_OPERAND_DSP_8_U24 : 4313 fields->f_dsp_8_u24 = value; 4314 break; 4315 case M32C_OPERAND_DSP_8_U6 : 4316 fields->f_dsp_8_u6 = value; 4317 break; 4318 case M32C_OPERAND_DSP_8_U8 : 4319 fields->f_dsp_8_u8 = value; 4320 break; 4321 case M32C_OPERAND_DST16AN : 4322 fields->f_dst16_an = value; 4323 break; 4324 case M32C_OPERAND_DST16AN_S : 4325 fields->f_dst16_an_s = value; 4326 break; 4327 case M32C_OPERAND_DST16ANHI : 4328 fields->f_dst16_an = value; 4329 break; 4330 case M32C_OPERAND_DST16ANQI : 4331 fields->f_dst16_an = value; 4332 break; 4333 case M32C_OPERAND_DST16ANQI_S : 4334 fields->f_dst16_rn_QI_s = value; 4335 break; 4336 case M32C_OPERAND_DST16ANSI : 4337 fields->f_dst16_an = value; 4338 break; 4339 case M32C_OPERAND_DST16RNEXTQI : 4340 fields->f_dst16_rn_ext = value; 4341 break; 4342 case M32C_OPERAND_DST16RNHI : 4343 fields->f_dst16_rn = value; 4344 break; 4345 case M32C_OPERAND_DST16RNQI : 4346 fields->f_dst16_rn = value; 4347 break; 4348 case M32C_OPERAND_DST16RNQI_S : 4349 fields->f_dst16_rn_QI_s = value; 4350 break; 4351 case M32C_OPERAND_DST16RNSI : 4352 fields->f_dst16_rn = value; 4353 break; 4354 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 4355 fields->f_dst32_an_unprefixed = value; 4356 break; 4357 case M32C_OPERAND_DST32ANPREFIXED : 4358 fields->f_dst32_an_prefixed = value; 4359 break; 4360 case M32C_OPERAND_DST32ANPREFIXEDHI : 4361 fields->f_dst32_an_prefixed = value; 4362 break; 4363 case M32C_OPERAND_DST32ANPREFIXEDQI : 4364 fields->f_dst32_an_prefixed = value; 4365 break; 4366 case M32C_OPERAND_DST32ANPREFIXEDSI : 4367 fields->f_dst32_an_prefixed = value; 4368 break; 4369 case M32C_OPERAND_DST32ANUNPREFIXED : 4370 fields->f_dst32_an_unprefixed = value; 4371 break; 4372 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 4373 fields->f_dst32_an_unprefixed = value; 4374 break; 4375 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 4376 fields->f_dst32_an_unprefixed = value; 4377 break; 4378 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 4379 fields->f_dst32_an_unprefixed = value; 4380 break; 4381 case M32C_OPERAND_DST32R0HI_S : 4382 break; 4383 case M32C_OPERAND_DST32R0QI_S : 4384 break; 4385 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 4386 fields->f_dst32_rn_ext_unprefixed = value; 4387 break; 4388 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 4389 fields->f_dst32_rn_ext_unprefixed = value; 4390 break; 4391 case M32C_OPERAND_DST32RNPREFIXEDHI : 4392 fields->f_dst32_rn_prefixed_HI = value; 4393 break; 4394 case M32C_OPERAND_DST32RNPREFIXEDQI : 4395 fields->f_dst32_rn_prefixed_QI = value; 4396 break; 4397 case M32C_OPERAND_DST32RNPREFIXEDSI : 4398 fields->f_dst32_rn_prefixed_SI = value; 4399 break; 4400 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 4401 fields->f_dst32_rn_unprefixed_HI = value; 4402 break; 4403 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 4404 fields->f_dst32_rn_unprefixed_QI = value; 4405 break; 4406 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 4407 fields->f_dst32_rn_unprefixed_SI = value; 4408 break; 4409 case M32C_OPERAND_G : 4410 break; 4411 case M32C_OPERAND_IMM_12_S4 : 4412 fields->f_imm_12_s4 = value; 4413 break; 4414 case M32C_OPERAND_IMM_12_S4N : 4415 fields->f_imm_12_s4 = value; 4416 break; 4417 case M32C_OPERAND_IMM_13_U3 : 4418 fields->f_imm_13_u3 = value; 4419 break; 4420 case M32C_OPERAND_IMM_16_HI : 4421 fields->f_dsp_16_s16 = value; 4422 break; 4423 case M32C_OPERAND_IMM_16_QI : 4424 fields->f_dsp_16_s8 = value; 4425 break; 4426 case M32C_OPERAND_IMM_16_SI : 4427 fields->f_dsp_16_s32 = value; 4428 break; 4429 case M32C_OPERAND_IMM_20_S4 : 4430 fields->f_imm_20_s4 = value; 4431 break; 4432 case M32C_OPERAND_IMM_24_HI : 4433 fields->f_dsp_24_s16 = value; 4434 break; 4435 case M32C_OPERAND_IMM_24_QI : 4436 fields->f_dsp_24_s8 = value; 4437 break; 4438 case M32C_OPERAND_IMM_24_SI : 4439 fields->f_dsp_24_s32 = value; 4440 break; 4441 case M32C_OPERAND_IMM_32_HI : 4442 fields->f_dsp_32_s16 = value; 4443 break; 4444 case M32C_OPERAND_IMM_32_QI : 4445 fields->f_dsp_32_s8 = value; 4446 break; 4447 case M32C_OPERAND_IMM_32_SI : 4448 fields->f_dsp_32_s32 = value; 4449 break; 4450 case M32C_OPERAND_IMM_40_HI : 4451 fields->f_dsp_40_s16 = value; 4452 break; 4453 case M32C_OPERAND_IMM_40_QI : 4454 fields->f_dsp_40_s8 = value; 4455 break; 4456 case M32C_OPERAND_IMM_40_SI : 4457 fields->f_dsp_40_s32 = value; 4458 break; 4459 case M32C_OPERAND_IMM_48_HI : 4460 fields->f_dsp_48_s16 = value; 4461 break; 4462 case M32C_OPERAND_IMM_48_QI : 4463 fields->f_dsp_48_s8 = value; 4464 break; 4465 case M32C_OPERAND_IMM_48_SI : 4466 fields->f_dsp_48_s32 = value; 4467 break; 4468 case M32C_OPERAND_IMM_56_HI : 4469 fields->f_dsp_56_s16 = value; 4470 break; 4471 case M32C_OPERAND_IMM_56_QI : 4472 fields->f_dsp_56_s8 = value; 4473 break; 4474 case M32C_OPERAND_IMM_64_HI : 4475 fields->f_dsp_64_s16 = value; 4476 break; 4477 case M32C_OPERAND_IMM_8_HI : 4478 fields->f_dsp_8_s16 = value; 4479 break; 4480 case M32C_OPERAND_IMM_8_QI : 4481 fields->f_dsp_8_s8 = value; 4482 break; 4483 case M32C_OPERAND_IMM_8_S4 : 4484 fields->f_imm_8_s4 = value; 4485 break; 4486 case M32C_OPERAND_IMM_8_S4N : 4487 fields->f_imm_8_s4 = value; 4488 break; 4489 case M32C_OPERAND_IMM_SH_12_S4 : 4490 fields->f_imm_12_s4 = value; 4491 break; 4492 case M32C_OPERAND_IMM_SH_20_S4 : 4493 fields->f_imm_20_s4 = value; 4494 break; 4495 case M32C_OPERAND_IMM_SH_8_S4 : 4496 fields->f_imm_8_s4 = value; 4497 break; 4498 case M32C_OPERAND_IMM1_S : 4499 fields->f_imm1_S = value; 4500 break; 4501 case M32C_OPERAND_IMM3_S : 4502 fields->f_imm3_S = value; 4503 break; 4504 case M32C_OPERAND_LAB_16_8 : 4505 fields->f_lab_16_8 = value; 4506 break; 4507 case M32C_OPERAND_LAB_24_8 : 4508 fields->f_lab_24_8 = value; 4509 break; 4510 case M32C_OPERAND_LAB_32_8 : 4511 fields->f_lab_32_8 = value; 4512 break; 4513 case M32C_OPERAND_LAB_40_8 : 4514 fields->f_lab_40_8 = value; 4515 break; 4516 case M32C_OPERAND_LAB_5_3 : 4517 fields->f_lab_5_3 = value; 4518 break; 4519 case M32C_OPERAND_LAB_8_16 : 4520 fields->f_lab_8_16 = value; 4521 break; 4522 case M32C_OPERAND_LAB_8_24 : 4523 fields->f_lab_8_24 = value; 4524 break; 4525 case M32C_OPERAND_LAB_8_8 : 4526 fields->f_lab_8_8 = value; 4527 break; 4528 case M32C_OPERAND_LAB32_JMP_S : 4529 fields->f_lab32_jmp_s = value; 4530 break; 4531 case M32C_OPERAND_Q : 4532 break; 4533 case M32C_OPERAND_R0 : 4534 break; 4535 case M32C_OPERAND_R0H : 4536 break; 4537 case M32C_OPERAND_R0L : 4538 break; 4539 case M32C_OPERAND_R1 : 4540 break; 4541 case M32C_OPERAND_R1R2R0 : 4542 break; 4543 case M32C_OPERAND_R2 : 4544 break; 4545 case M32C_OPERAND_R2R0 : 4546 break; 4547 case M32C_OPERAND_R3 : 4548 break; 4549 case M32C_OPERAND_R3R1 : 4550 break; 4551 case M32C_OPERAND_REGSETPOP : 4552 fields->f_8_8 = value; 4553 break; 4554 case M32C_OPERAND_REGSETPUSH : 4555 fields->f_8_8 = value; 4556 break; 4557 case M32C_OPERAND_RN16_PUSH_S : 4558 fields->f_4_1 = value; 4559 break; 4560 case M32C_OPERAND_S : 4561 break; 4562 case M32C_OPERAND_SRC16AN : 4563 fields->f_src16_an = value; 4564 break; 4565 case M32C_OPERAND_SRC16ANHI : 4566 fields->f_src16_an = value; 4567 break; 4568 case M32C_OPERAND_SRC16ANQI : 4569 fields->f_src16_an = value; 4570 break; 4571 case M32C_OPERAND_SRC16RNHI : 4572 fields->f_src16_rn = value; 4573 break; 4574 case M32C_OPERAND_SRC16RNQI : 4575 fields->f_src16_rn = value; 4576 break; 4577 case M32C_OPERAND_SRC32ANPREFIXED : 4578 fields->f_src32_an_prefixed = value; 4579 break; 4580 case M32C_OPERAND_SRC32ANPREFIXEDHI : 4581 fields->f_src32_an_prefixed = value; 4582 break; 4583 case M32C_OPERAND_SRC32ANPREFIXEDQI : 4584 fields->f_src32_an_prefixed = value; 4585 break; 4586 case M32C_OPERAND_SRC32ANPREFIXEDSI : 4587 fields->f_src32_an_prefixed = value; 4588 break; 4589 case M32C_OPERAND_SRC32ANUNPREFIXED : 4590 fields->f_src32_an_unprefixed = value; 4591 break; 4592 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 4593 fields->f_src32_an_unprefixed = value; 4594 break; 4595 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 4596 fields->f_src32_an_unprefixed = value; 4597 break; 4598 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 4599 fields->f_src32_an_unprefixed = value; 4600 break; 4601 case M32C_OPERAND_SRC32RNPREFIXEDHI : 4602 fields->f_src32_rn_prefixed_HI = value; 4603 break; 4604 case M32C_OPERAND_SRC32RNPREFIXEDQI : 4605 fields->f_src32_rn_prefixed_QI = value; 4606 break; 4607 case M32C_OPERAND_SRC32RNPREFIXEDSI : 4608 fields->f_src32_rn_prefixed_SI = value; 4609 break; 4610 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 4611 fields->f_src32_rn_unprefixed_HI = value; 4612 break; 4613 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 4614 fields->f_src32_rn_unprefixed_QI = value; 4615 break; 4616 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 4617 fields->f_src32_rn_unprefixed_SI = value; 4618 break; 4619 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 4620 fields->f_5_1 = value; 4621 break; 4622 case M32C_OPERAND_X : 4623 break; 4624 case M32C_OPERAND_Z : 4625 break; 4626 case M32C_OPERAND_COND16_16 : 4627 fields->f_dsp_16_u8 = value; 4628 break; 4629 case M32C_OPERAND_COND16_24 : 4630 fields->f_dsp_24_u8 = value; 4631 break; 4632 case M32C_OPERAND_COND16_32 : 4633 fields->f_dsp_32_u8 = value; 4634 break; 4635 case M32C_OPERAND_COND16C : 4636 fields->f_cond16 = value; 4637 break; 4638 case M32C_OPERAND_COND16J : 4639 fields->f_cond16 = value; 4640 break; 4641 case M32C_OPERAND_COND16J5 : 4642 fields->f_cond16j_5 = value; 4643 break; 4644 case M32C_OPERAND_COND32 : 4645 fields->f_cond32 = value; 4646 break; 4647 case M32C_OPERAND_COND32_16 : 4648 fields->f_dsp_16_u8 = value; 4649 break; 4650 case M32C_OPERAND_COND32_24 : 4651 fields->f_dsp_24_u8 = value; 4652 break; 4653 case M32C_OPERAND_COND32_32 : 4654 fields->f_dsp_32_u8 = value; 4655 break; 4656 case M32C_OPERAND_COND32_40 : 4657 fields->f_dsp_40_u8 = value; 4658 break; 4659 case M32C_OPERAND_COND32J : 4660 fields->f_cond32j = value; 4661 break; 4662 case M32C_OPERAND_CR1_PREFIXED_32 : 4663 fields->f_21_3 = value; 4664 break; 4665 case M32C_OPERAND_CR1_UNPREFIXED_32 : 4666 fields->f_13_3 = value; 4667 break; 4668 case M32C_OPERAND_CR16 : 4669 fields->f_9_3 = value; 4670 break; 4671 case M32C_OPERAND_CR2_32 : 4672 fields->f_13_3 = value; 4673 break; 4674 case M32C_OPERAND_CR3_PREFIXED_32 : 4675 fields->f_21_3 = value; 4676 break; 4677 case M32C_OPERAND_CR3_UNPREFIXED_32 : 4678 fields->f_13_3 = value; 4679 break; 4680 case M32C_OPERAND_FLAGS16 : 4681 fields->f_9_3 = value; 4682 break; 4683 case M32C_OPERAND_FLAGS32 : 4684 fields->f_13_3 = value; 4685 break; 4686 case M32C_OPERAND_SCCOND32 : 4687 fields->f_cond16 = value; 4688 break; 4689 case M32C_OPERAND_SIZE : 4690 break; 4691 4692 default : 4693 /* xgettext:c-format */ 4694 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 4695 opindex); 4696 abort (); 4697 } 4698 } 4699 4700 void 4701 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 4702 int opindex, 4703 CGEN_FIELDS * fields, 4704 bfd_vma value) 4705 { 4706 switch (opindex) 4707 { 4708 case M32C_OPERAND_A0 : 4709 break; 4710 case M32C_OPERAND_A1 : 4711 break; 4712 case M32C_OPERAND_AN16_PUSH_S : 4713 fields->f_4_1 = value; 4714 break; 4715 case M32C_OPERAND_BIT16AN : 4716 fields->f_dst16_an = value; 4717 break; 4718 case M32C_OPERAND_BIT16RN : 4719 fields->f_dst16_rn = value; 4720 break; 4721 case M32C_OPERAND_BIT3_S : 4722 fields->f_imm3_S = value; 4723 break; 4724 case M32C_OPERAND_BIT32ANPREFIXED : 4725 fields->f_dst32_an_prefixed = value; 4726 break; 4727 case M32C_OPERAND_BIT32ANUNPREFIXED : 4728 fields->f_dst32_an_unprefixed = value; 4729 break; 4730 case M32C_OPERAND_BIT32RNPREFIXED : 4731 fields->f_dst32_rn_prefixed_QI = value; 4732 break; 4733 case M32C_OPERAND_BIT32RNUNPREFIXED : 4734 fields->f_dst32_rn_unprefixed_QI = value; 4735 break; 4736 case M32C_OPERAND_BITBASE16_16_S8 : 4737 fields->f_dsp_16_s8 = value; 4738 break; 4739 case M32C_OPERAND_BITBASE16_16_U16 : 4740 fields->f_dsp_16_u16 = value; 4741 break; 4742 case M32C_OPERAND_BITBASE16_16_U8 : 4743 fields->f_dsp_16_u8 = value; 4744 break; 4745 case M32C_OPERAND_BITBASE16_8_U11_S : 4746 fields->f_bitbase16_u11_S = value; 4747 break; 4748 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 4749 fields->f_bitbase32_16_s11_unprefixed = value; 4750 break; 4751 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 4752 fields->f_bitbase32_16_s19_unprefixed = value; 4753 break; 4754 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 4755 fields->f_bitbase32_16_u11_unprefixed = value; 4756 break; 4757 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 4758 fields->f_bitbase32_16_u19_unprefixed = value; 4759 break; 4760 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 4761 fields->f_bitbase32_16_u27_unprefixed = value; 4762 break; 4763 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 4764 fields->f_bitbase32_24_s11_prefixed = value; 4765 break; 4766 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 4767 fields->f_bitbase32_24_s19_prefixed = value; 4768 break; 4769 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 4770 fields->f_bitbase32_24_u11_prefixed = value; 4771 break; 4772 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 4773 fields->f_bitbase32_24_u19_prefixed = value; 4774 break; 4775 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 4776 fields->f_bitbase32_24_u27_prefixed = value; 4777 break; 4778 case M32C_OPERAND_BITNO16R : 4779 fields->f_dsp_16_u8 = value; 4780 break; 4781 case M32C_OPERAND_BITNO32PREFIXED : 4782 fields->f_bitno32_prefixed = value; 4783 break; 4784 case M32C_OPERAND_BITNO32UNPREFIXED : 4785 fields->f_bitno32_unprefixed = value; 4786 break; 4787 case M32C_OPERAND_DSP_10_U6 : 4788 fields->f_dsp_10_u6 = value; 4789 break; 4790 case M32C_OPERAND_DSP_16_S16 : 4791 fields->f_dsp_16_s16 = value; 4792 break; 4793 case M32C_OPERAND_DSP_16_S8 : 4794 fields->f_dsp_16_s8 = value; 4795 break; 4796 case M32C_OPERAND_DSP_16_U16 : 4797 fields->f_dsp_16_u16 = value; 4798 break; 4799 case M32C_OPERAND_DSP_16_U20 : 4800 fields->f_dsp_16_u24 = value; 4801 break; 4802 case M32C_OPERAND_DSP_16_U24 : 4803 fields->f_dsp_16_u24 = value; 4804 break; 4805 case M32C_OPERAND_DSP_16_U8 : 4806 fields->f_dsp_16_u8 = value; 4807 break; 4808 case M32C_OPERAND_DSP_24_S16 : 4809 fields->f_dsp_24_s16 = value; 4810 break; 4811 case M32C_OPERAND_DSP_24_S8 : 4812 fields->f_dsp_24_s8 = value; 4813 break; 4814 case M32C_OPERAND_DSP_24_U16 : 4815 fields->f_dsp_24_u16 = value; 4816 break; 4817 case M32C_OPERAND_DSP_24_U20 : 4818 fields->f_dsp_24_u24 = value; 4819 break; 4820 case M32C_OPERAND_DSP_24_U24 : 4821 fields->f_dsp_24_u24 = value; 4822 break; 4823 case M32C_OPERAND_DSP_24_U8 : 4824 fields->f_dsp_24_u8 = value; 4825 break; 4826 case M32C_OPERAND_DSP_32_S16 : 4827 fields->f_dsp_32_s16 = value; 4828 break; 4829 case M32C_OPERAND_DSP_32_S8 : 4830 fields->f_dsp_32_s8 = value; 4831 break; 4832 case M32C_OPERAND_DSP_32_U16 : 4833 fields->f_dsp_32_u16 = value; 4834 break; 4835 case M32C_OPERAND_DSP_32_U20 : 4836 fields->f_dsp_32_u24 = value; 4837 break; 4838 case M32C_OPERAND_DSP_32_U24 : 4839 fields->f_dsp_32_u24 = value; 4840 break; 4841 case M32C_OPERAND_DSP_32_U8 : 4842 fields->f_dsp_32_u8 = value; 4843 break; 4844 case M32C_OPERAND_DSP_40_S16 : 4845 fields->f_dsp_40_s16 = value; 4846 break; 4847 case M32C_OPERAND_DSP_40_S8 : 4848 fields->f_dsp_40_s8 = value; 4849 break; 4850 case M32C_OPERAND_DSP_40_U16 : 4851 fields->f_dsp_40_u16 = value; 4852 break; 4853 case M32C_OPERAND_DSP_40_U20 : 4854 fields->f_dsp_40_u20 = value; 4855 break; 4856 case M32C_OPERAND_DSP_40_U24 : 4857 fields->f_dsp_40_u24 = value; 4858 break; 4859 case M32C_OPERAND_DSP_40_U8 : 4860 fields->f_dsp_40_u8 = value; 4861 break; 4862 case M32C_OPERAND_DSP_48_S16 : 4863 fields->f_dsp_48_s16 = value; 4864 break; 4865 case M32C_OPERAND_DSP_48_S8 : 4866 fields->f_dsp_48_s8 = value; 4867 break; 4868 case M32C_OPERAND_DSP_48_U16 : 4869 fields->f_dsp_48_u16 = value; 4870 break; 4871 case M32C_OPERAND_DSP_48_U20 : 4872 fields->f_dsp_48_u20 = value; 4873 break; 4874 case M32C_OPERAND_DSP_48_U24 : 4875 fields->f_dsp_48_u24 = value; 4876 break; 4877 case M32C_OPERAND_DSP_48_U8 : 4878 fields->f_dsp_48_u8 = value; 4879 break; 4880 case M32C_OPERAND_DSP_8_S24 : 4881 fields->f_dsp_8_s24 = value; 4882 break; 4883 case M32C_OPERAND_DSP_8_S8 : 4884 fields->f_dsp_8_s8 = value; 4885 break; 4886 case M32C_OPERAND_DSP_8_U16 : 4887 fields->f_dsp_8_u16 = value; 4888 break; 4889 case M32C_OPERAND_DSP_8_U24 : 4890 fields->f_dsp_8_u24 = value; 4891 break; 4892 case M32C_OPERAND_DSP_8_U6 : 4893 fields->f_dsp_8_u6 = value; 4894 break; 4895 case M32C_OPERAND_DSP_8_U8 : 4896 fields->f_dsp_8_u8 = value; 4897 break; 4898 case M32C_OPERAND_DST16AN : 4899 fields->f_dst16_an = value; 4900 break; 4901 case M32C_OPERAND_DST16AN_S : 4902 fields->f_dst16_an_s = value; 4903 break; 4904 case M32C_OPERAND_DST16ANHI : 4905 fields->f_dst16_an = value; 4906 break; 4907 case M32C_OPERAND_DST16ANQI : 4908 fields->f_dst16_an = value; 4909 break; 4910 case M32C_OPERAND_DST16ANQI_S : 4911 fields->f_dst16_rn_QI_s = value; 4912 break; 4913 case M32C_OPERAND_DST16ANSI : 4914 fields->f_dst16_an = value; 4915 break; 4916 case M32C_OPERAND_DST16RNEXTQI : 4917 fields->f_dst16_rn_ext = value; 4918 break; 4919 case M32C_OPERAND_DST16RNHI : 4920 fields->f_dst16_rn = value; 4921 break; 4922 case M32C_OPERAND_DST16RNQI : 4923 fields->f_dst16_rn = value; 4924 break; 4925 case M32C_OPERAND_DST16RNQI_S : 4926 fields->f_dst16_rn_QI_s = value; 4927 break; 4928 case M32C_OPERAND_DST16RNSI : 4929 fields->f_dst16_rn = value; 4930 break; 4931 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 4932 fields->f_dst32_an_unprefixed = value; 4933 break; 4934 case M32C_OPERAND_DST32ANPREFIXED : 4935 fields->f_dst32_an_prefixed = value; 4936 break; 4937 case M32C_OPERAND_DST32ANPREFIXEDHI : 4938 fields->f_dst32_an_prefixed = value; 4939 break; 4940 case M32C_OPERAND_DST32ANPREFIXEDQI : 4941 fields->f_dst32_an_prefixed = value; 4942 break; 4943 case M32C_OPERAND_DST32ANPREFIXEDSI : 4944 fields->f_dst32_an_prefixed = value; 4945 break; 4946 case M32C_OPERAND_DST32ANUNPREFIXED : 4947 fields->f_dst32_an_unprefixed = value; 4948 break; 4949 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 4950 fields->f_dst32_an_unprefixed = value; 4951 break; 4952 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 4953 fields->f_dst32_an_unprefixed = value; 4954 break; 4955 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 4956 fields->f_dst32_an_unprefixed = value; 4957 break; 4958 case M32C_OPERAND_DST32R0HI_S : 4959 break; 4960 case M32C_OPERAND_DST32R0QI_S : 4961 break; 4962 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 4963 fields->f_dst32_rn_ext_unprefixed = value; 4964 break; 4965 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 4966 fields->f_dst32_rn_ext_unprefixed = value; 4967 break; 4968 case M32C_OPERAND_DST32RNPREFIXEDHI : 4969 fields->f_dst32_rn_prefixed_HI = value; 4970 break; 4971 case M32C_OPERAND_DST32RNPREFIXEDQI : 4972 fields->f_dst32_rn_prefixed_QI = value; 4973 break; 4974 case M32C_OPERAND_DST32RNPREFIXEDSI : 4975 fields->f_dst32_rn_prefixed_SI = value; 4976 break; 4977 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 4978 fields->f_dst32_rn_unprefixed_HI = value; 4979 break; 4980 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 4981 fields->f_dst32_rn_unprefixed_QI = value; 4982 break; 4983 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 4984 fields->f_dst32_rn_unprefixed_SI = value; 4985 break; 4986 case M32C_OPERAND_G : 4987 break; 4988 case M32C_OPERAND_IMM_12_S4 : 4989 fields->f_imm_12_s4 = value; 4990 break; 4991 case M32C_OPERAND_IMM_12_S4N : 4992 fields->f_imm_12_s4 = value; 4993 break; 4994 case M32C_OPERAND_IMM_13_U3 : 4995 fields->f_imm_13_u3 = value; 4996 break; 4997 case M32C_OPERAND_IMM_16_HI : 4998 fields->f_dsp_16_s16 = value; 4999 break; 5000 case M32C_OPERAND_IMM_16_QI : 5001 fields->f_dsp_16_s8 = value; 5002 break; 5003 case M32C_OPERAND_IMM_16_SI : 5004 fields->f_dsp_16_s32 = value; 5005 break; 5006 case M32C_OPERAND_IMM_20_S4 : 5007 fields->f_imm_20_s4 = value; 5008 break; 5009 case M32C_OPERAND_IMM_24_HI : 5010 fields->f_dsp_24_s16 = value; 5011 break; 5012 case M32C_OPERAND_IMM_24_QI : 5013 fields->f_dsp_24_s8 = value; 5014 break; 5015 case M32C_OPERAND_IMM_24_SI : 5016 fields->f_dsp_24_s32 = value; 5017 break; 5018 case M32C_OPERAND_IMM_32_HI : 5019 fields->f_dsp_32_s16 = value; 5020 break; 5021 case M32C_OPERAND_IMM_32_QI : 5022 fields->f_dsp_32_s8 = value; 5023 break; 5024 case M32C_OPERAND_IMM_32_SI : 5025 fields->f_dsp_32_s32 = value; 5026 break; 5027 case M32C_OPERAND_IMM_40_HI : 5028 fields->f_dsp_40_s16 = value; 5029 break; 5030 case M32C_OPERAND_IMM_40_QI : 5031 fields->f_dsp_40_s8 = value; 5032 break; 5033 case M32C_OPERAND_IMM_40_SI : 5034 fields->f_dsp_40_s32 = value; 5035 break; 5036 case M32C_OPERAND_IMM_48_HI : 5037 fields->f_dsp_48_s16 = value; 5038 break; 5039 case M32C_OPERAND_IMM_48_QI : 5040 fields->f_dsp_48_s8 = value; 5041 break; 5042 case M32C_OPERAND_IMM_48_SI : 5043 fields->f_dsp_48_s32 = value; 5044 break; 5045 case M32C_OPERAND_IMM_56_HI : 5046 fields->f_dsp_56_s16 = value; 5047 break; 5048 case M32C_OPERAND_IMM_56_QI : 5049 fields->f_dsp_56_s8 = value; 5050 break; 5051 case M32C_OPERAND_IMM_64_HI : 5052 fields->f_dsp_64_s16 = value; 5053 break; 5054 case M32C_OPERAND_IMM_8_HI : 5055 fields->f_dsp_8_s16 = value; 5056 break; 5057 case M32C_OPERAND_IMM_8_QI : 5058 fields->f_dsp_8_s8 = value; 5059 break; 5060 case M32C_OPERAND_IMM_8_S4 : 5061 fields->f_imm_8_s4 = value; 5062 break; 5063 case M32C_OPERAND_IMM_8_S4N : 5064 fields->f_imm_8_s4 = value; 5065 break; 5066 case M32C_OPERAND_IMM_SH_12_S4 : 5067 fields->f_imm_12_s4 = value; 5068 break; 5069 case M32C_OPERAND_IMM_SH_20_S4 : 5070 fields->f_imm_20_s4 = value; 5071 break; 5072 case M32C_OPERAND_IMM_SH_8_S4 : 5073 fields->f_imm_8_s4 = value; 5074 break; 5075 case M32C_OPERAND_IMM1_S : 5076 fields->f_imm1_S = value; 5077 break; 5078 case M32C_OPERAND_IMM3_S : 5079 fields->f_imm3_S = value; 5080 break; 5081 case M32C_OPERAND_LAB_16_8 : 5082 fields->f_lab_16_8 = value; 5083 break; 5084 case M32C_OPERAND_LAB_24_8 : 5085 fields->f_lab_24_8 = value; 5086 break; 5087 case M32C_OPERAND_LAB_32_8 : 5088 fields->f_lab_32_8 = value; 5089 break; 5090 case M32C_OPERAND_LAB_40_8 : 5091 fields->f_lab_40_8 = value; 5092 break; 5093 case M32C_OPERAND_LAB_5_3 : 5094 fields->f_lab_5_3 = value; 5095 break; 5096 case M32C_OPERAND_LAB_8_16 : 5097 fields->f_lab_8_16 = value; 5098 break; 5099 case M32C_OPERAND_LAB_8_24 : 5100 fields->f_lab_8_24 = value; 5101 break; 5102 case M32C_OPERAND_LAB_8_8 : 5103 fields->f_lab_8_8 = value; 5104 break; 5105 case M32C_OPERAND_LAB32_JMP_S : 5106 fields->f_lab32_jmp_s = value; 5107 break; 5108 case M32C_OPERAND_Q : 5109 break; 5110 case M32C_OPERAND_R0 : 5111 break; 5112 case M32C_OPERAND_R0H : 5113 break; 5114 case M32C_OPERAND_R0L : 5115 break; 5116 case M32C_OPERAND_R1 : 5117 break; 5118 case M32C_OPERAND_R1R2R0 : 5119 break; 5120 case M32C_OPERAND_R2 : 5121 break; 5122 case M32C_OPERAND_R2R0 : 5123 break; 5124 case M32C_OPERAND_R3 : 5125 break; 5126 case M32C_OPERAND_R3R1 : 5127 break; 5128 case M32C_OPERAND_REGSETPOP : 5129 fields->f_8_8 = value; 5130 break; 5131 case M32C_OPERAND_REGSETPUSH : 5132 fields->f_8_8 = value; 5133 break; 5134 case M32C_OPERAND_RN16_PUSH_S : 5135 fields->f_4_1 = value; 5136 break; 5137 case M32C_OPERAND_S : 5138 break; 5139 case M32C_OPERAND_SRC16AN : 5140 fields->f_src16_an = value; 5141 break; 5142 case M32C_OPERAND_SRC16ANHI : 5143 fields->f_src16_an = value; 5144 break; 5145 case M32C_OPERAND_SRC16ANQI : 5146 fields->f_src16_an = value; 5147 break; 5148 case M32C_OPERAND_SRC16RNHI : 5149 fields->f_src16_rn = value; 5150 break; 5151 case M32C_OPERAND_SRC16RNQI : 5152 fields->f_src16_rn = value; 5153 break; 5154 case M32C_OPERAND_SRC32ANPREFIXED : 5155 fields->f_src32_an_prefixed = value; 5156 break; 5157 case M32C_OPERAND_SRC32ANPREFIXEDHI : 5158 fields->f_src32_an_prefixed = value; 5159 break; 5160 case M32C_OPERAND_SRC32ANPREFIXEDQI : 5161 fields->f_src32_an_prefixed = value; 5162 break; 5163 case M32C_OPERAND_SRC32ANPREFIXEDSI : 5164 fields->f_src32_an_prefixed = value; 5165 break; 5166 case M32C_OPERAND_SRC32ANUNPREFIXED : 5167 fields->f_src32_an_unprefixed = value; 5168 break; 5169 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 5170 fields->f_src32_an_unprefixed = value; 5171 break; 5172 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 5173 fields->f_src32_an_unprefixed = value; 5174 break; 5175 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 5176 fields->f_src32_an_unprefixed = value; 5177 break; 5178 case M32C_OPERAND_SRC32RNPREFIXEDHI : 5179 fields->f_src32_rn_prefixed_HI = value; 5180 break; 5181 case M32C_OPERAND_SRC32RNPREFIXEDQI : 5182 fields->f_src32_rn_prefixed_QI = value; 5183 break; 5184 case M32C_OPERAND_SRC32RNPREFIXEDSI : 5185 fields->f_src32_rn_prefixed_SI = value; 5186 break; 5187 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 5188 fields->f_src32_rn_unprefixed_HI = value; 5189 break; 5190 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 5191 fields->f_src32_rn_unprefixed_QI = value; 5192 break; 5193 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 5194 fields->f_src32_rn_unprefixed_SI = value; 5195 break; 5196 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 5197 fields->f_5_1 = value; 5198 break; 5199 case M32C_OPERAND_X : 5200 break; 5201 case M32C_OPERAND_Z : 5202 break; 5203 case M32C_OPERAND_COND16_16 : 5204 fields->f_dsp_16_u8 = value; 5205 break; 5206 case M32C_OPERAND_COND16_24 : 5207 fields->f_dsp_24_u8 = value; 5208 break; 5209 case M32C_OPERAND_COND16_32 : 5210 fields->f_dsp_32_u8 = value; 5211 break; 5212 case M32C_OPERAND_COND16C : 5213 fields->f_cond16 = value; 5214 break; 5215 case M32C_OPERAND_COND16J : 5216 fields->f_cond16 = value; 5217 break; 5218 case M32C_OPERAND_COND16J5 : 5219 fields->f_cond16j_5 = value; 5220 break; 5221 case M32C_OPERAND_COND32 : 5222 fields->f_cond32 = value; 5223 break; 5224 case M32C_OPERAND_COND32_16 : 5225 fields->f_dsp_16_u8 = value; 5226 break; 5227 case M32C_OPERAND_COND32_24 : 5228 fields->f_dsp_24_u8 = value; 5229 break; 5230 case M32C_OPERAND_COND32_32 : 5231 fields->f_dsp_32_u8 = value; 5232 break; 5233 case M32C_OPERAND_COND32_40 : 5234 fields->f_dsp_40_u8 = value; 5235 break; 5236 case M32C_OPERAND_COND32J : 5237 fields->f_cond32j = value; 5238 break; 5239 case M32C_OPERAND_CR1_PREFIXED_32 : 5240 fields->f_21_3 = value; 5241 break; 5242 case M32C_OPERAND_CR1_UNPREFIXED_32 : 5243 fields->f_13_3 = value; 5244 break; 5245 case M32C_OPERAND_CR16 : 5246 fields->f_9_3 = value; 5247 break; 5248 case M32C_OPERAND_CR2_32 : 5249 fields->f_13_3 = value; 5250 break; 5251 case M32C_OPERAND_CR3_PREFIXED_32 : 5252 fields->f_21_3 = value; 5253 break; 5254 case M32C_OPERAND_CR3_UNPREFIXED_32 : 5255 fields->f_13_3 = value; 5256 break; 5257 case M32C_OPERAND_FLAGS16 : 5258 fields->f_9_3 = value; 5259 break; 5260 case M32C_OPERAND_FLAGS32 : 5261 fields->f_13_3 = value; 5262 break; 5263 case M32C_OPERAND_SCCOND32 : 5264 fields->f_cond16 = value; 5265 break; 5266 case M32C_OPERAND_SIZE : 5267 break; 5268 5269 default : 5270 /* xgettext:c-format */ 5271 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 5272 opindex); 5273 abort (); 5274 } 5275 } 5276 5277 /* Function to call before using the instruction builder tables. */ 5278 5279 void 5280 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd) 5281 { 5282 cd->insert_handlers = & m32c_cgen_insert_handlers[0]; 5283 cd->extract_handlers = & m32c_cgen_extract_handlers[0]; 5284 5285 cd->insert_operand = m32c_cgen_insert_operand; 5286 cd->extract_operand = m32c_cgen_extract_operand; 5287 5288 cd->get_int_operand = m32c_cgen_get_int_operand; 5289 cd->set_int_operand = m32c_cgen_set_int_operand; 5290 cd->get_vma_operand = m32c_cgen_get_vma_operand; 5291 cd->set_vma_operand = m32c_cgen_set_vma_operand; 5292 } 5293
