1 /* Instruction building/extraction support for xc16x. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2014 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "xc16x-desc.h" 34 #include "xc16x-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift; 212 213 if (CGEN_INSN_LSB0_P) 214 shift = (word_offset + start + 1) - length; 215 else 216 shift = total_length - (word_offset + start + length); 217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 218 } 219 220 #else /* ! CGEN_INT_INSN_P */ 221 222 { 223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 224 225 insert_1 (cd, value, start, length, word_length, bufp); 226 } 227 228 #endif /* ! CGEN_INT_INSN_P */ 229 230 return NULL; 231 } 232 233 /* Default insn builder (insert handler). 234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 236 recorded in host byte order, otherwise BUFFER is an array of bytes 237 and the value is recorded in target byte order). 238 The result is an error message or NULL if success. */ 239 240 static const char * 241 insert_insn_normal (CGEN_CPU_DESC cd, 242 const CGEN_INSN * insn, 243 CGEN_FIELDS * fields, 244 CGEN_INSN_BYTES_PTR buffer, 245 bfd_vma pc) 246 { 247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 248 unsigned long value; 249 const CGEN_SYNTAX_CHAR_TYPE * syn; 250 251 CGEN_INIT_INSERT (cd); 252 value = CGEN_INSN_BASE_VALUE (insn); 253 254 /* If we're recording insns as numbers (rather than a string of bytes), 255 target byte order handling is deferred until later. */ 256 257 #if CGEN_INT_INSN_P 258 259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 260 CGEN_FIELDS_BITSIZE (fields), value); 261 262 #else 263 264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 265 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 266 value); 267 268 #endif /* ! CGEN_INT_INSN_P */ 269 270 /* ??? It would be better to scan the format's fields. 271 Still need to be able to insert a value based on the operand though; 272 e.g. storing a branch displacement that got resolved later. 273 Needs more thought first. */ 274 275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 276 { 277 const char *errmsg; 278 279 if (CGEN_SYNTAX_CHAR_P (* syn)) 280 continue; 281 282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 283 fields, buffer, pc); 284 if (errmsg) 285 return errmsg; 286 } 287 288 return NULL; 289 } 290 291 #if CGEN_INT_INSN_P 292 /* Cover function to store an insn value into an integral insn. Must go here 293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 294 295 static void 296 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 297 CGEN_INSN_BYTES_PTR buf, 298 int length, 299 int insn_length, 300 CGEN_INSN_INT value) 301 { 302 /* For architectures with insns smaller than the base-insn-bitsize, 303 length may be too big. */ 304 if (length > insn_length) 305 *buf = value; 306 else 307 { 308 int shift = insn_length - length; 309 /* Written this way to avoid undefined behaviour. */ 310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 311 312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 313 } 314 } 315 #endif 316 317 /* Operand extraction. */ 319 320 #if ! CGEN_INT_INSN_P 321 322 /* Subroutine of extract_normal. 323 Ensure sufficient bytes are cached in EX_INFO. 324 OFFSET is the offset in bytes from the start of the insn of the value. 325 BYTES is the length of the needed value. 326 Returns 1 for success, 0 for failure. */ 327 328 static CGEN_INLINE int 329 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 330 CGEN_EXTRACT_INFO *ex_info, 331 int offset, 332 int bytes, 333 bfd_vma pc) 334 { 335 /* It's doubtful that the middle part has already been fetched so 336 we don't optimize that case. kiss. */ 337 unsigned int mask; 338 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 339 340 /* First do a quick check. */ 341 mask = (1 << bytes) - 1; 342 if (((ex_info->valid >> offset) & mask) == mask) 343 return 1; 344 345 /* Search for the first byte we need to read. */ 346 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 347 if (! (mask & ex_info->valid)) 348 break; 349 350 if (bytes) 351 { 352 int status; 353 354 pc += offset; 355 status = (*info->read_memory_func) 356 (pc, ex_info->insn_bytes + offset, bytes, info); 357 358 if (status != 0) 359 { 360 (*info->memory_error_func) (status, pc, info); 361 return 0; 362 } 363 364 ex_info->valid |= ((1 << bytes) - 1) << offset; 365 } 366 367 return 1; 368 } 369 370 /* Subroutine of extract_normal. */ 371 372 static CGEN_INLINE long 373 extract_1 (CGEN_CPU_DESC cd, 374 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 375 int start, 376 int length, 377 int word_length, 378 unsigned char *bufp, 379 bfd_vma pc ATTRIBUTE_UNUSED) 380 { 381 unsigned long x; 382 int shift; 383 384 x = cgen_get_insn_value (cd, bufp, word_length); 385 386 if (CGEN_INSN_LSB0_P) 387 shift = (start + 1) - length; 388 else 389 shift = (word_length - (start + length)); 390 return x >> shift; 391 } 392 393 #endif /* ! CGEN_INT_INSN_P */ 394 395 /* Default extraction routine. 396 397 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 398 or sometimes less for cases like the m32r where the base insn size is 32 399 but some insns are 16 bits. 400 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 401 but for generality we take a bitmask of all of them. 402 WORD_OFFSET is the offset in bits from the start of the insn of the value. 403 WORD_LENGTH is the length of the word in bits in which the value resides. 404 START is the starting bit number in the word, architecture origin. 405 LENGTH is the length of VALUE in bits. 406 TOTAL_LENGTH is the total length of the insn in bits. 407 408 Returns 1 for success, 0 for failure. */ 409 410 /* ??? The return code isn't properly used. wip. */ 411 412 /* ??? This doesn't handle bfd_vma's. Create another function when 413 necessary. */ 414 415 static int 416 extract_normal (CGEN_CPU_DESC cd, 417 #if ! CGEN_INT_INSN_P 418 CGEN_EXTRACT_INFO *ex_info, 419 #else 420 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 421 #endif 422 CGEN_INSN_INT insn_value, 423 unsigned int attrs, 424 unsigned int word_offset, 425 unsigned int start, 426 unsigned int length, 427 unsigned int word_length, 428 unsigned int total_length, 429 #if ! CGEN_INT_INSN_P 430 bfd_vma pc, 431 #else 432 bfd_vma pc ATTRIBUTE_UNUSED, 433 #endif 434 long *valuep) 435 { 436 long value, mask; 437 438 /* If LENGTH is zero, this operand doesn't contribute to the value 439 so give it a standard value of zero. */ 440 if (length == 0) 441 { 442 *valuep = 0; 443 return 1; 444 } 445 446 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 447 abort (); 448 449 /* For architectures with insns smaller than the insn-base-bitsize, 450 word_length may be too big. */ 451 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 452 { 453 if (word_offset + word_length > total_length) 454 word_length = total_length - word_offset; 455 } 456 457 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 458 459 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 460 { 461 if (CGEN_INSN_LSB0_P) 462 value = insn_value >> ((word_offset + start + 1) - length); 463 else 464 value = insn_value >> (total_length - ( word_offset + start + length)); 465 } 466 467 #if ! CGEN_INT_INSN_P 468 469 else 470 { 471 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 472 473 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 474 abort (); 475 476 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 477 return 0; 478 479 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 480 } 481 482 #endif /* ! CGEN_INT_INSN_P */ 483 484 /* Written this way to avoid undefined behaviour. */ 485 mask = (((1L << (length - 1)) - 1) << 1) | 1; 486 487 value &= mask; 488 /* sign extend? */ 489 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 490 && (value & (1L << (length - 1)))) 491 value |= ~mask; 492 493 *valuep = value; 494 495 return 1; 496 } 497 498 /* Default insn extractor. 499 500 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 501 The extracted fields are stored in FIELDS. 502 EX_INFO is used to handle reading variable length insns. 503 Return the length of the insn in bits, or 0 if no match, 504 or -1 if an error occurs fetching data (memory_error_func will have 505 been called). */ 506 507 static int 508 extract_insn_normal (CGEN_CPU_DESC cd, 509 const CGEN_INSN *insn, 510 CGEN_EXTRACT_INFO *ex_info, 511 CGEN_INSN_INT insn_value, 512 CGEN_FIELDS *fields, 513 bfd_vma pc) 514 { 515 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 516 const CGEN_SYNTAX_CHAR_TYPE *syn; 517 518 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 519 520 CGEN_INIT_EXTRACT (cd); 521 522 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 523 { 524 int length; 525 526 if (CGEN_SYNTAX_CHAR_P (*syn)) 527 continue; 528 529 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 530 ex_info, insn_value, fields, pc); 531 if (length <= 0) 532 return length; 533 } 534 535 /* We recognized and successfully extracted this insn. */ 536 return CGEN_INSN_BITSIZE (insn); 537 } 538 539 /* Machine generated code added here. */ 541 542 const char * xc16x_cgen_insert_operand 543 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 544 545 /* Main entry point for operand insertion. 546 547 This function is basically just a big switch statement. Earlier versions 548 used tables to look up the function to use, but 549 - if the table contains both assembler and disassembler functions then 550 the disassembler contains much of the assembler and vice-versa, 551 - there's a lot of inlining possibilities as things grow, 552 - using a switch statement avoids the function call overhead. 553 554 This function could be moved into `parse_insn_normal', but keeping it 555 separate makes clear the interface between `parse_insn_normal' and each of 556 the handlers. It's also needed by GAS to insert operands that couldn't be 557 resolved during parsing. */ 558 559 const char * 560 xc16x_cgen_insert_operand (CGEN_CPU_DESC cd, 561 int opindex, 562 CGEN_FIELDS * fields, 563 CGEN_INSN_BYTES_PTR buffer, 564 bfd_vma pc ATTRIBUTE_UNUSED) 565 { 566 const char * errmsg = NULL; 567 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 568 569 switch (opindex) 570 { 571 case XC16X_OPERAND_REGNAM : 572 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 573 break; 574 case XC16X_OPERAND_BIT01 : 575 errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer); 576 break; 577 case XC16X_OPERAND_BIT1 : 578 errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer); 579 break; 580 case XC16X_OPERAND_BIT2 : 581 errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer); 582 break; 583 case XC16X_OPERAND_BIT4 : 584 errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer); 585 break; 586 case XC16X_OPERAND_BIT8 : 587 errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer); 588 break; 589 case XC16X_OPERAND_BITONE : 590 errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer); 591 break; 592 case XC16X_OPERAND_CADDR : 593 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 594 break; 595 case XC16X_OPERAND_COND : 596 errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer); 597 break; 598 case XC16X_OPERAND_DATA8 : 599 errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer); 600 break; 601 case XC16X_OPERAND_DATAHI8 : 602 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 603 break; 604 case XC16X_OPERAND_DOT : 605 break; 606 case XC16X_OPERAND_DR : 607 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 608 break; 609 case XC16X_OPERAND_DRB : 610 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 611 break; 612 case XC16X_OPERAND_DRI : 613 errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer); 614 break; 615 case XC16X_OPERAND_EXTCOND : 616 errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer); 617 break; 618 case XC16X_OPERAND_GENREG : 619 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 620 break; 621 case XC16X_OPERAND_HASH : 622 break; 623 case XC16X_OPERAND_ICOND : 624 errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer); 625 break; 626 case XC16X_OPERAND_LBIT2 : 627 errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer); 628 break; 629 case XC16X_OPERAND_LBIT4 : 630 errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer); 631 break; 632 case XC16X_OPERAND_MASK8 : 633 errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer); 634 break; 635 case XC16X_OPERAND_MASKLO8 : 636 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 637 break; 638 case XC16X_OPERAND_MEMGR8 : 639 errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer); 640 break; 641 case XC16X_OPERAND_MEMORY : 642 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 643 break; 644 case XC16X_OPERAND_PAG : 645 break; 646 case XC16X_OPERAND_PAGENUM : 647 errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer); 648 break; 649 case XC16X_OPERAND_POF : 650 break; 651 case XC16X_OPERAND_QBIT : 652 errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer); 653 break; 654 case XC16X_OPERAND_QHIBIT : 655 errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer); 656 break; 657 case XC16X_OPERAND_QLOBIT : 658 errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer); 659 break; 660 case XC16X_OPERAND_REG8 : 661 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 662 break; 663 case XC16X_OPERAND_REGB8 : 664 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 665 break; 666 case XC16X_OPERAND_REGBMEM8 : 667 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 668 break; 669 case XC16X_OPERAND_REGHI8 : 670 errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer); 671 break; 672 case XC16X_OPERAND_REGMEM8 : 673 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 674 break; 675 case XC16X_OPERAND_REGOFF8 : 676 errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer); 677 break; 678 case XC16X_OPERAND_REL : 679 errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer); 680 break; 681 case XC16X_OPERAND_RELHI : 682 errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer); 683 break; 684 case XC16X_OPERAND_SEG : 685 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 686 break; 687 case XC16X_OPERAND_SEGHI8 : 688 errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer); 689 break; 690 case XC16X_OPERAND_SEGM : 691 break; 692 case XC16X_OPERAND_SOF : 693 break; 694 case XC16X_OPERAND_SR : 695 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 696 break; 697 case XC16X_OPERAND_SR2 : 698 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer); 699 break; 700 case XC16X_OPERAND_SRB : 701 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 702 break; 703 case XC16X_OPERAND_SRC1 : 704 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 705 break; 706 case XC16X_OPERAND_SRC2 : 707 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 708 break; 709 case XC16X_OPERAND_SRDIV : 710 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 711 break; 712 case XC16X_OPERAND_U4 : 713 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 714 break; 715 case XC16X_OPERAND_UIMM16 : 716 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 717 break; 718 case XC16X_OPERAND_UIMM2 : 719 errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer); 720 break; 721 case XC16X_OPERAND_UIMM3 : 722 errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer); 723 break; 724 case XC16X_OPERAND_UIMM4 : 725 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 726 break; 727 case XC16X_OPERAND_UIMM7 : 728 errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer); 729 break; 730 case XC16X_OPERAND_UIMM8 : 731 errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer); 732 break; 733 case XC16X_OPERAND_UPAG16 : 734 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 735 break; 736 case XC16X_OPERAND_UPOF16 : 737 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 738 break; 739 case XC16X_OPERAND_USEG16 : 740 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 741 break; 742 case XC16X_OPERAND_USEG8 : 743 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 744 break; 745 case XC16X_OPERAND_USOF16 : 746 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 747 break; 748 749 default : 750 /* xgettext:c-format */ 751 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 752 opindex); 753 abort (); 754 } 755 756 return errmsg; 757 } 758 759 int xc16x_cgen_extract_operand 760 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 761 762 /* Main entry point for operand extraction. 763 The result is <= 0 for error, >0 for success. 764 ??? Actual values aren't well defined right now. 765 766 This function is basically just a big switch statement. Earlier versions 767 used tables to look up the function to use, but 768 - if the table contains both assembler and disassembler functions then 769 the disassembler contains much of the assembler and vice-versa, 770 - there's a lot of inlining possibilities as things grow, 771 - using a switch statement avoids the function call overhead. 772 773 This function could be moved into `print_insn_normal', but keeping it 774 separate makes clear the interface between `print_insn_normal' and each of 775 the handlers. */ 776 777 int 778 xc16x_cgen_extract_operand (CGEN_CPU_DESC cd, 779 int opindex, 780 CGEN_EXTRACT_INFO *ex_info, 781 CGEN_INSN_INT insn_value, 782 CGEN_FIELDS * fields, 783 bfd_vma pc) 784 { 785 /* Assume success (for those operands that are nops). */ 786 int length = 1; 787 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 788 789 switch (opindex) 790 { 791 case XC16X_OPERAND_REGNAM : 792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 793 break; 794 case XC16X_OPERAND_BIT01 : 795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit); 796 break; 797 case XC16X_OPERAND_BIT1 : 798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1); 799 break; 800 case XC16X_OPERAND_BIT2 : 801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2); 802 break; 803 case XC16X_OPERAND_BIT4 : 804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4); 805 break; 806 case XC16X_OPERAND_BIT8 : 807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8); 808 break; 809 case XC16X_OPERAND_BITONE : 810 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit); 811 break; 812 case XC16X_OPERAND_CADDR : 813 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 814 break; 815 case XC16X_OPERAND_COND : 816 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode); 817 break; 818 case XC16X_OPERAND_DATA8 : 819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8); 820 break; 821 case XC16X_OPERAND_DATAHI8 : 822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 823 break; 824 case XC16X_OPERAND_DOT : 825 break; 826 case XC16X_OPERAND_DR : 827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 828 break; 829 case XC16X_OPERAND_DRB : 830 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 831 break; 832 case XC16X_OPERAND_DRI : 833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4); 834 break; 835 case XC16X_OPERAND_EXTCOND : 836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode); 837 break; 838 case XC16X_OPERAND_GENREG : 839 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 840 break; 841 case XC16X_OPERAND_HASH : 842 break; 843 case XC16X_OPERAND_ICOND : 844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode); 845 break; 846 case XC16X_OPERAND_LBIT2 : 847 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2); 848 break; 849 case XC16X_OPERAND_LBIT4 : 850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4); 851 break; 852 case XC16X_OPERAND_MASK8 : 853 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8); 854 break; 855 case XC16X_OPERAND_MASKLO8 : 856 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 857 break; 858 case XC16X_OPERAND_MEMGR8 : 859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8); 860 break; 861 case XC16X_OPERAND_MEMORY : 862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 863 break; 864 case XC16X_OPERAND_PAG : 865 break; 866 case XC16X_OPERAND_PAGENUM : 867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum); 868 break; 869 case XC16X_OPERAND_POF : 870 break; 871 case XC16X_OPERAND_QBIT : 872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit); 873 break; 874 case XC16X_OPERAND_QHIBIT : 875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit); 876 break; 877 case XC16X_OPERAND_QLOBIT : 878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit); 879 break; 880 case XC16X_OPERAND_REG8 : 881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 882 break; 883 case XC16X_OPERAND_REGB8 : 884 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 885 break; 886 case XC16X_OPERAND_REGBMEM8 : 887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 888 break; 889 case XC16X_OPERAND_REGHI8 : 890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8); 891 break; 892 case XC16X_OPERAND_REGMEM8 : 893 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 894 break; 895 case XC16X_OPERAND_REGOFF8 : 896 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8); 897 break; 898 case XC16X_OPERAND_REL : 899 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8); 900 break; 901 case XC16X_OPERAND_RELHI : 902 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8); 903 break; 904 case XC16X_OPERAND_SEG : 905 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 906 break; 907 case XC16X_OPERAND_SEGHI8 : 908 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8); 909 break; 910 case XC16X_OPERAND_SEGM : 911 break; 912 case XC16X_OPERAND_SOF : 913 break; 914 case XC16X_OPERAND_SR : 915 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 916 break; 917 case XC16X_OPERAND_SR2 : 918 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0); 919 break; 920 case XC16X_OPERAND_SRB : 921 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 922 break; 923 case XC16X_OPERAND_SRC1 : 924 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 925 break; 926 case XC16X_OPERAND_SRC2 : 927 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 928 break; 929 case XC16X_OPERAND_SRDIV : 930 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 931 break; 932 case XC16X_OPERAND_U4 : 933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 934 break; 935 case XC16X_OPERAND_UIMM16 : 936 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 937 break; 938 case XC16X_OPERAND_UIMM2 : 939 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2); 940 break; 941 case XC16X_OPERAND_UIMM3 : 942 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3); 943 break; 944 case XC16X_OPERAND_UIMM4 : 945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 946 break; 947 case XC16X_OPERAND_UIMM7 : 948 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7); 949 break; 950 case XC16X_OPERAND_UIMM8 : 951 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8); 952 break; 953 case XC16X_OPERAND_UPAG16 : 954 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 955 break; 956 case XC16X_OPERAND_UPOF16 : 957 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 958 break; 959 case XC16X_OPERAND_USEG16 : 960 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 961 break; 962 case XC16X_OPERAND_USEG8 : 963 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 964 break; 965 case XC16X_OPERAND_USOF16 : 966 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 967 break; 968 969 default : 970 /* xgettext:c-format */ 971 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 972 opindex); 973 abort (); 974 } 975 976 return length; 977 } 978 979 cgen_insert_fn * const xc16x_cgen_insert_handlers[] = 980 { 981 insert_insn_normal, 982 }; 983 984 cgen_extract_fn * const xc16x_cgen_extract_handlers[] = 985 { 986 extract_insn_normal, 987 }; 988 989 int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 990 bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 991 992 /* Getting values from cgen_fields is handled by a collection of functions. 993 They are distinguished by the type of the VALUE argument they return. 994 TODO: floating point, inlining support, remove cases where result type 995 not appropriate. */ 996 997 int 998 xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 999 int opindex, 1000 const CGEN_FIELDS * fields) 1001 { 1002 int value; 1003 1004 switch (opindex) 1005 { 1006 case XC16X_OPERAND_REGNAM : 1007 value = fields->f_reg8; 1008 break; 1009 case XC16X_OPERAND_BIT01 : 1010 value = fields->f_op_1bit; 1011 break; 1012 case XC16X_OPERAND_BIT1 : 1013 value = fields->f_op_bit1; 1014 break; 1015 case XC16X_OPERAND_BIT2 : 1016 value = fields->f_op_bit2; 1017 break; 1018 case XC16X_OPERAND_BIT4 : 1019 value = fields->f_op_bit4; 1020 break; 1021 case XC16X_OPERAND_BIT8 : 1022 value = fields->f_op_bit8; 1023 break; 1024 case XC16X_OPERAND_BITONE : 1025 value = fields->f_op_onebit; 1026 break; 1027 case XC16X_OPERAND_CADDR : 1028 value = fields->f_offset16; 1029 break; 1030 case XC16X_OPERAND_COND : 1031 value = fields->f_condcode; 1032 break; 1033 case XC16X_OPERAND_DATA8 : 1034 value = fields->f_data8; 1035 break; 1036 case XC16X_OPERAND_DATAHI8 : 1037 value = fields->f_datahi8; 1038 break; 1039 case XC16X_OPERAND_DOT : 1040 value = 0; 1041 break; 1042 case XC16X_OPERAND_DR : 1043 value = fields->f_r1; 1044 break; 1045 case XC16X_OPERAND_DRB : 1046 value = fields->f_r1; 1047 break; 1048 case XC16X_OPERAND_DRI : 1049 value = fields->f_r4; 1050 break; 1051 case XC16X_OPERAND_EXTCOND : 1052 value = fields->f_extccode; 1053 break; 1054 case XC16X_OPERAND_GENREG : 1055 value = fields->f_regb8; 1056 break; 1057 case XC16X_OPERAND_HASH : 1058 value = 0; 1059 break; 1060 case XC16X_OPERAND_ICOND : 1061 value = fields->f_icondcode; 1062 break; 1063 case XC16X_OPERAND_LBIT2 : 1064 value = fields->f_op_lbit2; 1065 break; 1066 case XC16X_OPERAND_LBIT4 : 1067 value = fields->f_op_lbit4; 1068 break; 1069 case XC16X_OPERAND_MASK8 : 1070 value = fields->f_mask8; 1071 break; 1072 case XC16X_OPERAND_MASKLO8 : 1073 value = fields->f_datahi8; 1074 break; 1075 case XC16X_OPERAND_MEMGR8 : 1076 value = fields->f_memgr8; 1077 break; 1078 case XC16X_OPERAND_MEMORY : 1079 value = fields->f_memory; 1080 break; 1081 case XC16X_OPERAND_PAG : 1082 value = 0; 1083 break; 1084 case XC16X_OPERAND_PAGENUM : 1085 value = fields->f_pagenum; 1086 break; 1087 case XC16X_OPERAND_POF : 1088 value = 0; 1089 break; 1090 case XC16X_OPERAND_QBIT : 1091 value = fields->f_qbit; 1092 break; 1093 case XC16X_OPERAND_QHIBIT : 1094 value = fields->f_qhibit; 1095 break; 1096 case XC16X_OPERAND_QLOBIT : 1097 value = fields->f_qlobit; 1098 break; 1099 case XC16X_OPERAND_REG8 : 1100 value = fields->f_reg8; 1101 break; 1102 case XC16X_OPERAND_REGB8 : 1103 value = fields->f_regb8; 1104 break; 1105 case XC16X_OPERAND_REGBMEM8 : 1106 value = fields->f_regmem8; 1107 break; 1108 case XC16X_OPERAND_REGHI8 : 1109 value = fields->f_reghi8; 1110 break; 1111 case XC16X_OPERAND_REGMEM8 : 1112 value = fields->f_regmem8; 1113 break; 1114 case XC16X_OPERAND_REGOFF8 : 1115 value = fields->f_regoff8; 1116 break; 1117 case XC16X_OPERAND_REL : 1118 value = fields->f_rel8; 1119 break; 1120 case XC16X_OPERAND_RELHI : 1121 value = fields->f_relhi8; 1122 break; 1123 case XC16X_OPERAND_SEG : 1124 value = fields->f_seg8; 1125 break; 1126 case XC16X_OPERAND_SEGHI8 : 1127 value = fields->f_segnum8; 1128 break; 1129 case XC16X_OPERAND_SEGM : 1130 value = 0; 1131 break; 1132 case XC16X_OPERAND_SOF : 1133 value = 0; 1134 break; 1135 case XC16X_OPERAND_SR : 1136 value = fields->f_r2; 1137 break; 1138 case XC16X_OPERAND_SR2 : 1139 value = fields->f_r0; 1140 break; 1141 case XC16X_OPERAND_SRB : 1142 value = fields->f_r2; 1143 break; 1144 case XC16X_OPERAND_SRC1 : 1145 value = fields->f_r1; 1146 break; 1147 case XC16X_OPERAND_SRC2 : 1148 value = fields->f_r2; 1149 break; 1150 case XC16X_OPERAND_SRDIV : 1151 value = fields->f_reg8; 1152 break; 1153 case XC16X_OPERAND_U4 : 1154 value = fields->f_uimm4; 1155 break; 1156 case XC16X_OPERAND_UIMM16 : 1157 value = fields->f_uimm16; 1158 break; 1159 case XC16X_OPERAND_UIMM2 : 1160 value = fields->f_uimm2; 1161 break; 1162 case XC16X_OPERAND_UIMM3 : 1163 value = fields->f_uimm3; 1164 break; 1165 case XC16X_OPERAND_UIMM4 : 1166 value = fields->f_uimm4; 1167 break; 1168 case XC16X_OPERAND_UIMM7 : 1169 value = fields->f_uimm7; 1170 break; 1171 case XC16X_OPERAND_UIMM8 : 1172 value = fields->f_uimm8; 1173 break; 1174 case XC16X_OPERAND_UPAG16 : 1175 value = fields->f_uimm16; 1176 break; 1177 case XC16X_OPERAND_UPOF16 : 1178 value = fields->f_memory; 1179 break; 1180 case XC16X_OPERAND_USEG16 : 1181 value = fields->f_offset16; 1182 break; 1183 case XC16X_OPERAND_USEG8 : 1184 value = fields->f_seg8; 1185 break; 1186 case XC16X_OPERAND_USOF16 : 1187 value = fields->f_offset16; 1188 break; 1189 1190 default : 1191 /* xgettext:c-format */ 1192 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1193 opindex); 1194 abort (); 1195 } 1196 1197 return value; 1198 } 1199 1200 bfd_vma 1201 xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1202 int opindex, 1203 const CGEN_FIELDS * fields) 1204 { 1205 bfd_vma value; 1206 1207 switch (opindex) 1208 { 1209 case XC16X_OPERAND_REGNAM : 1210 value = fields->f_reg8; 1211 break; 1212 case XC16X_OPERAND_BIT01 : 1213 value = fields->f_op_1bit; 1214 break; 1215 case XC16X_OPERAND_BIT1 : 1216 value = fields->f_op_bit1; 1217 break; 1218 case XC16X_OPERAND_BIT2 : 1219 value = fields->f_op_bit2; 1220 break; 1221 case XC16X_OPERAND_BIT4 : 1222 value = fields->f_op_bit4; 1223 break; 1224 case XC16X_OPERAND_BIT8 : 1225 value = fields->f_op_bit8; 1226 break; 1227 case XC16X_OPERAND_BITONE : 1228 value = fields->f_op_onebit; 1229 break; 1230 case XC16X_OPERAND_CADDR : 1231 value = fields->f_offset16; 1232 break; 1233 case XC16X_OPERAND_COND : 1234 value = fields->f_condcode; 1235 break; 1236 case XC16X_OPERAND_DATA8 : 1237 value = fields->f_data8; 1238 break; 1239 case XC16X_OPERAND_DATAHI8 : 1240 value = fields->f_datahi8; 1241 break; 1242 case XC16X_OPERAND_DOT : 1243 value = 0; 1244 break; 1245 case XC16X_OPERAND_DR : 1246 value = fields->f_r1; 1247 break; 1248 case XC16X_OPERAND_DRB : 1249 value = fields->f_r1; 1250 break; 1251 case XC16X_OPERAND_DRI : 1252 value = fields->f_r4; 1253 break; 1254 case XC16X_OPERAND_EXTCOND : 1255 value = fields->f_extccode; 1256 break; 1257 case XC16X_OPERAND_GENREG : 1258 value = fields->f_regb8; 1259 break; 1260 case XC16X_OPERAND_HASH : 1261 value = 0; 1262 break; 1263 case XC16X_OPERAND_ICOND : 1264 value = fields->f_icondcode; 1265 break; 1266 case XC16X_OPERAND_LBIT2 : 1267 value = fields->f_op_lbit2; 1268 break; 1269 case XC16X_OPERAND_LBIT4 : 1270 value = fields->f_op_lbit4; 1271 break; 1272 case XC16X_OPERAND_MASK8 : 1273 value = fields->f_mask8; 1274 break; 1275 case XC16X_OPERAND_MASKLO8 : 1276 value = fields->f_datahi8; 1277 break; 1278 case XC16X_OPERAND_MEMGR8 : 1279 value = fields->f_memgr8; 1280 break; 1281 case XC16X_OPERAND_MEMORY : 1282 value = fields->f_memory; 1283 break; 1284 case XC16X_OPERAND_PAG : 1285 value = 0; 1286 break; 1287 case XC16X_OPERAND_PAGENUM : 1288 value = fields->f_pagenum; 1289 break; 1290 case XC16X_OPERAND_POF : 1291 value = 0; 1292 break; 1293 case XC16X_OPERAND_QBIT : 1294 value = fields->f_qbit; 1295 break; 1296 case XC16X_OPERAND_QHIBIT : 1297 value = fields->f_qhibit; 1298 break; 1299 case XC16X_OPERAND_QLOBIT : 1300 value = fields->f_qlobit; 1301 break; 1302 case XC16X_OPERAND_REG8 : 1303 value = fields->f_reg8; 1304 break; 1305 case XC16X_OPERAND_REGB8 : 1306 value = fields->f_regb8; 1307 break; 1308 case XC16X_OPERAND_REGBMEM8 : 1309 value = fields->f_regmem8; 1310 break; 1311 case XC16X_OPERAND_REGHI8 : 1312 value = fields->f_reghi8; 1313 break; 1314 case XC16X_OPERAND_REGMEM8 : 1315 value = fields->f_regmem8; 1316 break; 1317 case XC16X_OPERAND_REGOFF8 : 1318 value = fields->f_regoff8; 1319 break; 1320 case XC16X_OPERAND_REL : 1321 value = fields->f_rel8; 1322 break; 1323 case XC16X_OPERAND_RELHI : 1324 value = fields->f_relhi8; 1325 break; 1326 case XC16X_OPERAND_SEG : 1327 value = fields->f_seg8; 1328 break; 1329 case XC16X_OPERAND_SEGHI8 : 1330 value = fields->f_segnum8; 1331 break; 1332 case XC16X_OPERAND_SEGM : 1333 value = 0; 1334 break; 1335 case XC16X_OPERAND_SOF : 1336 value = 0; 1337 break; 1338 case XC16X_OPERAND_SR : 1339 value = fields->f_r2; 1340 break; 1341 case XC16X_OPERAND_SR2 : 1342 value = fields->f_r0; 1343 break; 1344 case XC16X_OPERAND_SRB : 1345 value = fields->f_r2; 1346 break; 1347 case XC16X_OPERAND_SRC1 : 1348 value = fields->f_r1; 1349 break; 1350 case XC16X_OPERAND_SRC2 : 1351 value = fields->f_r2; 1352 break; 1353 case XC16X_OPERAND_SRDIV : 1354 value = fields->f_reg8; 1355 break; 1356 case XC16X_OPERAND_U4 : 1357 value = fields->f_uimm4; 1358 break; 1359 case XC16X_OPERAND_UIMM16 : 1360 value = fields->f_uimm16; 1361 break; 1362 case XC16X_OPERAND_UIMM2 : 1363 value = fields->f_uimm2; 1364 break; 1365 case XC16X_OPERAND_UIMM3 : 1366 value = fields->f_uimm3; 1367 break; 1368 case XC16X_OPERAND_UIMM4 : 1369 value = fields->f_uimm4; 1370 break; 1371 case XC16X_OPERAND_UIMM7 : 1372 value = fields->f_uimm7; 1373 break; 1374 case XC16X_OPERAND_UIMM8 : 1375 value = fields->f_uimm8; 1376 break; 1377 case XC16X_OPERAND_UPAG16 : 1378 value = fields->f_uimm16; 1379 break; 1380 case XC16X_OPERAND_UPOF16 : 1381 value = fields->f_memory; 1382 break; 1383 case XC16X_OPERAND_USEG16 : 1384 value = fields->f_offset16; 1385 break; 1386 case XC16X_OPERAND_USEG8 : 1387 value = fields->f_seg8; 1388 break; 1389 case XC16X_OPERAND_USOF16 : 1390 value = fields->f_offset16; 1391 break; 1392 1393 default : 1394 /* xgettext:c-format */ 1395 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1396 opindex); 1397 abort (); 1398 } 1399 1400 return value; 1401 } 1402 1403 void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1404 void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1405 1406 /* Stuffing values in cgen_fields is handled by a collection of functions. 1407 They are distinguished by the type of the VALUE argument they accept. 1408 TODO: floating point, inlining support, remove cases where argument type 1409 not appropriate. */ 1410 1411 void 1412 xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1413 int opindex, 1414 CGEN_FIELDS * fields, 1415 int value) 1416 { 1417 switch (opindex) 1418 { 1419 case XC16X_OPERAND_REGNAM : 1420 fields->f_reg8 = value; 1421 break; 1422 case XC16X_OPERAND_BIT01 : 1423 fields->f_op_1bit = value; 1424 break; 1425 case XC16X_OPERAND_BIT1 : 1426 fields->f_op_bit1 = value; 1427 break; 1428 case XC16X_OPERAND_BIT2 : 1429 fields->f_op_bit2 = value; 1430 break; 1431 case XC16X_OPERAND_BIT4 : 1432 fields->f_op_bit4 = value; 1433 break; 1434 case XC16X_OPERAND_BIT8 : 1435 fields->f_op_bit8 = value; 1436 break; 1437 case XC16X_OPERAND_BITONE : 1438 fields->f_op_onebit = value; 1439 break; 1440 case XC16X_OPERAND_CADDR : 1441 fields->f_offset16 = value; 1442 break; 1443 case XC16X_OPERAND_COND : 1444 fields->f_condcode = value; 1445 break; 1446 case XC16X_OPERAND_DATA8 : 1447 fields->f_data8 = value; 1448 break; 1449 case XC16X_OPERAND_DATAHI8 : 1450 fields->f_datahi8 = value; 1451 break; 1452 case XC16X_OPERAND_DOT : 1453 break; 1454 case XC16X_OPERAND_DR : 1455 fields->f_r1 = value; 1456 break; 1457 case XC16X_OPERAND_DRB : 1458 fields->f_r1 = value; 1459 break; 1460 case XC16X_OPERAND_DRI : 1461 fields->f_r4 = value; 1462 break; 1463 case XC16X_OPERAND_EXTCOND : 1464 fields->f_extccode = value; 1465 break; 1466 case XC16X_OPERAND_GENREG : 1467 fields->f_regb8 = value; 1468 break; 1469 case XC16X_OPERAND_HASH : 1470 break; 1471 case XC16X_OPERAND_ICOND : 1472 fields->f_icondcode = value; 1473 break; 1474 case XC16X_OPERAND_LBIT2 : 1475 fields->f_op_lbit2 = value; 1476 break; 1477 case XC16X_OPERAND_LBIT4 : 1478 fields->f_op_lbit4 = value; 1479 break; 1480 case XC16X_OPERAND_MASK8 : 1481 fields->f_mask8 = value; 1482 break; 1483 case XC16X_OPERAND_MASKLO8 : 1484 fields->f_datahi8 = value; 1485 break; 1486 case XC16X_OPERAND_MEMGR8 : 1487 fields->f_memgr8 = value; 1488 break; 1489 case XC16X_OPERAND_MEMORY : 1490 fields->f_memory = value; 1491 break; 1492 case XC16X_OPERAND_PAG : 1493 break; 1494 case XC16X_OPERAND_PAGENUM : 1495 fields->f_pagenum = value; 1496 break; 1497 case XC16X_OPERAND_POF : 1498 break; 1499 case XC16X_OPERAND_QBIT : 1500 fields->f_qbit = value; 1501 break; 1502 case XC16X_OPERAND_QHIBIT : 1503 fields->f_qhibit = value; 1504 break; 1505 case XC16X_OPERAND_QLOBIT : 1506 fields->f_qlobit = value; 1507 break; 1508 case XC16X_OPERAND_REG8 : 1509 fields->f_reg8 = value; 1510 break; 1511 case XC16X_OPERAND_REGB8 : 1512 fields->f_regb8 = value; 1513 break; 1514 case XC16X_OPERAND_REGBMEM8 : 1515 fields->f_regmem8 = value; 1516 break; 1517 case XC16X_OPERAND_REGHI8 : 1518 fields->f_reghi8 = value; 1519 break; 1520 case XC16X_OPERAND_REGMEM8 : 1521 fields->f_regmem8 = value; 1522 break; 1523 case XC16X_OPERAND_REGOFF8 : 1524 fields->f_regoff8 = value; 1525 break; 1526 case XC16X_OPERAND_REL : 1527 fields->f_rel8 = value; 1528 break; 1529 case XC16X_OPERAND_RELHI : 1530 fields->f_relhi8 = value; 1531 break; 1532 case XC16X_OPERAND_SEG : 1533 fields->f_seg8 = value; 1534 break; 1535 case XC16X_OPERAND_SEGHI8 : 1536 fields->f_segnum8 = value; 1537 break; 1538 case XC16X_OPERAND_SEGM : 1539 break; 1540 case XC16X_OPERAND_SOF : 1541 break; 1542 case XC16X_OPERAND_SR : 1543 fields->f_r2 = value; 1544 break; 1545 case XC16X_OPERAND_SR2 : 1546 fields->f_r0 = value; 1547 break; 1548 case XC16X_OPERAND_SRB : 1549 fields->f_r2 = value; 1550 break; 1551 case XC16X_OPERAND_SRC1 : 1552 fields->f_r1 = value; 1553 break; 1554 case XC16X_OPERAND_SRC2 : 1555 fields->f_r2 = value; 1556 break; 1557 case XC16X_OPERAND_SRDIV : 1558 fields->f_reg8 = value; 1559 break; 1560 case XC16X_OPERAND_U4 : 1561 fields->f_uimm4 = value; 1562 break; 1563 case XC16X_OPERAND_UIMM16 : 1564 fields->f_uimm16 = value; 1565 break; 1566 case XC16X_OPERAND_UIMM2 : 1567 fields->f_uimm2 = value; 1568 break; 1569 case XC16X_OPERAND_UIMM3 : 1570 fields->f_uimm3 = value; 1571 break; 1572 case XC16X_OPERAND_UIMM4 : 1573 fields->f_uimm4 = value; 1574 break; 1575 case XC16X_OPERAND_UIMM7 : 1576 fields->f_uimm7 = value; 1577 break; 1578 case XC16X_OPERAND_UIMM8 : 1579 fields->f_uimm8 = value; 1580 break; 1581 case XC16X_OPERAND_UPAG16 : 1582 fields->f_uimm16 = value; 1583 break; 1584 case XC16X_OPERAND_UPOF16 : 1585 fields->f_memory = value; 1586 break; 1587 case XC16X_OPERAND_USEG16 : 1588 fields->f_offset16 = value; 1589 break; 1590 case XC16X_OPERAND_USEG8 : 1591 fields->f_seg8 = value; 1592 break; 1593 case XC16X_OPERAND_USOF16 : 1594 fields->f_offset16 = value; 1595 break; 1596 1597 default : 1598 /* xgettext:c-format */ 1599 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1600 opindex); 1601 abort (); 1602 } 1603 } 1604 1605 void 1606 xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1607 int opindex, 1608 CGEN_FIELDS * fields, 1609 bfd_vma value) 1610 { 1611 switch (opindex) 1612 { 1613 case XC16X_OPERAND_REGNAM : 1614 fields->f_reg8 = value; 1615 break; 1616 case XC16X_OPERAND_BIT01 : 1617 fields->f_op_1bit = value; 1618 break; 1619 case XC16X_OPERAND_BIT1 : 1620 fields->f_op_bit1 = value; 1621 break; 1622 case XC16X_OPERAND_BIT2 : 1623 fields->f_op_bit2 = value; 1624 break; 1625 case XC16X_OPERAND_BIT4 : 1626 fields->f_op_bit4 = value; 1627 break; 1628 case XC16X_OPERAND_BIT8 : 1629 fields->f_op_bit8 = value; 1630 break; 1631 case XC16X_OPERAND_BITONE : 1632 fields->f_op_onebit = value; 1633 break; 1634 case XC16X_OPERAND_CADDR : 1635 fields->f_offset16 = value; 1636 break; 1637 case XC16X_OPERAND_COND : 1638 fields->f_condcode = value; 1639 break; 1640 case XC16X_OPERAND_DATA8 : 1641 fields->f_data8 = value; 1642 break; 1643 case XC16X_OPERAND_DATAHI8 : 1644 fields->f_datahi8 = value; 1645 break; 1646 case XC16X_OPERAND_DOT : 1647 break; 1648 case XC16X_OPERAND_DR : 1649 fields->f_r1 = value; 1650 break; 1651 case XC16X_OPERAND_DRB : 1652 fields->f_r1 = value; 1653 break; 1654 case XC16X_OPERAND_DRI : 1655 fields->f_r4 = value; 1656 break; 1657 case XC16X_OPERAND_EXTCOND : 1658 fields->f_extccode = value; 1659 break; 1660 case XC16X_OPERAND_GENREG : 1661 fields->f_regb8 = value; 1662 break; 1663 case XC16X_OPERAND_HASH : 1664 break; 1665 case XC16X_OPERAND_ICOND : 1666 fields->f_icondcode = value; 1667 break; 1668 case XC16X_OPERAND_LBIT2 : 1669 fields->f_op_lbit2 = value; 1670 break; 1671 case XC16X_OPERAND_LBIT4 : 1672 fields->f_op_lbit4 = value; 1673 break; 1674 case XC16X_OPERAND_MASK8 : 1675 fields->f_mask8 = value; 1676 break; 1677 case XC16X_OPERAND_MASKLO8 : 1678 fields->f_datahi8 = value; 1679 break; 1680 case XC16X_OPERAND_MEMGR8 : 1681 fields->f_memgr8 = value; 1682 break; 1683 case XC16X_OPERAND_MEMORY : 1684 fields->f_memory = value; 1685 break; 1686 case XC16X_OPERAND_PAG : 1687 break; 1688 case XC16X_OPERAND_PAGENUM : 1689 fields->f_pagenum = value; 1690 break; 1691 case XC16X_OPERAND_POF : 1692 break; 1693 case XC16X_OPERAND_QBIT : 1694 fields->f_qbit = value; 1695 break; 1696 case XC16X_OPERAND_QHIBIT : 1697 fields->f_qhibit = value; 1698 break; 1699 case XC16X_OPERAND_QLOBIT : 1700 fields->f_qlobit = value; 1701 break; 1702 case XC16X_OPERAND_REG8 : 1703 fields->f_reg8 = value; 1704 break; 1705 case XC16X_OPERAND_REGB8 : 1706 fields->f_regb8 = value; 1707 break; 1708 case XC16X_OPERAND_REGBMEM8 : 1709 fields->f_regmem8 = value; 1710 break; 1711 case XC16X_OPERAND_REGHI8 : 1712 fields->f_reghi8 = value; 1713 break; 1714 case XC16X_OPERAND_REGMEM8 : 1715 fields->f_regmem8 = value; 1716 break; 1717 case XC16X_OPERAND_REGOFF8 : 1718 fields->f_regoff8 = value; 1719 break; 1720 case XC16X_OPERAND_REL : 1721 fields->f_rel8 = value; 1722 break; 1723 case XC16X_OPERAND_RELHI : 1724 fields->f_relhi8 = value; 1725 break; 1726 case XC16X_OPERAND_SEG : 1727 fields->f_seg8 = value; 1728 break; 1729 case XC16X_OPERAND_SEGHI8 : 1730 fields->f_segnum8 = value; 1731 break; 1732 case XC16X_OPERAND_SEGM : 1733 break; 1734 case XC16X_OPERAND_SOF : 1735 break; 1736 case XC16X_OPERAND_SR : 1737 fields->f_r2 = value; 1738 break; 1739 case XC16X_OPERAND_SR2 : 1740 fields->f_r0 = value; 1741 break; 1742 case XC16X_OPERAND_SRB : 1743 fields->f_r2 = value; 1744 break; 1745 case XC16X_OPERAND_SRC1 : 1746 fields->f_r1 = value; 1747 break; 1748 case XC16X_OPERAND_SRC2 : 1749 fields->f_r2 = value; 1750 break; 1751 case XC16X_OPERAND_SRDIV : 1752 fields->f_reg8 = value; 1753 break; 1754 case XC16X_OPERAND_U4 : 1755 fields->f_uimm4 = value; 1756 break; 1757 case XC16X_OPERAND_UIMM16 : 1758 fields->f_uimm16 = value; 1759 break; 1760 case XC16X_OPERAND_UIMM2 : 1761 fields->f_uimm2 = value; 1762 break; 1763 case XC16X_OPERAND_UIMM3 : 1764 fields->f_uimm3 = value; 1765 break; 1766 case XC16X_OPERAND_UIMM4 : 1767 fields->f_uimm4 = value; 1768 break; 1769 case XC16X_OPERAND_UIMM7 : 1770 fields->f_uimm7 = value; 1771 break; 1772 case XC16X_OPERAND_UIMM8 : 1773 fields->f_uimm8 = value; 1774 break; 1775 case XC16X_OPERAND_UPAG16 : 1776 fields->f_uimm16 = value; 1777 break; 1778 case XC16X_OPERAND_UPOF16 : 1779 fields->f_memory = value; 1780 break; 1781 case XC16X_OPERAND_USEG16 : 1782 fields->f_offset16 = value; 1783 break; 1784 case XC16X_OPERAND_USEG8 : 1785 fields->f_seg8 = value; 1786 break; 1787 case XC16X_OPERAND_USOF16 : 1788 fields->f_offset16 = value; 1789 break; 1790 1791 default : 1792 /* xgettext:c-format */ 1793 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1794 opindex); 1795 abort (); 1796 } 1797 } 1798 1799 /* Function to call before using the instruction builder tables. */ 1800 1801 void 1802 xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1803 { 1804 cd->insert_handlers = & xc16x_cgen_insert_handlers[0]; 1805 cd->extract_handlers = & xc16x_cgen_extract_handlers[0]; 1806 1807 cd->insert_operand = xc16x_cgen_insert_operand; 1808 cd->extract_operand = xc16x_cgen_extract_operand; 1809 1810 cd->get_int_operand = xc16x_cgen_get_int_operand; 1811 cd->set_int_operand = xc16x_cgen_set_int_operand; 1812 cd->get_vma_operand = xc16x_cgen_get_vma_operand; 1813 cd->set_vma_operand = xc16x_cgen_set_vma_operand; 1814 } 1815
