Home | History | Annotate | Download | only in PowerPC

Lines Matching defs:GPR

2432   // fpr index is 1 byte after gpr
2492 // increase overflow_area by 4/8 if gpr/fpr > 8
2583 // char gpr; /* index into the array of 8 GPRs
2585 // * gpr=0 corresponds to r3,
2586 // * gpr=1 to r4, etc.
3148 static const MCPhysReg GPR[] = {
3161 const unsigned Num_GPR_Regs = array_lengthof(GPR);
3224 /* Compute GPR index associated with argument offset. */
3280 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass);
3316 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3353 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass);
3393 // once we support fp <-> gpr moves.
3398 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass);
3527 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3584 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32;
3693 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3695 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
3716 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3718 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
3742 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
3760 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3886 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
3888 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
3973 static const MCPhysReg GPR[] = {
3982 const unsigned NumGPRs = array_lengthof(GPR);
5029 static const MCPhysReg GPR[] = {
5042 const unsigned NumGPRs = array_lengthof(GPR);
5114 // The prolog code of the callee may store up to 8 GPR argument registers to
5193 /* Compute GPR index associated with argument offset. */
5232 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5294 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5311 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5337 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
5361 // routines always in both locations (FPR *and* GPR or stack slot).
5369 // Next, load the argument into GPR or stack slot if needed.
5374 // once we support fp <-> gpr moves.
5381 // Double values are always passed in a single GPR.
5385 // Non-array float values are extended and passed in a GPR.
5391 // together with its predecessor into one GPR.
5400 // The final element, if even, goes into the first half of a GPR.
5414 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], ArgVal));
5488 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5546 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5684 // The prolog code of the callee may store up to 8 GPR argument registers to
5748 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32;
5787 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5819 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5838 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
5862 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5871 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5880 !isPPC64) // PPC64 has 64-bit GPR's obviously :)
5930 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
5938 // Doesn't have GPR space allocated.
7806 // Now that we have the comparison, emit a copy from the CR to a GPR.
8801 // Since FP is only updated here but NOT referenced, it's treated as GPR.
11458 // 32-bit GPR has been selected, then 'upgrade' it to the 64-bit parent