Lines Matching refs:SINT
6665 SDValue SINT = Op.getOperand(0);
6687 SINT, DAG.getConstant(2047, dl, MVT::i64));
6690 Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT);
6703 SINT, DAG.getConstant(53, dl, MVT::i32));
6709 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT);
6716 if (canReuseLoadAddress(SINT, MVT::i64, RLI, DAG)) {
6722 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::SEXTLOAD)) {
6732 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::ZEXTLOAD)) {
6742 SINT.getOpcode() == ISD::SIGN_EXTEND) ||
6744 SINT.getOpcode() == ISD::ZERO_EXTEND)) &&
6745 SINT.getOperand(0).getValueType() == MVT::i32) {
6753 DAG.getEntryNode(), dl, SINT.getOperand(0), FIdx,
6770 Bits = DAG.getMemIntrinsicNode(SINT.getOpcode() == ISD::ZERO_EXTEND ?
6775 Bits = DAG.getNode(ISD::BITCAST, dl, MVT::f64, SINT);
