Lines Matching refs:Instruction
125 case Instruction::GetElementPtr:
132 case Instruction::And:
135 case Instruction::Add:
136 case Instruction::Or:
137 case Instruction::Xor:
140 case Instruction::Sub:
141 case Instruction::Mul:
142 case Instruction::Shl:
143 case Instruction::LShr:
144 case Instruction::AShr:
147 case Instruction::ICmp:
151 case Instruction::Select:
154 case Instruction::PHI:
155 case Instruction::Call:
156 case Instruction::Ret:
157 case Instruction::Load:
158 case Instruction::Store:
195 // helps expose latency-hiding opportunities to the instruction scheduler.
298 // instruction). We need one such shuffle instruction for each actual
357 assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
382 if (Opcode == Instruction::Load &&
403 if (Src->isVectorTy() && Opcode == Instruction::Store)
405 Cost += getVectorInstrCost(Instruction::ExtractElement, Src, i);
426 // instruction). For each result vector, we need one shuffle per incoming
