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Lines Matching refs:getDeadRegState

425   MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
426 .addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
428 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
430 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
461 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
552 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
554 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
556 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
558 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
600 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
660 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
690 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
906 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
954 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
993 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
994 .addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
997 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));